arch/arm/boot/dts/imx6dl-yapp4-common.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Copyright (C) 2015-2018 Y Soft Corporation, a.s.
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/interrupt-controller/irq.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/leds/common.h>
   9 #include <dt-bindings/pwm/pwm.h>
  10
  11 / {
  12         aliases: aliases {
  13                 ethernet1 = &eth1;
  14                 ethernet2 = &eth2;
  15                 mmc0 = &usdhc3;
  16                 mmc1 = &usdhc4;
  17         };
  18
  19         backlight: backlight {
  20                 compatible = "pwm-backlight";
  21                 pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>;
  22                 brightness-levels = <0 32 64 128 255>;
  23                 default-brightness-level = <32>;
  24                 num-interpolated-steps = <8>;
  25                 power-supply = <&sw2_reg>;
  26                 status = "disabled";
  27         };
  28
  29         lcd_display: display {
  30                 compatible = "fsl,imx-parallel-display";
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33                 interface-pix-fmt = "rgb24";
  34                 pinctrl-names = "default";
  35                 pinctrl-0 = <&pinctrl_ipu1>;
  36                 status = "disabled";
  37
  38                 port@0 {
  39                         reg = <0>;
  40
  41                         lcd_display_in: endpoint {
  42                                 remote-endpoint = <&ipu1_di0_disp0>;
  43                         };
  44                 };
  45
  46                 port@1 {
  47                         reg = <1>;
  48
  49                         lcd_display_out: endpoint {
  50                                 remote-endpoint = <&lcd_panel_in>;
  51                         };
  52                 };
  53         };
  54
  55         panel: panel {
  56                 compatible = "dataimage,scf0700c48ggu18";
  57                 power-supply = <&sw2_reg>;
  58                 backlight = <&backlight>;
  59                 status = "disabled";
  60
  61                 port {
  62                         lcd_panel_in: endpoint {
  63                                 remote-endpoint = <&lcd_display_out>;
  64                         };
  65                 };
  66         };
  67
  68         reg_pcie: regulator-pcie {
  69                 compatible = "regulator-fixed";
  70                 pinctrl-names = "default";
  71                 pinctrl-0 = <&pinctrl_pcie_reg>;
  72                 regulator-name = "MPCIE_3V3";
  73                 regulator-min-microvolt = <3300000>;
  74                 regulator-max-microvolt = <3300000>;
  75                 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
  76                 enable-active-high;
  77                 status = "disabled";
  78         };
  79
  80         reg_usb_h1_vbus: regulator-usb-h1-vbus {
  81                 compatible = "regulator-fixed";
  82                 pinctrl-names = "default";
  83                 pinctrl-0 = <&pinctrl_usbh1_vbus>;
  84                 regulator-name = "usb_h1_vbus";
  85                 regulator-min-microvolt = <5000000>;
  86                 regulator-max-microvolt = <5000000>;
  87                 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
  88                 enable-active-high;
  89                 status = "disabled";
  90         };
  91
  92         reg_usb_otg_vbus: regulator-usb-otg-vbus {
  93                 compatible = "regulator-fixed";
  94                 pinctrl-names = "default";
  95                 pinctrl-0 = <&pinctrl_usbotg_vbus>;
  96                 regulator-name = "usb_otg_vbus";
  97                 regulator-min-microvolt = <5000000>;
  98                 regulator-max-microvolt = <5000000>;
  99                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 100                 enable-active-high;
 101                 status = "okay";
 102         };
 103 };
 104
 105 &fec {
 106         pinctrl-names = "default";
 107         pinctrl-0 = <&pinctrl_enet>;
 108         phy-mode = "rgmii-id";
 109         phy-supply = <&sw2_reg>;
 110         status = "okay";
 111
 112         fixed-link {
 113                 speed = <1000>;
 114                 full-duplex;
 115         };
 116
 117         mdio {
 118                 #address-cells = <1>;
 119                 #size-cells = <0>;
 120
 121                 switch@10 {
 122                         compatible = "qca,qca8334";
 123                         reg = <0x10>;
 124                         reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
 125
 126                         switch_ports: ports {
 127                                 #address-cells = <1>;
 128                                 #size-cells = <0>;
 129
 130                                 ethphy0: port@0 {
 131                                         reg = <0>;
 132                                         label = "cpu";
 133                                         phy-mode = "rgmii-id";
 134                                         ethernet = <&fec>;
 135
 136                                         fixed-link {
 137                                                 speed = <1000>;
 138                                                 full-duplex;
 139                                         };
 140                                 };
 141
 142                                 eth2: port@2 {
 143                                         reg = <2>;
 144                                         label = "eth2";
 145                                         phy-mode = "internal";
 146                                         phy-handle = <&phy_port2>;
 147                                 };
 148
 149                                 eth1: port@3 {
 150                                         reg = <3>;
 151                                         label = "eth1";
 152                                         phy-mode = "internal";
 153                                         phy-handle = <&phy_port3>;
 154                                 };
 155                         };
 156
 157                         mdio {
 158                                 #address-cells = <1>;
 159                                 #size-cells = <0>;
 160
 161                                 phy_port2: ethernet-phy@1 {
 162                                         reg = <1>;
 163                                 };
 164
 165                                 phy_port3: ethernet-phy@2 {
 166                                         reg = <2>;
 167                                 };
 168                         };
 169                 };
 170         };
 171 };
 172
 173 &hdmi {
 174         pinctrl-names = "default";
 175         pinctrl-0 = <&pinctrl_hdmi_cec>;
 176         ddc-i2c-bus = <&i2c2>;
 177         status = "disabled";
 178 };
 179
 180 &i2c2 {
 181         clock-frequency = <100000>;
 182         pinctrl-names = "default";
 183         pinctrl-0 = <&pinctrl_i2c2>;
 184         status = "okay";
 185
 186         pmic@8 {
 187                 compatible = "fsl,pfuze200";
 188                 pinctrl-names = "default";
 189                 pinctrl-0 = <&pinctrl_pmic>;
 190                 reg = <0x8>;
 191
 192                 regulators {
 193                         sw1a_reg: sw1ab {
 194                                 regulator-min-microvolt = <300000>;
 195                                 regulator-max-microvolt = <1875000>;
 196                                 regulator-boot-on;
 197                                 regulator-always-on;
 198                                 regulator-ramp-delay = <6250>;
 199                         };
 200
 201                         sw2_reg: sw2 {
 202                                 regulator-min-microvolt = <800000>;
 203                                 regulator-max-microvolt = <3300000>;
 204                                 regulator-boot-on;
 205                                 regulator-always-on;
 206                         };
 207
 208                         sw3a_reg: sw3a {
 209                                 regulator-min-microvolt = <400000>;
 210                                 regulator-max-microvolt = <1975000>;
 211                                 regulator-boot-on;
 212                                 regulator-always-on;
 213                         };
 214
 215                         sw3b_reg: sw3b {
 216                                 regulator-min-microvolt = <400000>;
 217                                 regulator-max-microvolt = <1975000>;
 218                                 regulator-boot-on;
 219                                 regulator-always-on;
 220                         };
 221
 222                         swbst_reg: swbst {
 223                                 regulator-min-microvolt = <5000000>;
 224                                 regulator-max-microvolt = <5150000>;
 225                         };
 226
 227                         vgen1_reg: vgen1 {
 228                                 regulator-min-microvolt = <800000>;
 229                                 regulator-max-microvolt = <1550000>;
 230                         };
 231
 232                         vgen2_reg: vgen2 {
 233                                 regulator-min-microvolt = <800000>;
 234                                 regulator-max-microvolt = <1550000>;
 235                         };
 236
 237                         vgen3_reg: vgen3 {
 238                                 regulator-min-microvolt = <1800000>;
 239                                 regulator-max-microvolt = <3300000>;
 240                                 regulator-always-on;
 241                         };
 242
 243                         vgen4_reg: vgen4 {
 244                                 regulator-min-microvolt = <1800000>;
 245                                 regulator-max-microvolt = <3300000>;
 246                                 regulator-always-on;
 247                         };
 248
 249                         vgen5_reg: vgen5 {
 250                                 regulator-min-microvolt = <1800000>;
 251                                 regulator-max-microvolt = <3300000>;
 252                                 regulator-always-on;
 253                         };
 254
 255                         vgen6_reg: vgen6 {
 256                                 regulator-min-microvolt = <1800000>;
 257                                 regulator-max-microvolt = <3300000>;
 258                                 regulator-always-on;
 259                         };
 260
 261                         vref_reg: vrefddr {
 262                                 regulator-boot-on;
 263                                 regulator-always-on;
 264                         };
 265
 266                         vsnvs_reg: vsnvs {
 267                                 regulator-min-microvolt = <1000000>;
 268                                 regulator-max-microvolt = <3000000>;
 269                                 regulator-boot-on;
 270                                 regulator-always-on;
 271                         };
 272                 };
 273         };
 274
 275         leds: led-controller@30 {
 276                 compatible = "ti,lp5562";
 277                 reg = <0x30>;
 278                 clock-mode = /bits/ 8 <1>;
 279                 status = "disabled";
 280                 #address-cells = <1>;
 281                 #size-cells = <0>;
 282
 283                 led@0 {
 284                         chan-name = "R";
 285                         led-cur = /bits/ 8 <0x20>;
 286                         max-cur = /bits/ 8 <0x60>;
 287                         reg = <0>;
 288                         color = <LED_COLOR_ID_RED>;
 289                 };
 290
 291                 led@1 {
 292                         chan-name = "G";
 293                         led-cur = /bits/ 8 <0x20>;
 294                         max-cur = /bits/ 8 <0x60>;
 295                         reg = <1>;
 296                         color = <LED_COLOR_ID_GREEN>;
 297                 };
 298
 299                 led@2 {
 300                         chan-name = "B";
 301                         led-cur = /bits/ 8 <0x20>;
 302                         max-cur = /bits/ 8 <0x60>;
 303                         reg = <2>;
 304                         color = <LED_COLOR_ID_BLUE>;
 305                 };
 306         };
 307
 308         eeprom@57 {
 309                 compatible = "atmel,24c128";
 310                 reg = <0x57>;
 311                 pagesize = <64>;
 312                 status = "okay";
 313         };
 314
 315         touchscreen: touchscreen@5c {
 316                 compatible = "pixcir,pixcir_tangoc";
 317                 reg = <0x5c>;
 318                 pinctrl-0 = <&pinctrl_touch>;
 319                 interrupt-parent = <&gpio4>;
 320                 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
 321                 attb-gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;
 322                 reset-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
 323                 touchscreen-size-x = <800>;
 324                 touchscreen-size-y = <480>;
 325                 status = "disabled";
 326         };
 327 };
 328
 329 &i2c3 {
 330         clock-frequency = <100000>;
 331         pinctrl-names = "default";
 332         pinctrl-0 = <&pinctrl_i2c3>;
 333         status = "okay";
 334
 335         oled_1309: oled@3c {
 336                 compatible = "solomon,ssd1309fb-i2c";
 337                 reg = <0x3c>;
 338                 solomon,height = <64>;
 339                 solomon,width = <128>;
 340                 solomon,page-offset = <0>;
 341                 solomon,segment-no-remap;
 342                 solomon,prechargep2 = <15>;
 343                 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
 344                 vbat-supply = <&sw2_reg>;
 345                 status = "disabled";
 346         };
 347
 348         oled_1305: oled@3d {
 349                 compatible = "solomon,ssd1305fb-i2c";
 350                 reg = <0x3d>;
 351                 solomon,height = <64>;
 352                 solomon,width = <128>;
 353                 solomon,page-offset = <0>;
 354                 solomon,col-offset = <4>;
 355                 solomon,prechargep2 = <15>;
 356                 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>;
 357                 vbat-supply = <&sw2_reg>;
 358                 status = "disabled";
 359         };
 360
 361         gpio_oled: gpio@41 {
 362                 compatible = "nxp,pca9536";
 363                 gpio-controller;
 364                 #gpio-cells = <2>;
 365                 reg = <0x41>;
 366                 vcc-supply = <&sw2_reg>;
 367                 status = "disabled";
 368         };
 369
 370         touchkeys: keys@5a {
 371                 compatible = "fsl,mpr121-touchkey";
 372                 reg = <0x5a>;
 373                 vdd-supply = <&sw2_reg>;
 374                 autorepeat;
 375                 linux,keycodes = <KEY_1>, <KEY_2>, <KEY_3>, <KEY_4>, <KEY_5>,
 376                                 <KEY_6>, <KEY_7>, <KEY_8>, <KEY_9>,
 377                                 <KEY_BACKSPACE>, <KEY_0>, <KEY_ENTER>;
 378                 poll-interval = <50>;
 379                 status = "disabled";
 380         };
 381 };
 382
 383 &iomuxc {
 384         pinctrl_enet: enetgrp {
 385                 fsl,pins = <
 386                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b020
 387                         MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b020
 388                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b020
 389                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b020
 390                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b020
 391                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b020
 392                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b020
 393                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b020
 394                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b020
 395                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b020
 396                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b020
 397                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b020
 398                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b020
 399                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b020
 400                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b010
 401                         MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x1b010
 402                         MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x1b098
 403                 >;
 404         };
 405
 406         pinctrl_hdmi_cec: hdmicecgrp {
 407                 fsl,pins = <
 408                         MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE    0x1b898
 409                 >;
 410         };
 411
 412         pinctrl_i2c2: i2c2grp {
 413                 fsl,pins = <
 414                         MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b899
 415                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b899
 416                 >;
 417         };
 418
 419         pinctrl_i2c3: i2c3grp {
 420                 fsl,pins = <
 421                         MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b899
 422                         MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b899
 423                 >;
 424         };
 425
 426         pinctrl_ipu1: ipu1grp {
 427                 fsl,pins = <
 428                         MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK      0x10
 429                         MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02             0x10
 430                         MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03             0x10
 431                         MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00        0x10
 432                         MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01        0x10
 433                         MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02        0x10
 434                         MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03        0x10
 435                         MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04        0x10
 436                         MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05        0x10
 437                         MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06        0x10
 438                         MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07        0x10
 439                         MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08        0x10
 440                         MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09        0x10
 441                         MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10       0x10
 442                         MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11       0x10
 443                         MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12       0x10
 444                         MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13       0x10
 445                         MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14       0x10
 446                         MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15       0x10
 447                         MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16       0x10
 448                         MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17       0x10
 449                         MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18       0x10
 450                         MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19       0x10
 451                         MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20       0x10
 452                         MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21       0x10
 453                         MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22       0x10
 454                         MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23       0x10
 455                 >;
 456         };
 457
 458         pinctrl_pcie: pciegrp {
 459                 fsl,pins = <
 460                         MX6QDL_PAD_GPIO_17__GPIO7_IO12          0x1b098
 461                         MX6QDL_PAD_KEY_COL4__GPIO4_IO14         0x1b098
 462                         MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20     0x1b098
 463                 >;
 464         };
 465
 466         pinctrl_pcie_reg: pciereggrp {
 467                 fsl,pins = <
 468                         MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x1b098
 469                 >;
 470         };
 471
 472         pinctrl_pmic: pmicgrp {
 473                 fsl,pins = <
 474                         MX6QDL_PAD_GPIO_18__GPIO7_IO13  0x1b098
 475                 >;
 476         };
 477
 478         pinctrl_pwm1: pwm1grp {
 479                 fsl,pins = <
 480                         MX6QDL_PAD_GPIO_9__PWM1_OUT     0x8
 481                 >;
 482         };
 483
 484         pinctrl_touch: touchgrp {
 485                 fsl,pins = <
 486                         MX6QDL_PAD_GPIO_19__GPIO4_IO05  0x1b098
 487                         MX6QDL_PAD_GPIO_2__GPIO1_IO02   0x1b098
 488                 >;
 489         };
 490
 491         pinctrl_uart1: uart1grp {
 492                 fsl,pins = <
 493                         MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0a8
 494                         MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0a8
 495                 >;
 496         };
 497
 498         pinctrl_uart2: uart2grp {
 499                 fsl,pins = <
 500                         MX6QDL_PAD_GPIO_7__UART2_TX_DATA        0x1b098
 501                         MX6QDL_PAD_GPIO_8__UART2_RX_DATA        0x1b098
 502                 >;
 503         };
 504
 505         pinctrl_usbh1: usbh1grp {
 506                 fsl,pins = <
 507                         MX6QDL_PAD_EIM_D30__USB_H1_OC   0x1b098
 508                 >;
 509         };
 510
 511         pinctrl_usbh1_vbus: usbh1-vbus {
 512                 fsl,pins = <
 513                         MX6QDL_PAD_ENET_TXD1__GPIO1_IO29        0x98
 514                 >;
 515         };
 516
 517         pinctrl_usbotg: usbotggrp {
 518                 fsl,pins = <
 519                         MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x1b098
 520                         MX6QDL_PAD_EIM_D21__USB_OTG_OC          0x1b098
 521                 >;
 522         };
 523
 524         pinctrl_usbotg_vbus: usbotg-vbus {
 525                 fsl,pins = <
 526                         MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x98
 527                 >;
 528         };
 529
 530         pinctrl_usdhc3: usdhc3grp {
 531                 fsl,pins = <
 532                         MX6QDL_PAD_EIM_A16__GPIO2_IO22  0x1b018
 533                         MX6QDL_PAD_SD3_RST__GPIO7_IO08  0x1b018
 534                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
 535                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
 536                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
 537                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
 538                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
 539                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
 540                 >;
 541         };
 542
 543         pinctrl_usdhc4: usdhc4grp {
 544                 fsl,pins = <
 545                         MX6QDL_PAD_SD4_CMD__SD4_CMD     0x1f069
 546                         MX6QDL_PAD_SD4_CLK__SD4_CLK     0x10069
 547                         MX6QDL_PAD_SD4_DAT0__SD4_DATA0  0x17069
 548                         MX6QDL_PAD_SD4_DAT1__SD4_DATA1  0x17069
 549                         MX6QDL_PAD_SD4_DAT2__SD4_DATA2  0x17069
 550                         MX6QDL_PAD_SD4_DAT3__SD4_DATA3  0x17069
 551                         MX6QDL_PAD_SD4_DAT4__SD4_DATA4  0x17069
 552                         MX6QDL_PAD_SD4_DAT5__SD4_DATA5  0x17069
 553                         MX6QDL_PAD_SD4_DAT6__SD4_DATA6  0x17069
 554                         MX6QDL_PAD_SD4_DAT7__SD4_DATA7  0x17069
 555                 >;
 556         };
 557
 558         pinctrl_wdog: wdoggrp {
 559                 fsl,pins = <
 560                         MX6QDL_PAD_GPIO_1__WDOG2_B      0x1b0b0
 561                 >;
 562         };
 563 };
 564
 565 &ipu1_di0_disp0 {
 566         remote-endpoint = <&lcd_display_in>;
 567 };
 568
 569 &pcie {
 570         pinctrl-names = "default";
 571         pinctrl-0 = <&pinctrl_pcie>;
 572         reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
 573         vpcie-supply = <&reg_pcie>;
 574         status = "disabled";
 575 };
 576
 577 &pwm1 {
 578         pinctrl-names = "default";
 579         pinctrl-0 = <&pinctrl_pwm1>;
 580         status = "disabled";
 581 };
 582
 583 &uart1 {
 584         pinctrl-names = "default";
 585         pinctrl-0 = <&pinctrl_uart1>;
 586         status = "okay";
 587 };
 588
 589 &uart2 {
 590         pinctrl-names = "default";
 591         pinctrl-0 = <&pinctrl_uart2>;
 592         status = "okay";
 593 };
 594
 595 &usbh1 {
 596         pinctrl-names = "default";
 597         pinctrl-0 = <&pinctrl_usbh1>;
 598         vbus-supply = <&reg_usb_h1_vbus>;
 599         over-current-active-low;
 600         status = "disabled";
 601 };
 602
 603 &usbotg {
 604         pinctrl-names = "default";
 605         pinctrl-0 = <&pinctrl_usbotg>;
 606         vbus-supply = <&reg_usb_otg_vbus>;
 607         over-current-active-low;
 608         srp-disable;
 609         hnp-disable;
 610         adp-disable;
 611         status = "okay";
 612 };
 613
 614 &usbphy1 {
 615         fsl,tx-d-cal = <106>;
 616         status = "okay";
 617 };
 618
 619 &usbphy2 {
 620         fsl,tx-d-cal = <109>;
 621         status = "disabled";
 622 };
 623
 624 &usdhc3 {
 625         pinctrl-names = "default";
 626         pinctrl-0 = <&pinctrl_usdhc3>;
 627         bus-width = <4>;
 628         cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
 629         wp-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
 630         no-1-8-v;
 631         keep-power-in-suspend;
 632         wakeup-source;
 633         vmmc-supply = <&sw2_reg>;
 634         status = "disabled";
 635 };
 636
 637 &usdhc4 {
 638         pinctrl-names = "default";
 639         pinctrl-0 = <&pinctrl_usdhc4>;
 640         bus-width = <8>;
 641         non-removable;
 642         no-1-8-v;
 643         keep-power-in-suspend;
 644         vmmc-supply = <&sw2_reg>;
 645         status = "okay";
 646 };
 647
 648 &wdog1 {
 649         status = "disabled";
 650 };
 651
 652 &wdog2 {
 653         pinctrl-names = "default";
 654         pinctrl-0 = <&pinctrl_wdog>;
 655         fsl,ext-reset-output;
 656         status = "okay";
 657 };