2 * Copyright 2014 Iain Paton <ipaton0@gmail.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
11 #include "imx6dl.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
15 model = "RIoTboard i.MX6S";
16 compatible = "riot,imx6s-riotboard", "fsl,imx6dl";
19 reg = <0x10000000 0x40000000>;
23 stdout-path = "serial1:115200n8";
27 compatible = "gpio-leds";
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_led>;
33 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
35 linux,default-trigger = "heartbeat";
40 gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
41 default-state = "off";
46 compatible = "fsl,imx-audio-sgtl5000";
47 model = "imx6-riotboard-sgtl5000";
48 ssi-controller = <&ssi1>;
49 audio-codec = <&codec>;
52 "Mic Jack", "Mic Bias",
53 "Headphone Jack", "HP_OUT";
58 reg_2p5v: regulator-2p5v {
59 compatible = "regulator-fixed";
60 regulator-name = "2P5V";
61 regulator-min-microvolt = <2500000>;
62 regulator-max-microvolt = <2500000>;
65 reg_3p3v: regulator-3p3v {
66 compatible = "regulator-fixed";
67 regulator-name = "3P3V";
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
72 reg_usb_otg_vbus: regulator-usbotgvbus {
73 compatible = "regulator-fixed";
74 regulator-name = "usb_otg_vbus";
75 regulator-min-microvolt = <5000000>;
76 regulator-max-microvolt = <5000000>;
77 gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_audmux>;
88 pinctrl-names = "default";
89 pinctrl-0 = <&pinctrl_enet>;
91 phy-reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
92 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
93 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
94 fsl,err006687-workaround-present;
100 "", "", "SD2_WP", "", "SD2_CD", "I2C3_SCL",
101 "I2C3_SDA", "I2C4_SCL",
102 "I2C4_SDA", "", "", "", "", "", "", "",
103 "", "PWM3", "", "", "", "", "", "",
104 "", "", "", "", "", "", "", "";
109 "", "", "", "", "", "", "", "",
110 "", "", "", "", "", "", "", "",
111 "", "", "", "", "", "", "USB_OTG_VBUS", "",
112 "UART3_TXD", "UART3_RXD", "", "", "EIM_D28", "", "", "";
117 "", "", "", "", "", "", "UART4_TXD", "UART4_RXD",
118 "UART5_TXD", "UART5_RXD", "", "", "", "", "", "",
119 "GPIO4_16", "GPIO4_17", "GPIO4_18", "GPIO4_19", "",
120 "CSPI3_CLK", "CSPI3_MOSI", "CSPI3_MISO",
121 "CSPI3_CS0", "CSPI3_CS1", "GPIO4_26", "GPIO4_27",
122 "CSPI3_RDY", "PWM1", "PWM2", "GPIO4_31";
127 "", "", "EIM_A25", "", "", "GPIO5_05", "GPIO5_06",
129 "GPIO5_08", "CSPI2_CS1", "CSPI2_MOSI", "CSPI2_MISO",
130 "CSPI2_CS0", "CSPI2_CLK", "", "",
131 "", "", "", "", "", "", "", "",
132 "", "", "", "", "", "", "", "";
137 "SD3_CD", "SD3_WP", "", "", "", "", "", "",
138 "", "", "", "", "", "", "", "",
139 "", "", "", "", "", "", "", "",
140 "", "", "", "", "", "", "", "";
144 ddc-i2c-bus = <&i2c2>;
149 clock-frequency = <100000>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_i2c1>;
155 compatible = "fsl,sgtl5000";
157 clocks = <&clks IMX6QDL_CLK_CKO>;
158 VDDA-supply = <®_2p5v>;
159 VDDIO-supply = <®_3p3v>;
163 compatible = "fsl,pfuze100";
165 interrupt-parent = <&gpio5>;
169 reg_vddcore: sw1ab { /* VDDARM_IN */
170 regulator-min-microvolt = <300000>;
171 regulator-max-microvolt = <1875000>;
175 reg_vddsoc: sw1c { /* VDDSOC_IN */
176 regulator-min-microvolt = <300000>;
177 regulator-max-microvolt = <1875000>;
181 reg_gen_3v3: sw2 { /* VDDHIGH_IN */
182 regulator-min-microvolt = <800000>;
183 regulator-max-microvolt = <3300000>;
187 reg_ddr_1v5a: sw3a { /* NVCC_DRAM, NVCC_RGMII */
188 regulator-min-microvolt = <400000>;
189 regulator-max-microvolt = <1975000>;
193 reg_ddr_1v5b: sw3b { /* NVCC_DRAM, NVCC_RGMII */
194 regulator-min-microvolt = <400000>;
195 regulator-max-microvolt = <1975000>;
199 reg_ddr_vtt: sw4 { /* MIPI conn */
200 regulator-min-microvolt = <400000>;
201 regulator-max-microvolt = <1975000>;
205 reg_5v_600mA: swbst { /* not used */
206 regulator-min-microvolt = <5000000>;
207 regulator-max-microvolt = <5150000>;
210 reg_snvs_3v: vsnvs { /* VDD_SNVS_IN */
211 regulator-min-microvolt = <1500000>;
212 regulator-max-microvolt = <3000000>;
216 vref_reg: vrefddr { /* VREF_DDR */
221 reg_vgen1_1v5: vgen1 { /* not used */
222 regulator-min-microvolt = <800000>;
223 regulator-max-microvolt = <1550000>;
226 reg_vgen2_1v2_eth: vgen2 { /* pcie ? */
227 regulator-min-microvolt = <800000>;
228 regulator-max-microvolt = <1550000>;
232 reg_vgen3_2v8: vgen3 { /* not used */
233 regulator-min-microvolt = <1800000>;
234 regulator-max-microvolt = <3300000>;
236 reg_vgen4_1v8: vgen4 { /* NVCC_SD3 */
237 regulator-min-microvolt = <1800000>;
238 regulator-max-microvolt = <3300000>;
242 reg_vgen5_2v5_sgtl: vgen5 { /* Pwr LED & 5V0_delayed enable */
243 regulator-min-microvolt = <1800000>;
244 regulator-max-microvolt = <3300000>;
248 reg_vgen6_3v3: vgen6 { /* #V#_DELAYED enable, MIPI */
249 regulator-min-microvolt = <1800000>;
250 regulator-max-microvolt = <3300000>;
258 clock-frequency = <100000>;
259 pinctrl-names = "default";
260 pinctrl-0 = <&pinctrl_i2c2>;
265 clock-frequency = <100000>;
266 pinctrl-names = "default";
267 pinctrl-0 = <&pinctrl_i2c4>;
268 clocks = <&clks 116>;
273 pinctrl-names = "default";
274 pinctrl-0 = <&pinctrl_pwm1>;
279 pinctrl-names = "default";
280 pinctrl-0 = <&pinctrl_pwm2>;
285 pinctrl-names = "default";
286 pinctrl-0 = <&pinctrl_pwm3>;
291 pinctrl-names = "default";
292 pinctrl-0 = <&pinctrl_pwm4>;
301 pinctrl-names = "default";
302 pinctrl-0 = <&pinctrl_uart1>;
307 pinctrl-names = "default";
308 pinctrl-0 = <&pinctrl_uart2>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&pinctrl_uart3>;
319 pinctrl-names = "default";
320 pinctrl-0 = <&pinctrl_uart4>;
325 pinctrl-names = "default";
326 pinctrl-0 = <&pinctrl_uart5>;
332 disable-over-current;
337 vbus-supply = <®_usb_otg_vbus>;
338 pinctrl-names = "default";
339 pinctrl-0 = <&pinctrl_usbotg>;
340 disable-over-current;
346 pinctrl-names = "default";
347 pinctrl-0 = <&pinctrl_usdhc2>;
348 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
349 wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
350 vmmc-supply = <®_3p3v>;
355 pinctrl-names = "default";
356 pinctrl-0 = <&pinctrl_usdhc3>;
357 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
358 wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
359 vmmc-supply = <®_3p3v>;
364 pinctrl-names = "default";
365 pinctrl-0 = <&pinctrl_usdhc4>;
366 vmmc-supply = <®_3p3v>;
372 pinctrl-names = "default";
375 pinctrl_audmux: audmuxgrp {
377 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
378 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
379 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
380 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
381 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* CAM_MCLK */
385 pinctrl_ecspi1: ecspi1grp {
387 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
388 MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
389 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
390 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x000b1 /* CS0 */
394 pinctrl_ecspi2: ecspi2grp {
396 MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x000b1 /* CS1 */
397 MX6QDL_PAD_DISP0_DAT16__ECSPI2_MOSI 0x100b1
398 MX6QDL_PAD_DISP0_DAT17__ECSPI2_MISO 0x100b1
399 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000b1 /* CS0 */
400 MX6QDL_PAD_DISP0_DAT19__ECSPI2_SCLK 0x100b1
404 pinctrl_ecspi3: ecspi3grp {
406 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
407 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
408 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
409 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1 /* CS0 */
410 MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x000b1 /* CS1 */
414 pinctrl_enet: enetgrp {
416 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
417 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
418 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
419 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
420 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
421 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
422 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
423 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
424 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1 /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
425 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 /* AR8035 pin strapping: IO voltage: pull up */
426 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030 /* AR8035 pin strapping: PHYADDR#0: pull down */
427 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030 /* AR8035 pin strapping: PHYADDR#1: pull down */
428 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 /* AR8035 pin strapping: MODE#1: pull up */
429 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 /* AR8035 pin strapping: MODE#3: pull up */
430 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0 /* AR8035 pin strapping: MODE#0: pull down */
431 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 /* GPIO16 -> AR8035 25MHz */
432 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0 /* RGMII_nRST */
433 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0 /* AR8035 interrupt */
434 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
438 pinctrl_i2c1: i2c1grp {
440 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
441 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
445 pinctrl_i2c2: i2c2grp {
447 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
448 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
452 pinctrl_i2c3: i2c3grp {
454 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
455 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
459 pinctrl_i2c4: i2c4grp {
461 MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
462 MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
466 pinctrl_led: ledgrp {
468 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* user led0 */
469 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b1 /* user led1 */
473 pinctrl_pwm1: pwm1grp {
475 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
479 pinctrl_pwm2: pwm2grp {
481 MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
485 pinctrl_pwm3: pwm3grp {
487 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
491 pinctrl_pwm4: pwm4grp {
493 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
497 pinctrl_uart1: uart1grp {
499 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
500 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
504 pinctrl_uart2: uart2grp {
506 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
507 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
511 pinctrl_uart3: uart3grp {
513 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
514 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
518 pinctrl_uart4: uart4grp {
520 MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
521 MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
525 pinctrl_uart5: uart5grp {
527 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
528 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
532 pinctrl_usbotg: usbotggrp {
534 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
535 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 /* MX6QDL_PAD_EIM_D22__USB_OTG_PWR */
536 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
540 pinctrl_usdhc2: usdhc2grp {
542 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
543 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
544 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
545 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
546 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
547 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
548 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* SD2 CD */
549 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1f0b0 /* SD2 WP */
553 pinctrl_usdhc3: usdhc3grp {
555 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
556 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
557 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
558 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
559 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
560 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
561 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* SD3 CD */
562 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* SD3 WP */
566 pinctrl_usdhc4: usdhc4grp {
568 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
569 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
570 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
571 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
572 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
573 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
574 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x17059 /* SD4 RST (eMMC) */