arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi

   1 /*
   2  * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License
   6  * as published by the Free Software Foundation; either version 2
   7  * of the License, or (at your option) any later version.
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  */
  13
  14 #include "imx35.dtsi"
  15
  16 / {
  17         model = "Eukrea CPUIMX35";
  18         compatible = "eukrea,cpuimx35", "fsl,imx35";
  19
  20         memory@80000000 {
  21                 device_type = "memory";
  22                 reg = <0x80000000 0x8000000>; /* 128M */
  23         };
  24 };
  25
  26 &fec {
  27         pinctrl-names = "default";
  28         pinctrl-0 = <&pinctrl_fec>;
  29         status = "okay";
  30 };
  31
  32 &i2c1 {
  33         pinctrl-names = "default";
  34         pinctrl-0 = <&pinctrl_i2c1>;
  35         status = "okay";
  36
  37         pcf8563@51 {
  38                 compatible = "nxp,pcf8563";
  39                 reg = <0x51>;
  40         };
  41
  42         tsc2007: tsc2007@48 {
  43                 compatible = "ti,tsc2007";
  44                 gpios = <&gpio3 2 0>;
  45                 interrupt-parent = <&gpio3>;
  46                 interrupts = <0x2 0x8>;
  47                 pinctrl-names = "default";
  48                 pinctrl-0 = <&pinctrl_tsc2007_1>;
  49                 reg = <0x48>;
  50                 ti,x-plate-ohms = <180>;
  51         };
  52 };
  53
  54 &iomuxc {
  55         imx35-eukrea {
  56                 pinctrl_fec: fecgrp {
  57                         fsl,pins = <
  58                                 MX35_PAD_FEC_TX_CLK__FEC_TX_CLK         0x80000000
  59                                 MX35_PAD_FEC_RX_CLK__FEC_RX_CLK         0x80000000
  60                                 MX35_PAD_FEC_RX_DV__FEC_RX_DV           0x80000000
  61                                 MX35_PAD_FEC_COL__FEC_COL               0x80000000
  62                                 MX35_PAD_FEC_RDATA0__FEC_RDATA_0        0x80000000
  63                                 MX35_PAD_FEC_TDATA0__FEC_TDATA_0        0x80000000
  64                                 MX35_PAD_FEC_TX_EN__FEC_TX_EN           0x80000000
  65                                 MX35_PAD_FEC_MDC__FEC_MDC               0x80000000
  66                                 MX35_PAD_FEC_MDIO__FEC_MDIO             0x80000000
  67                                 MX35_PAD_FEC_TX_ERR__FEC_TX_ERR         0x80000000
  68                                 MX35_PAD_FEC_RX_ERR__FEC_RX_ERR         0x80000000
  69                                 MX35_PAD_FEC_CRS__FEC_CRS               0x80000000
  70                                 MX35_PAD_FEC_RDATA1__FEC_RDATA_1        0x80000000
  71                                 MX35_PAD_FEC_TDATA1__FEC_TDATA_1        0x80000000
  72                                 MX35_PAD_FEC_RDATA2__FEC_RDATA_2        0x80000000
  73                                 MX35_PAD_FEC_TDATA2__FEC_TDATA_2        0x80000000
  74                                 MX35_PAD_FEC_RDATA3__FEC_RDATA_3        0x80000000
  75                                 MX35_PAD_FEC_TDATA3__FEC_TDATA_3        0x80000000
  76                         >;
  77                 };
  78
  79                 pinctrl_i2c1: i2c1grp {
  80                         fsl,pins = <
  81                                 MX35_PAD_I2C1_CLK__I2C1_SCL             0x80000000
  82                                 MX35_PAD_I2C1_DAT__I2C1_SDA             0x80000000
  83                         >;
  84                 };
  85
  86                 pinctrl_tsc2007_1: tsc2007grp-1 {
  87                         fsl,pins = <MX35_PAD_ATA_DA2__GPIO3_2 0x80000000>;
  88                 };
  89         };
  90 };
  91
  92 &nfc {
  93         nand-bus-width = <8>;
  94         nand-ecc-mode = "hw";
  95         nand-on-flash-bbt;
  96         status = "okay";
  97 };