1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright 2012 Freescale Semiconductor, Inc.
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx28-pinfunc.h"
12 interrupt-parent = <&icoll>;
14 * The decompressor and also some bootloaders rely on a
15 * pre-existing /chosen node to be available to insert the
16 * command line and merge other ATAGS info.
17 * Also for U-Boot there must be a pre-existing /memory node.
20 memory { device_type = "memory"; };
48 compatible = "arm,arm926ej-s";
55 compatible = "simple-bus";
58 reg = <0x80000000 0x80000>;
62 compatible = "simple-bus";
65 reg = <0x80000000 0x3c900>;
68 icoll: interrupt-controller@80000000 {
69 compatible = "fsl,imx28-icoll", "fsl,icoll";
71 #interrupt-cells = <1>;
72 reg = <0x80000000 0x2000>;
75 hsadc: hsadc@80002000 {
76 reg = <0x80002000 0x2000>;
78 dmas = <&dma_apbh 12>;
83 dma_apbh: dma-apbh@80004000 {
84 compatible = "fsl,imx28-dma-apbh";
85 reg = <0x80004000 0x2000>;
86 interrupts = <82 83 84 85
90 interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
91 "gpmi0", "gmpi1", "gpmi2", "gmpi3",
92 "gpmi4", "gmpi5", "gpmi6", "gmpi7",
93 "hsadc", "lcdif", "empty", "empty";
99 perfmon: perfmon@80006000 {
100 reg = <0x80006000 0x800>;
105 gpmi: gpmi-nand@8000c000 {
106 compatible = "fsl,imx28-gpmi-nand";
107 #address-cells = <1>;
109 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
110 reg-names = "gpmi-nand", "bch";
112 interrupt-names = "bch";
114 clock-names = "gpmi_io";
115 dmas = <&dma_apbh 4>;
121 #address-cells = <1>;
123 reg = <0x80010000 0x2000>;
126 dmas = <&dma_apbh 0>;
132 #address-cells = <1>;
134 reg = <0x80012000 0x2000>;
137 dmas = <&dma_apbh 1>;
143 #address-cells = <1>;
145 reg = <0x80014000 0x2000>;
148 dmas = <&dma_apbh 2>;
154 #address-cells = <1>;
156 reg = <0x80016000 0x2000>;
159 dmas = <&dma_apbh 3>;
164 pinctrl: pinctrl@80018000 {
165 #address-cells = <1>;
167 compatible = "fsl,imx28-pinctrl", "simple-bus";
168 reg = <0x80018000 0x2000>;
171 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
176 interrupt-controller;
177 #interrupt-cells = <2>;
181 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
186 interrupt-controller;
187 #interrupt-cells = <2>;
191 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
196 interrupt-controller;
197 #interrupt-cells = <2>;
201 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
206 interrupt-controller;
207 #interrupt-cells = <2>;
211 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
216 interrupt-controller;
217 #interrupt-cells = <2>;
220 duart_pins_a: duart@0 {
223 MX28_PAD_PWM0__DUART_RX
224 MX28_PAD_PWM1__DUART_TX
226 fsl,drive-strength = <MXS_DRIVE_4mA>;
227 fsl,voltage = <MXS_VOLTAGE_HIGH>;
228 fsl,pull-up = <MXS_PULL_DISABLE>;
231 duart_pins_b: duart@1 {
234 MX28_PAD_AUART0_CTS__DUART_RX
235 MX28_PAD_AUART0_RTS__DUART_TX
237 fsl,drive-strength = <MXS_DRIVE_4mA>;
238 fsl,voltage = <MXS_VOLTAGE_HIGH>;
239 fsl,pull-up = <MXS_PULL_DISABLE>;
242 duart_4pins_a: duart-4pins@0 {
245 MX28_PAD_AUART0_CTS__DUART_RX
246 MX28_PAD_AUART0_RTS__DUART_TX
247 MX28_PAD_AUART0_RX__DUART_CTS
248 MX28_PAD_AUART0_TX__DUART_RTS
250 fsl,drive-strength = <MXS_DRIVE_4mA>;
251 fsl,voltage = <MXS_VOLTAGE_HIGH>;
252 fsl,pull-up = <MXS_PULL_DISABLE>;
255 gpmi_pins_a: gpmi-nand@0 {
258 MX28_PAD_GPMI_D00__GPMI_D0
259 MX28_PAD_GPMI_D01__GPMI_D1
260 MX28_PAD_GPMI_D02__GPMI_D2
261 MX28_PAD_GPMI_D03__GPMI_D3
262 MX28_PAD_GPMI_D04__GPMI_D4
263 MX28_PAD_GPMI_D05__GPMI_D5
264 MX28_PAD_GPMI_D06__GPMI_D6
265 MX28_PAD_GPMI_D07__GPMI_D7
266 MX28_PAD_GPMI_CE0N__GPMI_CE0N
267 MX28_PAD_GPMI_RDY0__GPMI_READY0
268 MX28_PAD_GPMI_RDN__GPMI_RDN
269 MX28_PAD_GPMI_WRN__GPMI_WRN
270 MX28_PAD_GPMI_ALE__GPMI_ALE
271 MX28_PAD_GPMI_CLE__GPMI_CLE
272 MX28_PAD_GPMI_RESETN__GPMI_RESETN
274 fsl,drive-strength = <MXS_DRIVE_4mA>;
275 fsl,voltage = <MXS_VOLTAGE_HIGH>;
276 fsl,pull-up = <MXS_PULL_DISABLE>;
279 gpmi_status_cfg: gpmi-status-cfg@0 {
282 MX28_PAD_GPMI_RDN__GPMI_RDN
283 MX28_PAD_GPMI_WRN__GPMI_WRN
284 MX28_PAD_GPMI_RESETN__GPMI_RESETN
286 fsl,drive-strength = <MXS_DRIVE_12mA>;
289 auart0_pins_a: auart0@0 {
292 MX28_PAD_AUART0_RX__AUART0_RX
293 MX28_PAD_AUART0_TX__AUART0_TX
294 MX28_PAD_AUART0_CTS__AUART0_CTS
295 MX28_PAD_AUART0_RTS__AUART0_RTS
297 fsl,drive-strength = <MXS_DRIVE_4mA>;
298 fsl,voltage = <MXS_VOLTAGE_HIGH>;
299 fsl,pull-up = <MXS_PULL_DISABLE>;
302 auart0_2pins_a: auart0-2pins@0 {
305 MX28_PAD_AUART0_RX__AUART0_RX
306 MX28_PAD_AUART0_TX__AUART0_TX
308 fsl,drive-strength = <MXS_DRIVE_4mA>;
309 fsl,voltage = <MXS_VOLTAGE_HIGH>;
310 fsl,pull-up = <MXS_PULL_DISABLE>;
313 auart1_pins_a: auart1@0 {
316 MX28_PAD_AUART1_RX__AUART1_RX
317 MX28_PAD_AUART1_TX__AUART1_TX
318 MX28_PAD_AUART1_CTS__AUART1_CTS
319 MX28_PAD_AUART1_RTS__AUART1_RTS
321 fsl,drive-strength = <MXS_DRIVE_4mA>;
322 fsl,voltage = <MXS_VOLTAGE_HIGH>;
323 fsl,pull-up = <MXS_PULL_DISABLE>;
326 auart1_2pins_a: auart1-2pins@0 {
329 MX28_PAD_AUART1_RX__AUART1_RX
330 MX28_PAD_AUART1_TX__AUART1_TX
332 fsl,drive-strength = <MXS_DRIVE_4mA>;
333 fsl,voltage = <MXS_VOLTAGE_HIGH>;
334 fsl,pull-up = <MXS_PULL_DISABLE>;
337 auart2_2pins_a: auart2-2pins@0 {
340 MX28_PAD_SSP2_SCK__AUART2_RX
341 MX28_PAD_SSP2_MOSI__AUART2_TX
343 fsl,drive-strength = <MXS_DRIVE_4mA>;
344 fsl,voltage = <MXS_VOLTAGE_HIGH>;
345 fsl,pull-up = <MXS_PULL_DISABLE>;
348 auart2_2pins_b: auart2-2pins@1 {
351 MX28_PAD_AUART2_RX__AUART2_RX
352 MX28_PAD_AUART2_TX__AUART2_TX
354 fsl,drive-strength = <MXS_DRIVE_4mA>;
355 fsl,voltage = <MXS_VOLTAGE_HIGH>;
356 fsl,pull-up = <MXS_PULL_DISABLE>;
359 auart2_pins_a: auart2-pins@0 {
362 MX28_PAD_AUART2_RX__AUART2_RX
363 MX28_PAD_AUART2_TX__AUART2_TX
364 MX28_PAD_AUART2_CTS__AUART2_CTS
365 MX28_PAD_AUART2_RTS__AUART2_RTS
367 fsl,drive-strength = <MXS_DRIVE_4mA>;
368 fsl,voltage = <MXS_VOLTAGE_HIGH>;
369 fsl,pull-up = <MXS_PULL_DISABLE>;
372 auart3_pins_a: auart3@0 {
375 MX28_PAD_AUART3_RX__AUART3_RX
376 MX28_PAD_AUART3_TX__AUART3_TX
377 MX28_PAD_AUART3_CTS__AUART3_CTS
378 MX28_PAD_AUART3_RTS__AUART3_RTS
380 fsl,drive-strength = <MXS_DRIVE_4mA>;
381 fsl,voltage = <MXS_VOLTAGE_HIGH>;
382 fsl,pull-up = <MXS_PULL_DISABLE>;
385 auart3_2pins_a: auart3-2pins@0 {
388 MX28_PAD_SSP2_MISO__AUART3_RX
389 MX28_PAD_SSP2_SS0__AUART3_TX
391 fsl,drive-strength = <MXS_DRIVE_4mA>;
392 fsl,voltage = <MXS_VOLTAGE_HIGH>;
393 fsl,pull-up = <MXS_PULL_DISABLE>;
396 auart3_2pins_b: auart3-2pins@1 {
399 MX28_PAD_AUART3_RX__AUART3_RX
400 MX28_PAD_AUART3_TX__AUART3_TX
402 fsl,drive-strength = <MXS_DRIVE_4mA>;
403 fsl,voltage = <MXS_VOLTAGE_HIGH>;
404 fsl,pull-up = <MXS_PULL_DISABLE>;
407 auart4_2pins_a: auart4@0 {
410 MX28_PAD_SSP3_SCK__AUART4_TX
411 MX28_PAD_SSP3_MOSI__AUART4_RX
413 fsl,drive-strength = <MXS_DRIVE_4mA>;
414 fsl,voltage = <MXS_VOLTAGE_HIGH>;
415 fsl,pull-up = <MXS_PULL_DISABLE>;
418 auart4_2pins_b: auart4@1 {
421 MX28_PAD_AUART0_CTS__AUART4_RX
422 MX28_PAD_AUART0_RTS__AUART4_TX
424 fsl,drive-strength = <MXS_DRIVE_4mA>;
425 fsl,voltage = <MXS_VOLTAGE_HIGH>;
426 fsl,pull-up = <MXS_PULL_DISABLE>;
429 mac0_pins_a: mac0@0 {
432 MX28_PAD_ENET0_MDC__ENET0_MDC
433 MX28_PAD_ENET0_MDIO__ENET0_MDIO
434 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
435 MX28_PAD_ENET0_RXD0__ENET0_RXD0
436 MX28_PAD_ENET0_RXD1__ENET0_RXD1
437 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
438 MX28_PAD_ENET0_TXD0__ENET0_TXD0
439 MX28_PAD_ENET0_TXD1__ENET0_TXD1
440 MX28_PAD_ENET_CLK__CLKCTRL_ENET
442 fsl,drive-strength = <MXS_DRIVE_8mA>;
443 fsl,voltage = <MXS_VOLTAGE_HIGH>;
444 fsl,pull-up = <MXS_PULL_ENABLE>;
447 mac0_pins_b: mac0@1 {
450 MX28_PAD_ENET0_MDC__ENET0_MDC
451 MX28_PAD_ENET0_MDIO__ENET0_MDIO
452 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN
453 MX28_PAD_ENET0_RXD0__ENET0_RXD0
454 MX28_PAD_ENET0_RXD1__ENET0_RXD1
455 MX28_PAD_ENET0_RXD2__ENET0_RXD2
456 MX28_PAD_ENET0_RXD3__ENET0_RXD3
457 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN
458 MX28_PAD_ENET0_TXD0__ENET0_TXD0
459 MX28_PAD_ENET0_TXD1__ENET0_TXD1
460 MX28_PAD_ENET0_TXD2__ENET0_TXD2
461 MX28_PAD_ENET0_TXD3__ENET0_TXD3
462 MX28_PAD_ENET_CLK__CLKCTRL_ENET
463 MX28_PAD_ENET0_COL__ENET0_COL
464 MX28_PAD_ENET0_CRS__ENET0_CRS
465 MX28_PAD_ENET0_TX_CLK__ENET0_TX_CLK
466 MX28_PAD_ENET0_RX_CLK__ENET0_RX_CLK
468 fsl,drive-strength = <MXS_DRIVE_8mA>;
469 fsl,voltage = <MXS_VOLTAGE_HIGH>;
470 fsl,pull-up = <MXS_PULL_ENABLE>;
473 mac1_pins_a: mac1@0 {
476 MX28_PAD_ENET0_CRS__ENET1_RX_EN
477 MX28_PAD_ENET0_RXD2__ENET1_RXD0
478 MX28_PAD_ENET0_RXD3__ENET1_RXD1
479 MX28_PAD_ENET0_COL__ENET1_TX_EN
480 MX28_PAD_ENET0_TXD2__ENET1_TXD0
481 MX28_PAD_ENET0_TXD3__ENET1_TXD1
483 fsl,drive-strength = <MXS_DRIVE_8mA>;
484 fsl,voltage = <MXS_VOLTAGE_HIGH>;
485 fsl,pull-up = <MXS_PULL_ENABLE>;
488 mmc0_8bit_pins_a: mmc0-8bit@0 {
491 MX28_PAD_SSP0_DATA0__SSP0_D0
492 MX28_PAD_SSP0_DATA1__SSP0_D1
493 MX28_PAD_SSP0_DATA2__SSP0_D2
494 MX28_PAD_SSP0_DATA3__SSP0_D3
495 MX28_PAD_SSP0_DATA4__SSP0_D4
496 MX28_PAD_SSP0_DATA5__SSP0_D5
497 MX28_PAD_SSP0_DATA6__SSP0_D6
498 MX28_PAD_SSP0_DATA7__SSP0_D7
499 MX28_PAD_SSP0_CMD__SSP0_CMD
500 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
501 MX28_PAD_SSP0_SCK__SSP0_SCK
503 fsl,drive-strength = <MXS_DRIVE_8mA>;
504 fsl,voltage = <MXS_VOLTAGE_HIGH>;
505 fsl,pull-up = <MXS_PULL_ENABLE>;
508 mmc0_4bit_pins_a: mmc0-4bit@0 {
511 MX28_PAD_SSP0_DATA0__SSP0_D0
512 MX28_PAD_SSP0_DATA1__SSP0_D1
513 MX28_PAD_SSP0_DATA2__SSP0_D2
514 MX28_PAD_SSP0_DATA3__SSP0_D3
515 MX28_PAD_SSP0_CMD__SSP0_CMD
516 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
517 MX28_PAD_SSP0_SCK__SSP0_SCK
519 fsl,drive-strength = <MXS_DRIVE_8mA>;
520 fsl,voltage = <MXS_VOLTAGE_HIGH>;
521 fsl,pull-up = <MXS_PULL_ENABLE>;
524 mmc0_cd_cfg: mmc0-cd-cfg@0 {
527 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT
529 fsl,pull-up = <MXS_PULL_DISABLE>;
532 mmc0_sck_cfg: mmc0-sck-cfg@0 {
535 MX28_PAD_SSP0_SCK__SSP0_SCK
537 fsl,drive-strength = <MXS_DRIVE_12mA>;
538 fsl,pull-up = <MXS_PULL_DISABLE>;
541 mmc1_4bit_pins_a: mmc1-4bit@0 {
544 MX28_PAD_GPMI_D00__SSP1_D0
545 MX28_PAD_GPMI_D01__SSP1_D1
546 MX28_PAD_GPMI_D02__SSP1_D2
547 MX28_PAD_GPMI_D03__SSP1_D3
548 MX28_PAD_GPMI_RDY1__SSP1_CMD
549 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
550 MX28_PAD_GPMI_WRN__SSP1_SCK
552 fsl,drive-strength = <MXS_DRIVE_8mA>;
553 fsl,voltage = <MXS_VOLTAGE_HIGH>;
554 fsl,pull-up = <MXS_PULL_ENABLE>;
557 mmc1_cd_cfg: mmc1-cd-cfg@0 {
560 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT
562 fsl,pull-up = <MXS_PULL_DISABLE>;
565 mmc1_sck_cfg: mmc1-sck-cfg@0 {
568 MX28_PAD_GPMI_WRN__SSP1_SCK
570 fsl,drive-strength = <MXS_DRIVE_12mA>;
571 fsl,pull-up = <MXS_PULL_DISABLE>;
575 mmc2_4bit_pins_a: mmc2-4bit@0 {
578 MX28_PAD_SSP0_DATA4__SSP2_D0
579 MX28_PAD_SSP1_SCK__SSP2_D1
580 MX28_PAD_SSP1_CMD__SSP2_D2
581 MX28_PAD_SSP0_DATA5__SSP2_D3
582 MX28_PAD_SSP0_DATA6__SSP2_CMD
583 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
584 MX28_PAD_SSP0_DATA7__SSP2_SCK
586 fsl,drive-strength = <MXS_DRIVE_8mA>;
587 fsl,voltage = <MXS_VOLTAGE_HIGH>;
588 fsl,pull-up = <MXS_PULL_ENABLE>;
591 mmc2_4bit_pins_b: mmc2-4bit@1 {
594 MX28_PAD_SSP2_SCK__SSP2_SCK
595 MX28_PAD_SSP2_MOSI__SSP2_CMD
596 MX28_PAD_SSP2_MISO__SSP2_D0
597 MX28_PAD_SSP2_SS0__SSP2_D3
598 MX28_PAD_SSP2_SS1__SSP2_D1
599 MX28_PAD_SSP2_SS2__SSP2_D2
600 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
602 fsl,drive-strength = <MXS_DRIVE_8mA>;
603 fsl,voltage = <MXS_VOLTAGE_HIGH>;
604 fsl,pull-up = <MXS_PULL_ENABLE>;
607 mmc2_cd_cfg: mmc2-cd-cfg@0 {
610 MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
612 fsl,pull-up = <MXS_PULL_DISABLE>;
615 mmc2_sck_cfg_a: mmc2-sck-cfg@0 {
618 MX28_PAD_SSP0_DATA7__SSP2_SCK
620 fsl,drive-strength = <MXS_DRIVE_12mA>;
621 fsl,pull-up = <MXS_PULL_DISABLE>;
624 mmc2_sck_cfg_b: mmc2-sck-cfg@1 {
627 MX28_PAD_SSP2_SCK__SSP2_SCK
629 fsl,drive-strength = <MXS_DRIVE_12mA>;
630 fsl,pull-up = <MXS_PULL_DISABLE>;
633 i2c0_pins_a: i2c0@0 {
636 MX28_PAD_I2C0_SCL__I2C0_SCL
637 MX28_PAD_I2C0_SDA__I2C0_SDA
639 fsl,drive-strength = <MXS_DRIVE_8mA>;
640 fsl,voltage = <MXS_VOLTAGE_HIGH>;
641 fsl,pull-up = <MXS_PULL_ENABLE>;
644 i2c0_pins_b: i2c0@1 {
647 MX28_PAD_AUART0_RX__I2C0_SCL
648 MX28_PAD_AUART0_TX__I2C0_SDA
650 fsl,drive-strength = <MXS_DRIVE_8mA>;
651 fsl,voltage = <MXS_VOLTAGE_HIGH>;
652 fsl,pull-up = <MXS_PULL_ENABLE>;
655 i2c1_pins_a: i2c1@0 {
658 MX28_PAD_PWM0__I2C1_SCL
659 MX28_PAD_PWM1__I2C1_SDA
661 fsl,drive-strength = <MXS_DRIVE_8mA>;
662 fsl,voltage = <MXS_VOLTAGE_HIGH>;
663 fsl,pull-up = <MXS_PULL_ENABLE>;
666 i2c1_pins_b: i2c1@1 {
669 MX28_PAD_AUART2_CTS__I2C1_SCL
670 MX28_PAD_AUART2_RTS__I2C1_SDA
672 fsl,drive-strength = <MXS_DRIVE_8mA>;
673 fsl,voltage = <MXS_VOLTAGE_HIGH>;
674 fsl,pull-up = <MXS_PULL_ENABLE>;
677 saif0_pins_a: saif0@0 {
680 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK
681 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
682 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
683 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
685 fsl,drive-strength = <MXS_DRIVE_12mA>;
686 fsl,voltage = <MXS_VOLTAGE_HIGH>;
687 fsl,pull-up = <MXS_PULL_ENABLE>;
690 saif0_pins_b: saif0@1 {
693 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK
694 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK
695 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0
697 fsl,drive-strength = <MXS_DRIVE_12mA>;
698 fsl,voltage = <MXS_VOLTAGE_HIGH>;
699 fsl,pull-up = <MXS_PULL_ENABLE>;
702 saif1_pins_a: saif1@0 {
705 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0
707 fsl,drive-strength = <MXS_DRIVE_12mA>;
708 fsl,voltage = <MXS_VOLTAGE_HIGH>;
709 fsl,pull-up = <MXS_PULL_ENABLE>;
712 pwm0_pins_a: pwm0@0 {
717 fsl,drive-strength = <MXS_DRIVE_4mA>;
718 fsl,voltage = <MXS_VOLTAGE_HIGH>;
719 fsl,pull-up = <MXS_PULL_DISABLE>;
722 pwm2_pins_a: pwm2@0 {
727 fsl,drive-strength = <MXS_DRIVE_4mA>;
728 fsl,voltage = <MXS_VOLTAGE_HIGH>;
729 fsl,pull-up = <MXS_PULL_DISABLE>;
732 pwm3_pins_a: pwm3@0 {
737 fsl,drive-strength = <MXS_DRIVE_4mA>;
738 fsl,voltage = <MXS_VOLTAGE_HIGH>;
739 fsl,pull-up = <MXS_PULL_DISABLE>;
742 pwm3_pins_b: pwm3@1 {
745 MX28_PAD_SAIF0_MCLK__PWM_3
747 fsl,drive-strength = <MXS_DRIVE_4mA>;
748 fsl,voltage = <MXS_VOLTAGE_HIGH>;
749 fsl,pull-up = <MXS_PULL_DISABLE>;
752 pwm4_pins_a: pwm4@0 {
757 fsl,drive-strength = <MXS_DRIVE_4mA>;
758 fsl,voltage = <MXS_VOLTAGE_HIGH>;
759 fsl,pull-up = <MXS_PULL_DISABLE>;
762 lcdif_24bit_pins_a: lcdif-24bit@0 {
765 MX28_PAD_LCD_D00__LCD_D0
766 MX28_PAD_LCD_D01__LCD_D1
767 MX28_PAD_LCD_D02__LCD_D2
768 MX28_PAD_LCD_D03__LCD_D3
769 MX28_PAD_LCD_D04__LCD_D4
770 MX28_PAD_LCD_D05__LCD_D5
771 MX28_PAD_LCD_D06__LCD_D6
772 MX28_PAD_LCD_D07__LCD_D7
773 MX28_PAD_LCD_D08__LCD_D8
774 MX28_PAD_LCD_D09__LCD_D9
775 MX28_PAD_LCD_D10__LCD_D10
776 MX28_PAD_LCD_D11__LCD_D11
777 MX28_PAD_LCD_D12__LCD_D12
778 MX28_PAD_LCD_D13__LCD_D13
779 MX28_PAD_LCD_D14__LCD_D14
780 MX28_PAD_LCD_D15__LCD_D15
781 MX28_PAD_LCD_D16__LCD_D16
782 MX28_PAD_LCD_D17__LCD_D17
783 MX28_PAD_LCD_D18__LCD_D18
784 MX28_PAD_LCD_D19__LCD_D19
785 MX28_PAD_LCD_D20__LCD_D20
786 MX28_PAD_LCD_D21__LCD_D21
787 MX28_PAD_LCD_D22__LCD_D22
788 MX28_PAD_LCD_D23__LCD_D23
790 fsl,drive-strength = <MXS_DRIVE_4mA>;
791 fsl,voltage = <MXS_VOLTAGE_HIGH>;
792 fsl,pull-up = <MXS_PULL_DISABLE>;
795 lcdif_18bit_pins_a: lcdif-18bit@0 {
798 MX28_PAD_LCD_D00__LCD_D0
799 MX28_PAD_LCD_D01__LCD_D1
800 MX28_PAD_LCD_D02__LCD_D2
801 MX28_PAD_LCD_D03__LCD_D3
802 MX28_PAD_LCD_D04__LCD_D4
803 MX28_PAD_LCD_D05__LCD_D5
804 MX28_PAD_LCD_D06__LCD_D6
805 MX28_PAD_LCD_D07__LCD_D7
806 MX28_PAD_LCD_D08__LCD_D8
807 MX28_PAD_LCD_D09__LCD_D9
808 MX28_PAD_LCD_D10__LCD_D10
809 MX28_PAD_LCD_D11__LCD_D11
810 MX28_PAD_LCD_D12__LCD_D12
811 MX28_PAD_LCD_D13__LCD_D13
812 MX28_PAD_LCD_D14__LCD_D14
813 MX28_PAD_LCD_D15__LCD_D15
814 MX28_PAD_LCD_D16__LCD_D16
815 MX28_PAD_LCD_D17__LCD_D17
817 fsl,drive-strength = <MXS_DRIVE_4mA>;
818 fsl,voltage = <MXS_VOLTAGE_HIGH>;
819 fsl,pull-up = <MXS_PULL_DISABLE>;
822 lcdif_16bit_pins_a: lcdif-16bit@0 {
825 MX28_PAD_LCD_D00__LCD_D0
826 MX28_PAD_LCD_D01__LCD_D1
827 MX28_PAD_LCD_D02__LCD_D2
828 MX28_PAD_LCD_D03__LCD_D3
829 MX28_PAD_LCD_D04__LCD_D4
830 MX28_PAD_LCD_D05__LCD_D5
831 MX28_PAD_LCD_D06__LCD_D6
832 MX28_PAD_LCD_D07__LCD_D7
833 MX28_PAD_LCD_D08__LCD_D8
834 MX28_PAD_LCD_D09__LCD_D9
835 MX28_PAD_LCD_D10__LCD_D10
836 MX28_PAD_LCD_D11__LCD_D11
837 MX28_PAD_LCD_D12__LCD_D12
838 MX28_PAD_LCD_D13__LCD_D13
839 MX28_PAD_LCD_D14__LCD_D14
840 MX28_PAD_LCD_D15__LCD_D15
842 fsl,drive-strength = <MXS_DRIVE_4mA>;
843 fsl,voltage = <MXS_VOLTAGE_HIGH>;
844 fsl,pull-up = <MXS_PULL_DISABLE>;
847 lcdif_sync_pins_a: lcdif-sync@0 {
850 MX28_PAD_LCD_RS__LCD_DOTCLK
851 MX28_PAD_LCD_CS__LCD_ENABLE
852 MX28_PAD_LCD_RD_E__LCD_VSYNC
853 MX28_PAD_LCD_WR_RWN__LCD_HSYNC
855 fsl,drive-strength = <MXS_DRIVE_4mA>;
856 fsl,voltage = <MXS_VOLTAGE_HIGH>;
857 fsl,pull-up = <MXS_PULL_DISABLE>;
860 can0_pins_a: can0@0 {
863 MX28_PAD_GPMI_RDY2__CAN0_TX
864 MX28_PAD_GPMI_RDY3__CAN0_RX
866 fsl,drive-strength = <MXS_DRIVE_4mA>;
867 fsl,voltage = <MXS_VOLTAGE_HIGH>;
868 fsl,pull-up = <MXS_PULL_DISABLE>;
871 can1_pins_a: can1@0 {
874 MX28_PAD_GPMI_CE2N__CAN1_TX
875 MX28_PAD_GPMI_CE3N__CAN1_RX
877 fsl,drive-strength = <MXS_DRIVE_4mA>;
878 fsl,voltage = <MXS_VOLTAGE_HIGH>;
879 fsl,pull-up = <MXS_PULL_DISABLE>;
882 spi2_pins_a: spi2@0 {
885 MX28_PAD_SSP2_SCK__SSP2_SCK
886 MX28_PAD_SSP2_MOSI__SSP2_CMD
887 MX28_PAD_SSP2_MISO__SSP2_D0
888 MX28_PAD_SSP2_SS0__SSP2_D3
890 fsl,drive-strength = <MXS_DRIVE_8mA>;
891 fsl,voltage = <MXS_VOLTAGE_HIGH>;
892 fsl,pull-up = <MXS_PULL_ENABLE>;
895 spi3_pins_a: spi3@0 {
898 MX28_PAD_AUART2_RX__SSP3_D4
899 MX28_PAD_AUART2_TX__SSP3_D5
900 MX28_PAD_SSP3_SCK__SSP3_SCK
901 MX28_PAD_SSP3_MOSI__SSP3_CMD
902 MX28_PAD_SSP3_MISO__SSP3_D0
903 MX28_PAD_SSP3_SS0__SSP3_D3
905 fsl,drive-strength = <MXS_DRIVE_8mA>;
906 fsl,voltage = <MXS_VOLTAGE_HIGH>;
907 fsl,pull-up = <MXS_PULL_DISABLE>;
910 spi3_pins_b: spi3@1 {
913 MX28_PAD_SSP3_SCK__SSP3_SCK
914 MX28_PAD_SSP3_MOSI__SSP3_CMD
915 MX28_PAD_SSP3_MISO__SSP3_D0
916 MX28_PAD_SSP3_SS0__SSP3_D3
918 fsl,drive-strength = <MXS_DRIVE_8mA>;
919 fsl,voltage = <MXS_VOLTAGE_HIGH>;
920 fsl,pull-up = <MXS_PULL_ENABLE>;
923 usb0_pins_a: usb0@0 {
926 MX28_PAD_SSP2_SS2__USB0_OVERCURRENT
928 fsl,drive-strength = <MXS_DRIVE_12mA>;
929 fsl,voltage = <MXS_VOLTAGE_HIGH>;
930 fsl,pull-up = <MXS_PULL_DISABLE>;
933 usb0_pins_b: usb0@1 {
936 MX28_PAD_AUART1_CTS__USB0_OVERCURRENT
938 fsl,drive-strength = <MXS_DRIVE_12mA>;
939 fsl,voltage = <MXS_VOLTAGE_HIGH>;
940 fsl,pull-up = <MXS_PULL_DISABLE>;
943 usb1_pins_a: usb1@0 {
946 MX28_PAD_SSP2_SS1__USB1_OVERCURRENT
948 fsl,drive-strength = <MXS_DRIVE_12mA>;
949 fsl,voltage = <MXS_VOLTAGE_HIGH>;
950 fsl,pull-up = <MXS_PULL_DISABLE>;
953 usb0_id_pins_a: usb0id@0 {
956 MX28_PAD_AUART1_RTS__USB0_ID
958 fsl,drive-strength = <MXS_DRIVE_12mA>;
959 fsl,voltage = <MXS_VOLTAGE_HIGH>;
960 fsl,pull-up = <MXS_PULL_ENABLE>;
963 usb0_id_pins_b: usb0id1@0 {
966 MX28_PAD_PWM2__USB0_ID
968 fsl,drive-strength = <MXS_DRIVE_12mA>;
969 fsl,voltage = <MXS_VOLTAGE_HIGH>;
970 fsl,pull-up = <MXS_PULL_ENABLE>;
975 digctl: digctl@8001c000 {
976 compatible = "fsl,imx28-digctl", "fsl,imx23-digctl";
977 reg = <0x8001c000 0x2000>;
983 reg = <0x80022000 0x2000>;
987 dma_apbx: dma-apbx@80024000 {
988 compatible = "fsl,imx28-dma-apbx";
989 reg = <0x80024000 0x2000>;
990 interrupts = <78 79 66 0
994 interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
995 "saif0", "saif1", "i2c0", "i2c1",
996 "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
997 "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
1000 clocks = <&clks 26>;
1004 compatible = "fsl,imx28-dcp", "fsl,imx23-dcp";
1005 reg = <0x80028000 0x2000>;
1006 interrupts = <52 53 54>;
1011 reg = <0x8002a000 0x2000>;
1013 status = "disabled";
1016 ocotp: ocotp@8002c000 {
1017 compatible = "fsl,imx28-ocotp", "fsl,ocotp";
1018 #address-cells = <1>;
1020 reg = <0x8002c000 0x2000>;
1021 clocks = <&clks 25>;
1025 reg = <0x8002e000 0x2000>;
1026 status = "disabled";
1029 lcdif: lcdif@80030000 {
1030 compatible = "fsl,imx28-lcdif";
1031 reg = <0x80030000 0x2000>;
1033 clocks = <&clks 55>;
1034 dmas = <&dma_apbh 13>;
1036 status = "disabled";
1039 can0: can@80032000 {
1040 compatible = "fsl,imx28-flexcan";
1041 reg = <0x80032000 0x2000>;
1043 clocks = <&clks 58>, <&clks 58>;
1044 clock-names = "ipg", "per";
1045 status = "disabled";
1048 can1: can@80034000 {
1049 compatible = "fsl,imx28-flexcan";
1050 reg = <0x80034000 0x2000>;
1052 clocks = <&clks 59>, <&clks 59>;
1053 clock-names = "ipg", "per";
1054 status = "disabled";
1057 simdbg: simdbg@8003c000 {
1058 reg = <0x8003c000 0x200>;
1059 status = "disabled";
1062 simgpmisel: simgpmisel@8003c200 {
1063 reg = <0x8003c200 0x100>;
1064 status = "disabled";
1067 simsspsel: simsspsel@8003c300 {
1068 reg = <0x8003c300 0x100>;
1069 status = "disabled";
1072 simmemsel: simmemsel@8003c400 {
1073 reg = <0x8003c400 0x100>;
1074 status = "disabled";
1077 gpiomon: gpiomon@8003c500 {
1078 reg = <0x8003c500 0x100>;
1079 status = "disabled";
1082 simenet: simenet@8003c700 {
1083 reg = <0x8003c700 0x100>;
1084 status = "disabled";
1087 armjtag: armjtag@8003c800 {
1088 reg = <0x8003c800 0x100>;
1089 status = "disabled";
1094 compatible = "simple-bus";
1095 #address-cells = <1>;
1097 reg = <0x80040000 0x40000>;
1100 clks: clkctrl@80040000 {
1101 compatible = "fsl,imx28-clkctrl", "fsl,clkctrl";
1102 reg = <0x80040000 0x2000>;
1106 saif0: saif@80042000 {
1107 #sound-dai-cells = <0>;
1108 compatible = "fsl,imx28-saif";
1109 reg = <0x80042000 0x2000>;
1112 clocks = <&clks 53>;
1113 dmas = <&dma_apbx 4>;
1114 dma-names = "rx-tx";
1115 status = "disabled";
1118 power: power@80044000 {
1119 reg = <0x80044000 0x2000>;
1120 status = "disabled";
1123 saif1: saif@80046000 {
1124 #sound-dai-cells = <0>;
1125 compatible = "fsl,imx28-saif";
1126 reg = <0x80046000 0x2000>;
1128 clocks = <&clks 54>;
1129 dmas = <&dma_apbx 5>;
1130 dma-names = "rx-tx";
1131 status = "disabled";
1134 lradc: lradc@80050000 {
1135 compatible = "fsl,imx28-lradc";
1136 reg = <0x80050000 0x2000>;
1137 interrupts = <10 14 15 16 17 18 19
1139 status = "disabled";
1140 clocks = <&clks 41>;
1141 #io-channel-cells = <1>;
1144 spdif: spdif@80054000 {
1145 reg = <0x80054000 0x2000>;
1147 dmas = <&dma_apbx 2>;
1149 status = "disabled";
1152 mxs_rtc: rtc@80056000 {
1153 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
1154 reg = <0x80056000 0x2000>;
1158 i2c0: i2c@80058000 {
1159 #address-cells = <1>;
1161 compatible = "fsl,imx28-i2c";
1162 reg = <0x80058000 0x2000>;
1164 clock-frequency = <100000>;
1165 dmas = <&dma_apbx 6>;
1166 dma-names = "rx-tx";
1167 status = "disabled";
1170 i2c1: i2c@8005a000 {
1171 #address-cells = <1>;
1173 compatible = "fsl,imx28-i2c";
1174 reg = <0x8005a000 0x2000>;
1176 clock-frequency = <100000>;
1177 dmas = <&dma_apbx 7>;
1178 dma-names = "rx-tx";
1179 status = "disabled";
1183 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
1184 reg = <0x80064000 0x2000>;
1185 clocks = <&clks 44>;
1187 fsl,pwm-number = <8>;
1188 status = "disabled";
1191 timer: timrot@80068000 {
1192 compatible = "fsl,imx28-timrot", "fsl,timrot";
1193 reg = <0x80068000 0x2000>;
1194 interrupts = <48 49 50 51>;
1195 clocks = <&clks 26>;
1198 auart0: serial@8006a000 {
1199 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1200 reg = <0x8006a000 0x2000>;
1202 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
1203 dma-names = "rx", "tx";
1204 clocks = <&clks 45>;
1205 status = "disabled";
1208 auart1: serial@8006c000 {
1209 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1210 reg = <0x8006c000 0x2000>;
1212 dmas = <&dma_apbx 10>, <&dma_apbx 11>;
1213 dma-names = "rx", "tx";
1214 clocks = <&clks 45>;
1215 status = "disabled";
1218 auart2: serial@8006e000 {
1219 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1220 reg = <0x8006e000 0x2000>;
1222 dmas = <&dma_apbx 12>, <&dma_apbx 13>;
1223 dma-names = "rx", "tx";
1224 clocks = <&clks 45>;
1225 status = "disabled";
1228 auart3: serial@80070000 {
1229 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1230 reg = <0x80070000 0x2000>;
1232 dmas = <&dma_apbx 14>, <&dma_apbx 15>;
1233 dma-names = "rx", "tx";
1234 clocks = <&clks 45>;
1235 status = "disabled";
1238 auart4: serial@80072000 {
1239 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
1240 reg = <0x80072000 0x2000>;
1242 dmas = <&dma_apbx 0>, <&dma_apbx 1>;
1243 dma-names = "rx", "tx";
1244 clocks = <&clks 45>;
1245 status = "disabled";
1248 duart: serial@80074000 {
1249 compatible = "arm,pl011", "arm,primecell";
1250 reg = <0x80074000 0x1000>;
1252 clocks = <&clks 45>, <&clks 26>;
1253 clock-names = "uart", "apb_pclk";
1254 status = "disabled";
1257 usbphy0: usbphy@8007c000 {
1258 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1259 reg = <0x8007c000 0x2000>;
1260 clocks = <&clks 62>;
1261 status = "disabled";
1264 usbphy1: usbphy@8007e000 {
1265 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
1266 reg = <0x8007e000 0x2000>;
1267 clocks = <&clks 63>;
1268 status = "disabled";
1274 compatible = "simple-bus";
1275 #address-cells = <1>;
1277 reg = <0x80080000 0x80000>;
1280 usb0: usb@80080000 {
1281 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1282 reg = <0x80080000 0x10000>;
1284 clocks = <&clks 60>;
1285 fsl,usbphy = <&usbphy0>;
1286 status = "disabled";
1289 usb1: usb@80090000 {
1290 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
1291 reg = <0x80090000 0x10000>;
1293 clocks = <&clks 61>;
1294 fsl,usbphy = <&usbphy1>;
1296 status = "disabled";
1299 dflpt: dflpt@800c0000 {
1300 reg = <0x800c0000 0x10000>;
1301 status = "disabled";
1304 mac0: ethernet@800f0000 {
1305 compatible = "fsl,imx28-fec";
1306 reg = <0x800f0000 0x4000>;
1308 clocks = <&clks 57>, <&clks 57>, <&clks 64>;
1309 clock-names = "ipg", "ahb", "enet_out";
1310 status = "disabled";
1313 mac1: ethernet@800f4000 {
1314 compatible = "fsl,imx28-fec";
1315 reg = <0x800f4000 0x4000>;
1317 clocks = <&clks 57>, <&clks 57>;
1318 clock-names = "ipg", "ahb";
1319 status = "disabled";
1322 etn_switch: switch@800f8000 {
1323 reg = <0x800f8000 0x8000>;
1324 status = "disabled";
1329 compatible = "iio-hwmon";
1330 io-channels = <&lradc 8>;