2 * Copyright 2012 Freescale Semiconductor, Inc.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 #include "skeleton.dtsi"
13 #include "imx23-pinfunc.h"
16 interrupt-parent = <&icoll>;
34 compatible = "arm,arm926ej-s";
40 compatible = "simple-bus";
43 reg = <0x80000000 0x80000>;
47 compatible = "simple-bus";
50 reg = <0x80000000 0x40000>;
53 icoll: interrupt-controller@80000000 {
54 compatible = "fsl,imx23-icoll", "fsl,icoll";
56 #interrupt-cells = <1>;
57 reg = <0x80000000 0x2000>;
60 dma_apbh: dma-apbh@80004000 {
61 compatible = "fsl,imx23-dma-apbh";
62 reg = <0x80004000 0x2000>;
63 interrupts = <0 14 20 0
65 interrupt-names = "empty", "ssp0", "ssp1", "empty",
66 "gpmi0", "gpmi1", "gpmi2", "gpmi3";
73 reg = <0x80008000 0x2000>;
78 compatible = "fsl,imx23-gpmi-nand";
81 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
82 reg-names = "gpmi-nand", "bch";
84 interrupt-names = "bch";
86 clock-names = "gpmi_io";
93 reg = <0x80010000 0x2000>;
102 reg = <0x80014000 0x2000>;
107 #address-cells = <1>;
109 compatible = "fsl,imx23-pinctrl", "simple-bus";
110 reg = <0x80018000 0x2000>;
113 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
118 interrupt-controller;
119 #interrupt-cells = <2>;
123 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
128 interrupt-controller;
129 #interrupt-cells = <2>;
133 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
138 interrupt-controller;
139 #interrupt-cells = <2>;
142 duart_pins_a: duart@0 {
145 MX23_PAD_PWM0__DUART_RX
146 MX23_PAD_PWM1__DUART_TX
148 fsl,drive-strength = <MXS_DRIVE_4mA>;
149 fsl,voltage = <MXS_VOLTAGE_HIGH>;
150 fsl,pull-up = <MXS_PULL_DISABLE>;
153 auart0_pins_a: auart0@0 {
156 MX23_PAD_AUART1_RX__AUART1_RX
157 MX23_PAD_AUART1_TX__AUART1_TX
158 MX23_PAD_AUART1_CTS__AUART1_CTS
159 MX23_PAD_AUART1_RTS__AUART1_RTS
161 fsl,drive-strength = <MXS_DRIVE_4mA>;
162 fsl,voltage = <MXS_VOLTAGE_HIGH>;
163 fsl,pull-up = <MXS_PULL_DISABLE>;
166 auart0_2pins_a: auart0-2pins@0 {
169 MX23_PAD_I2C_SCL__AUART1_TX
170 MX23_PAD_I2C_SDA__AUART1_RX
172 fsl,drive-strength = <MXS_DRIVE_4mA>;
173 fsl,voltage = <MXS_VOLTAGE_HIGH>;
174 fsl,pull-up = <MXS_PULL_DISABLE>;
177 auart1_2pins_a: auart1-2pins@0 {
180 MX23_PAD_GPMI_D14__AUART2_RX
181 MX23_PAD_GPMI_D15__AUART2_TX
183 fsl,drive-strength = <MXS_DRIVE_4mA>;
184 fsl,voltage = <MXS_VOLTAGE_HIGH>;
185 fsl,pull-up = <MXS_PULL_DISABLE>;
188 gpmi_pins_a: gpmi-nand@0 {
191 MX23_PAD_GPMI_D00__GPMI_D00
192 MX23_PAD_GPMI_D01__GPMI_D01
193 MX23_PAD_GPMI_D02__GPMI_D02
194 MX23_PAD_GPMI_D03__GPMI_D03
195 MX23_PAD_GPMI_D04__GPMI_D04
196 MX23_PAD_GPMI_D05__GPMI_D05
197 MX23_PAD_GPMI_D06__GPMI_D06
198 MX23_PAD_GPMI_D07__GPMI_D07
199 MX23_PAD_GPMI_CLE__GPMI_CLE
200 MX23_PAD_GPMI_ALE__GPMI_ALE
201 MX23_PAD_GPMI_RDY0__GPMI_RDY0
202 MX23_PAD_GPMI_RDY1__GPMI_RDY1
203 MX23_PAD_GPMI_WPN__GPMI_WPN
204 MX23_PAD_GPMI_WRN__GPMI_WRN
205 MX23_PAD_GPMI_RDN__GPMI_RDN
206 MX23_PAD_GPMI_CE1N__GPMI_CE1N
207 MX23_PAD_GPMI_CE0N__GPMI_CE0N
209 fsl,drive-strength = <MXS_DRIVE_4mA>;
210 fsl,voltage = <MXS_VOLTAGE_HIGH>;
211 fsl,pull-up = <MXS_PULL_DISABLE>;
214 gpmi_pins_fixup: gpmi-pins-fixup {
216 MX23_PAD_GPMI_WPN__GPMI_WPN
217 MX23_PAD_GPMI_WRN__GPMI_WRN
218 MX23_PAD_GPMI_RDN__GPMI_RDN
220 fsl,drive-strength = <MXS_DRIVE_12mA>;
223 mmc0_4bit_pins_a: mmc0-4bit@0 {
226 MX23_PAD_SSP1_DATA0__SSP1_DATA0
227 MX23_PAD_SSP1_DATA1__SSP1_DATA1
228 MX23_PAD_SSP1_DATA2__SSP1_DATA2
229 MX23_PAD_SSP1_DATA3__SSP1_DATA3
230 MX23_PAD_SSP1_CMD__SSP1_CMD
231 MX23_PAD_SSP1_SCK__SSP1_SCK
233 fsl,drive-strength = <MXS_DRIVE_8mA>;
234 fsl,voltage = <MXS_VOLTAGE_HIGH>;
235 fsl,pull-up = <MXS_PULL_ENABLE>;
238 mmc0_8bit_pins_a: mmc0-8bit@0 {
241 MX23_PAD_SSP1_DATA0__SSP1_DATA0
242 MX23_PAD_SSP1_DATA1__SSP1_DATA1
243 MX23_PAD_SSP1_DATA2__SSP1_DATA2
244 MX23_PAD_SSP1_DATA3__SSP1_DATA3
245 MX23_PAD_GPMI_D08__SSP1_DATA4
246 MX23_PAD_GPMI_D09__SSP1_DATA5
247 MX23_PAD_GPMI_D10__SSP1_DATA6
248 MX23_PAD_GPMI_D11__SSP1_DATA7
249 MX23_PAD_SSP1_CMD__SSP1_CMD
250 MX23_PAD_SSP1_DETECT__SSP1_DETECT
251 MX23_PAD_SSP1_SCK__SSP1_SCK
253 fsl,drive-strength = <MXS_DRIVE_8mA>;
254 fsl,voltage = <MXS_VOLTAGE_HIGH>;
255 fsl,pull-up = <MXS_PULL_ENABLE>;
258 mmc0_pins_fixup: mmc0-pins-fixup {
260 MX23_PAD_SSP1_DETECT__SSP1_DETECT
261 MX23_PAD_SSP1_SCK__SSP1_SCK
263 fsl,pull-up = <MXS_PULL_DISABLE>;
266 mmc1_4bit_pins_a: mmc1-4bit@0 {
269 MX23_PAD_GPMI_D00__SSP2_DATA0
270 MX23_PAD_GPMI_D01__SSP2_DATA1
271 MX23_PAD_GPMI_D02__SSP2_DATA2
272 MX23_PAD_GPMI_D03__SSP2_DATA3
273 MX23_PAD_GPMI_RDY1__SSP2_CMD
274 MX23_PAD_GPMI_WRN__SSP2_SCK
276 fsl,drive-strength = <MXS_DRIVE_8mA>;
277 fsl,voltage = <MXS_VOLTAGE_HIGH>;
278 fsl,pull-up = <MXS_PULL_ENABLE>;
281 mmc1_8bit_pins_a: mmc1-8bit@0 {
284 MX23_PAD_GPMI_D00__SSP2_DATA0
285 MX23_PAD_GPMI_D01__SSP2_DATA1
286 MX23_PAD_GPMI_D02__SSP2_DATA2
287 MX23_PAD_GPMI_D03__SSP2_DATA3
288 MX23_PAD_GPMI_D04__SSP2_DATA4
289 MX23_PAD_GPMI_D05__SSP2_DATA5
290 MX23_PAD_GPMI_D06__SSP2_DATA6
291 MX23_PAD_GPMI_D07__SSP2_DATA7
292 MX23_PAD_GPMI_RDY1__SSP2_CMD
293 MX23_PAD_GPMI_WRN__SSP2_SCK
295 fsl,drive-strength = <MXS_DRIVE_8mA>;
296 fsl,voltage = <MXS_VOLTAGE_HIGH>;
297 fsl,pull-up = <MXS_PULL_ENABLE>;
300 pwm2_pins_a: pwm2@0 {
305 fsl,drive-strength = <MXS_DRIVE_4mA>;
306 fsl,voltage = <MXS_VOLTAGE_HIGH>;
307 fsl,pull-up = <MXS_PULL_DISABLE>;
310 lcdif_24bit_pins_a: lcdif-24bit@0 {
313 MX23_PAD_LCD_D00__LCD_D00
314 MX23_PAD_LCD_D01__LCD_D01
315 MX23_PAD_LCD_D02__LCD_D02
316 MX23_PAD_LCD_D03__LCD_D03
317 MX23_PAD_LCD_D04__LCD_D04
318 MX23_PAD_LCD_D05__LCD_D05
319 MX23_PAD_LCD_D06__LCD_D06
320 MX23_PAD_LCD_D07__LCD_D07
321 MX23_PAD_LCD_D08__LCD_D08
322 MX23_PAD_LCD_D09__LCD_D09
323 MX23_PAD_LCD_D10__LCD_D10
324 MX23_PAD_LCD_D11__LCD_D11
325 MX23_PAD_LCD_D12__LCD_D12
326 MX23_PAD_LCD_D13__LCD_D13
327 MX23_PAD_LCD_D14__LCD_D14
328 MX23_PAD_LCD_D15__LCD_D15
329 MX23_PAD_LCD_D16__LCD_D16
330 MX23_PAD_LCD_D17__LCD_D17
331 MX23_PAD_GPMI_D08__LCD_D18
332 MX23_PAD_GPMI_D09__LCD_D19
333 MX23_PAD_GPMI_D10__LCD_D20
334 MX23_PAD_GPMI_D11__LCD_D21
335 MX23_PAD_GPMI_D12__LCD_D22
336 MX23_PAD_GPMI_D13__LCD_D23
337 MX23_PAD_LCD_DOTCK__LCD_DOTCK
338 MX23_PAD_LCD_ENABLE__LCD_ENABLE
339 MX23_PAD_LCD_HSYNC__LCD_HSYNC
340 MX23_PAD_LCD_VSYNC__LCD_VSYNC
342 fsl,drive-strength = <MXS_DRIVE_4mA>;
343 fsl,voltage = <MXS_VOLTAGE_HIGH>;
344 fsl,pull-up = <MXS_PULL_DISABLE>;
347 spi2_pins_a: spi2@0 {
350 MX23_PAD_GPMI_WRN__SSP2_SCK
351 MX23_PAD_GPMI_RDY1__SSP2_CMD
352 MX23_PAD_GPMI_D00__SSP2_DATA0
353 MX23_PAD_GPMI_D03__SSP2_DATA3
355 fsl,drive-strength = <MXS_DRIVE_8mA>;
356 fsl,voltage = <MXS_VOLTAGE_HIGH>;
357 fsl,pull-up = <MXS_PULL_ENABLE>;
363 MX23_PAD_I2C_SCL__I2C_SCL
364 MX23_PAD_I2C_SDA__I2C_SDA
366 fsl,drive-strength = <MXS_DRIVE_8mA>;
367 fsl,voltage = <MXS_VOLTAGE_HIGH>;
368 fsl,pull-up = <MXS_PULL_ENABLE>;
374 MX23_PAD_LCD_ENABLE__I2C_SCL
375 MX23_PAD_LCD_HSYNC__I2C_SDA
377 fsl,drive-strength = <MXS_DRIVE_8mA>;
378 fsl,voltage = <MXS_VOLTAGE_HIGH>;
379 fsl,pull-up = <MXS_PULL_ENABLE>;
385 MX23_PAD_SSP1_DATA1__I2C_SCL
386 MX23_PAD_SSP1_DATA2__I2C_SDA
388 fsl,drive-strength = <MXS_DRIVE_8mA>;
389 fsl,voltage = <MXS_VOLTAGE_HIGH>;
390 fsl,pull-up = <MXS_PULL_ENABLE>;
395 compatible = "fsl,imx23-digctl";
396 reg = <0x8001c000 2000>;
401 reg = <0x80020000 0x2000>;
405 dma_apbx: dma-apbx@80024000 {
406 compatible = "fsl,imx23-dma-apbx";
407 reg = <0x80024000 0x2000>;
408 interrupts = <7 5 9 26
412 interrupt-names = "audio-adc", "audio-dac", "spdif-tx", "i2c",
413 "saif0", "empty", "auart0-rx", "auart0-tx",
414 "auart1-rx", "auart1-tx", "saif1", "empty",
415 "empty", "empty", "empty", "empty";
422 compatible = "fsl,imx23-dcp";
423 reg = <0x80028000 0x2000>;
424 interrupts = <53 54>;
429 reg = <0x8002a000 0x2000>;
434 compatible = "fsl,imx23-ocotp", "fsl,ocotp";
435 #address-cells = <1>;
437 reg = <0x8002c000 0x2000>;
442 reg = <0x8002e000 0x2000>;
447 compatible = "fsl,imx23-lcdif";
448 reg = <0x80030000 2000>;
449 interrupts = <46 45>;
455 reg = <0x80034000 0x2000>;
458 dmas = <&dma_apbh 2>;
464 reg = <0x80038000 0x2000>;
470 compatible = "simple-bus";
471 #address-cells = <1>;
473 reg = <0x80040000 0x40000>;
476 clks: clkctrl@80040000 {
477 compatible = "fsl,imx23-clkctrl", "fsl,clkctrl";
478 reg = <0x80040000 0x2000>;
482 saif0: saif@80042000 {
483 reg = <0x80042000 0x2000>;
484 dmas = <&dma_apbx 4>;
490 reg = <0x80044000 0x2000>;
494 saif1: saif@80046000 {
495 reg = <0x80046000 0x2000>;
496 dmas = <&dma_apbx 10>;
502 reg = <0x80048000 0x2000>;
503 dmas = <&dma_apbx 1>;
509 reg = <0x8004c000 0x2000>;
510 dmas = <&dma_apbx 0>;
515 lradc: lradc@80050000 {
516 compatible = "fsl,imx23-lradc";
517 reg = <0x80050000 0x2000>;
518 interrupts = <36 37 38 39 40 41 42 43 44>;
521 #io-channel-cells = <1>;
525 reg = <0x80054000 2000>;
526 dmas = <&dma_apbx 2>;
532 #address-cells = <1>;
534 compatible = "fsl,imx23-i2c";
535 reg = <0x80058000 0x2000>;
537 clock-frequency = <100000>;
538 dmas = <&dma_apbx 3>;
544 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
545 reg = <0x8005c000 0x2000>;
550 compatible = "fsl,imx23-pwm";
551 reg = <0x80064000 0x2000>;
554 fsl,pwm-number = <5>;
559 compatible = "fsl,imx23-timrot", "fsl,timrot";
560 reg = <0x80068000 0x2000>;
561 interrupts = <28 29 30 31>;
565 auart0: serial@8006c000 {
566 compatible = "fsl,imx23-auart";
567 reg = <0x8006c000 0x2000>;
570 dmas = <&dma_apbx 6>, <&dma_apbx 7>;
571 dma-names = "rx", "tx";
575 auart1: serial@8006e000 {
576 compatible = "fsl,imx23-auart";
577 reg = <0x8006e000 0x2000>;
580 dmas = <&dma_apbx 8>, <&dma_apbx 9>;
581 dma-names = "rx", "tx";
585 duart: serial@80070000 {
586 compatible = "arm,pl011", "arm,primecell";
587 reg = <0x80070000 0x2000>;
589 clocks = <&clks 32>, <&clks 16>;
590 clock-names = "uart", "apb_pclk";
594 usbphy0: usbphy@8007c000 {
595 compatible = "fsl,imx23-usbphy";
596 reg = <0x8007c000 0x2000>;
604 compatible = "simple-bus";
605 #address-cells = <1>;
607 reg = <0x80080000 0x80000>;
611 compatible = "fsl,imx23-usb", "fsl,imx27-usb";
612 reg = <0x80080000 0x40000>;
614 fsl,usbphy = <&usbphy0>;
621 compatible = "iio-hwmon";
622 io-channels = <&lradc 8>;