1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for ITian Square One SQ201 NAS
9 #include <dt-bindings/input/input.h>
12 model = "ITian Square One SQ201";
13 compatible = "itian,sq201", "cortina,gemini";
18 device_type = "memory";
19 reg = <0x00000000 0x8000000>;
23 bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
28 compatible = "gpio-keys";
33 debounce_interval = <50>;
35 linux,code = <KEY_SETUP>;
36 label = "factory reset";
37 /* Conflict with NAND flash */
38 gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
43 compatible = "gpio-leds";
45 label = "sq201:green:info";
46 /* Conflict with parallel flash */
47 gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
49 linux,default-trigger = "heartbeat";
52 label = "sq201:green:usb";
53 /* Conflict with parallel and NAND flash */
54 gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
55 default-state = "off";
56 linux,default-trigger = "usb-host";
63 * Flash access can be enabled, with the side effect
64 * of disabling access to GPIO LED on GPIO0[20] which
65 * reuse one of the parallel flash chip select lines.
66 * Also the default firmware on the machine has the
67 * problem that since it uses the flash, the two LEDS
68 * on the right become numb.
70 /* status = "okay"; */
72 reg = <0x30000000 0x01000000>;
75 compatible = "redboot-fis";
76 /* Eraseblock at 0xfe0000 */
77 fis-index-block = <0x1fc>;
81 syscon: syscon@40000000 {
84 * gpio0fgrp cover line 18 used by reset button
85 * gpio0ggrp cover line 20 used by info LED
86 * gpio0kgrp cover line 31 used by USB LED
88 gpio0_default_pins: pinctrl-gpio0 {
100 cortina,gemini-ata-muxmode = <0>;
101 cortina,gemini-enable-sata-bridge;
105 gpio0: gpio@4d000000 {
106 pinctrl-names = "default";
107 pinctrl-0 = <&gpio0_default_pins>;
112 interrupt-map-mask = <0xf800 0 0 7>;
114 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
115 <0x4800 0 0 2 &pci_intc 1>,
116 <0x4800 0 0 3 &pci_intc 2>,
117 <0x4800 0 0 4 &pci_intc 3>,
118 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
119 <0x5000 0 0 2 &pci_intc 2>,
120 <0x5000 0 0 3 &pci_intc 3>,
121 <0x5000 0 0 4 &pci_intc 0>,
122 <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
123 <0x5800 0 0 2 &pci_intc 3>,
124 <0x5800 0 0 3 &pci_intc 0>,
125 <0x5800 0 0 4 &pci_intc 1>,
126 <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
127 <0x6000 0 0 2 &pci_intc 0>,
128 <0x6000 0 0 3 &pci_intc 1>,
129 <0x6000 0 0 4 &pci_intc 2>;