1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for the Storm Semiconductor SL93512R_BRD
4 * Gemini reference design, also initially called
5 * "Gemini324 EV-Board" before Storm acquired Storlink Semiconductor.
6 * The series were later acquired by Cortina Systems.
11 #include "gemini.dtsi"
12 #include <dt-bindings/input/input.h>
15 model = "Storlink Semiconductor Gemini324 EV-Board / Storm Semiconductor SL93512R_BRD";
16 compatible = "storlink,gemini324", "storm,sl93512r", "cortina,gemini";
21 /* 64 MB Samsung K4H511638B */
22 device_type = "memory";
23 reg = <0x00000000 0x4000000>;
27 bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait";
32 compatible = "gpio-keys";
35 debounce-interval = <50>;
37 linux,code = <KEY_WPS_BUTTON>;
39 /* Conflict with NAND flash */
40 gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
44 debounce-interval = <50>;
46 linux,code = <KEY_SETUP>;
47 label = "factory reset";
48 /* Conflict with NAND flash */
49 gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
54 compatible = "gpio-leds";
56 label = "sq201:green:harddisk";
57 /* Conflict with LCD (no problem) */
58 gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
59 default-state = "off";
60 linux,default-trigger = "disk-activity";
63 label = "sq201:green:wireless";
64 /* Conflict with NAND flash CE0 (no problem) */
65 gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
67 linux,default-trigger = "heartbeat";
72 compatible = "virtual,mdio-gpio";
73 /* Uses MDC and MDIO */
74 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
75 <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
79 /* This is a Marvell 88E1111 ethernet transciever */
80 phy0: ethernet-phy@1 {
86 compatible = "spi-gpio";
89 /* Check pin collisions */
90 gpio-sck = <&gpio1 28 GPIO_ACTIVE_HIGH>;
91 gpio-miso = <&gpio1 30 GPIO_ACTIVE_HIGH>;
92 gpio-mosi = <&gpio1 29 GPIO_ACTIVE_HIGH>;
93 cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
94 num-chipselects = <1>;
97 compatible = "vitesse,vsc7385";
99 /* Specified for 2.5 MHz or below */
100 spi-max-frequency = <2500000>;
105 #address-cells = <1>;
144 reg = <0x30000000 0x01000000>;
148 reg = <0x00000000 0x00020000>;
153 reg = <0x00020000 0x00300000>;
157 reg = <0x00320000 0x00600000>;
160 label = "Application";
161 reg = <0x00920000 0x00600000>;
165 reg = <0x00f20000 0x00020000>;
170 reg = <0x00f40000 0x000a0000>;
174 label = "FIS directory";
175 reg = <0x00fe0000 0x00020000>;
180 syscon: syscon@40000000 {
183 * gpio0egrp cover line 16 used by HD LED
184 * gpio0fgrp cover line 17, 18 used by wireless LED and reset button
185 * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
186 * gpio0kgrp cover line 31 used by USB LED
188 gpio0_default_pins: pinctrl-gpio0 {
191 groups = "gpio0egrp",
197 * gpio1dgrp cover lines used by SPI for
198 * the Vitesse chip (28-31)
200 gpio1_default_pins: pinctrl-gpio1 {
203 groups = "gpio1dgrp";
209 groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
211 /* Control pad skew comes from sl_switch.c in the vendor code */
213 pins = "P10 GMAC1 TXC";
217 pins = "V11 GMAC1 TXEN";
221 pins = "T11 GMAC1 RXC";
225 pins = "U11 GMAC1 RXDV";
229 pins = "V7 GMAC0 TXC";
233 pins = "P8 GMAC0 TXEN";
234 skew-delay = <7>; /* 5 at another place? */
237 pins = "T8 GMAC0 RXC";
241 pins = "R8 GMAC0 RXDV";
245 /* The data lines all have default skew */
246 pins = "U8 GMAC0 RXD0", "V8 GMAC0 RXD1",
247 "P9 GMAC0 RXD2", "R9 GMAC0 RXD3",
248 "R11 GMAC1 RXD0", "P11 GMAC1 RXD1",
249 "V12 GMAC1 RXD2", "U12 GMAC1 RXD3",
250 "R10 GMAC1 TXD0", "T10 GMAC1 TXD1",
251 "U10 GMAC1 TXD2", "V10 GMAC1 TXD3";
254 /* Appears in sl351x_gmac.c in the vendor code */
256 pins = "U7 GMAC0 TXD0", "T7 GMAC0 TXD1",
257 "R7 GMAC0 TXD2", "P7 GMAC0 TXD3";
264 /* Both interfaces brought out on SATA connectors */
265 sata: sata@46000000 {
266 cortina,gemini-ata-muxmode = <0>;
267 cortina,gemini-enable-sata-bridge;
271 gpio0: gpio@4d000000 {
272 pinctrl-names = "default";
273 pinctrl-0 = <&gpio0_default_pins>;
276 gpio1: gpio@4e000000 {
277 pinctrl-names = "default";
278 pinctrl-0 = <&gpio1_default_pins>;
283 interrupt-map-mask = <0xf800 0 0 7>;
285 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
286 <0x4800 0 0 2 &pci_intc 1>,
287 <0x4800 0 0 3 &pci_intc 2>,
288 <0x4800 0 0 4 &pci_intc 3>,
289 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
290 <0x5000 0 0 2 &pci_intc 2>,
291 <0x5000 0 0 3 &pci_intc 3>,
292 <0x5000 0 0 4 &pci_intc 0>,
293 <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
294 <0x5800 0 0 2 &pci_intc 3>,
295 <0x5800 0 0 3 &pci_intc 0>,
296 <0x5800 0 0 4 &pci_intc 1>,
297 <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
298 <0x6000 0 0 2 &pci_intc 0>,
299 <0x6000 0 0 3 &pci_intc 1>,
300 <0x6000 0 0 4 &pci_intc 2>;
308 phy-handle = <&phy0>;