2 * SAMSUNG EXYNOS5440 SoC device tree source
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <dt-bindings/clock/exynos5440.h>
15 compatible = "samsung,exynos5440", "samsung,exynos5";
17 interrupt-parent = <&gic>;
25 tmuctrl0 = &tmuctrl_0;
26 tmuctrl1 = &tmuctrl_1;
27 tmuctrl2 = &tmuctrl_2;
30 clock: clock-controller@160000 {
31 compatible = "samsung,exynos5440-clock";
32 reg = <0x160000 0x1000>;
36 gic: interrupt-controller@2E0000 {
37 compatible = "arm,cortex-a15-gic";
38 #interrupt-cells = <3>;
40 reg = <0x2E1000 0x1000>,
44 interrupts = <1 9 0xf04>;
53 compatible = "arm,cortex-a15";
58 compatible = "arm,cortex-a15";
63 compatible = "arm,cortex-a15";
68 compatible = "arm,cortex-a15";
74 compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";
75 interrupts = <0 52 4>,
82 compatible = "arm,cortex-a15-timer",
84 interrupts = <1 13 0xf08>,
88 clock-frequency = <50000000>;
92 compatible = "samsung,exynos5440-cpufreq";
93 reg = <0x160000 0x1000>;
94 interrupts = <0 57 0>;
108 serial_0: serial@B0000 {
109 compatible = "samsung,exynos4210-uart";
110 reg = <0xB0000 0x1000>;
111 interrupts = <0 2 0>;
112 clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
113 clock-names = "uart", "clk_uart_baud0";
116 serial_1: serial@C0000 {
117 compatible = "samsung,exynos4210-uart";
118 reg = <0xC0000 0x1000>;
119 interrupts = <0 3 0>;
120 clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
121 clock-names = "uart", "clk_uart_baud0";
125 compatible = "samsung,exynos5440-spi";
126 reg = <0xD0000 0x100>;
127 interrupts = <0 4 0>;
128 #address-cells = <1>;
130 samsung,spi-src-clk = <0>;
132 clocks = <&clock CLK_B_125>, <&clock CLK_SPI_BAUD>;
133 clock-names = "spi", "spi_busclk0";
136 pin_ctrl: pinctrl@E0000 {
137 compatible = "samsung,exynos5440-pinctrl";
138 reg = <0xE0000 0x1000>;
139 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
140 <0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
141 interrupt-controller;
142 #interrupt-cells = <2>;
146 samsung,exynos5440-pin-function = <1>;
150 samsung,exynos5440-pin-function = <2>;
154 samsung,exynos5440-pin-function = <3>;
158 samsung,exynos5440-pin-function = <4>;
163 compatible = "samsung,exynos5440-i2c";
164 reg = <0xF0000 0x1000>;
165 interrupts = <0 5 0>;
166 #address-cells = <1>;
168 clocks = <&clock CLK_B_125>;
173 compatible = "samsung,exynos5440-i2c";
174 reg = <0x100000 0x1000>;
175 interrupts = <0 6 0>;
176 #address-cells = <1>;
178 clocks = <&clock CLK_B_125>;
183 compatible = "samsung,s3c2410-wdt";
184 reg = <0x110000 0x1000>;
185 interrupts = <0 1 0>;
186 clocks = <&clock CLK_B_125>;
187 clock-names = "watchdog";
190 gmac: ethernet@00230000 {
191 compatible = "snps,dwmac-3.70a";
192 reg = <0x00230000 0x8000>;
193 interrupt-parent = <&gic>;
194 interrupts = <0 31 4>;
195 interrupt-names = "macirq";
197 clocks = <&clock CLK_GMAC0>;
198 clock-names = "stmmaceth";
202 #address-cells = <1>;
204 compatible = "simple-bus";
205 interrupt-parent = <&gic>;
210 compatible = "samsung,s3c6410-rtc";
211 reg = <0x130000 0x1000>;
212 interrupts = <0 17 0>, <0 16 0>;
213 clocks = <&clock CLK_B_125>;
217 tmuctrl_0: tmuctrl@160118 {
218 compatible = "samsung,exynos5440-tmu";
219 reg = <0x160118 0x230>, <0x160368 0x10>;
220 interrupts = <0 58 0>;
221 clocks = <&clock CLK_B_125>;
222 clock-names = "tmu_apbif";
223 #include "exynos5440-tmu-sensor-conf.dtsi"
226 tmuctrl_1: tmuctrl@16011C {
227 compatible = "samsung,exynos5440-tmu";
228 reg = <0x16011C 0x230>, <0x160368 0x10>;
229 interrupts = <0 58 0>;
230 clocks = <&clock CLK_B_125>;
231 clock-names = "tmu_apbif";
232 #include "exynos5440-tmu-sensor-conf.dtsi"
235 tmuctrl_2: tmuctrl@160120 {
236 compatible = "samsung,exynos5440-tmu";
237 reg = <0x160120 0x230>, <0x160368 0x10>;
238 interrupts = <0 58 0>;
239 clocks = <&clock CLK_B_125>;
240 clock-names = "tmu_apbif";
241 #include "exynos5440-tmu-sensor-conf.dtsi"
245 cpu0_thermal: cpu0-thermal {
246 thermal-sensors = <&tmuctrl_0>;
247 #include "exynos5440-trip-points.dtsi"
249 cpu1_thermal: cpu1-thermal {
250 thermal-sensors = <&tmuctrl_1>;
251 #include "exynos5440-trip-points.dtsi"
253 cpu2_thermal: cpu2-thermal {
254 thermal-sensors = <&tmuctrl_2>;
255 #include "exynos5440-trip-points.dtsi"
260 compatible = "snps,exynos5440-ahci";
261 reg = <0x210000 0x10000>;
262 interrupts = <0 30 0>;
263 clocks = <&clock CLK_SATA>;
264 clock-names = "sata";
268 compatible = "samsung,exynos5440-ohci";
269 reg = <0x220000 0x1000>;
270 interrupts = <0 29 0>;
271 clocks = <&clock CLK_USB>;
272 clock-names = "usbhost";
276 compatible = "samsung,exynos5440-ehci";
277 reg = <0x221000 0x1000>;
278 interrupts = <0 29 0>;
279 clocks = <&clock CLK_USB>;
280 clock-names = "usbhost";
283 pcie_0: pcie@290000 {
284 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
285 reg = <0x290000 0x1000
288 interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
289 clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>;
290 clock-names = "pcie", "pcie_bus";
291 #address-cells = <3>;
294 ranges = <0x00000800 0 0x40000000 0x40000000 0 0x00001000 /* configuration space */
295 0x81000000 0 0 0x40001000 0 0x00010000 /* downstream I/O */
296 0x82000000 0 0x40011000 0x40011000 0 0x1ffef000>; /* non-prefetchable memory */
297 #interrupt-cells = <1>;
298 interrupt-map-mask = <0 0 0 0>;
299 interrupt-map = <0x0 0 &gic 53>;
304 pcie_1: pcie@2a0000 {
305 compatible = "samsung,exynos5440-pcie", "snps,dw-pcie";
306 reg = <0x2a0000 0x1000
309 interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
310 clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>;
311 clock-names = "pcie", "pcie_bus";
312 #address-cells = <3>;
315 ranges = <0x00000800 0 0x60000000 0x60000000 0 0x00001000 /* configuration space */
316 0x81000000 0 0 0x60001000 0 0x00010000 /* downstream I/O */
317 0x82000000 0 0x60011000 0x60011000 0 0x1ffef000>; /* non-prefetchable memory */
318 #interrupt-cells = <1>;
319 interrupt-map-mask = <0 0 0 0>;
320 interrupt-map = <0x0 0 &gic 56>;