arch/arm/boot/dts/exynos5422-odroidxu4.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Hardkernel Odroid XU4 board device tree source
   4  *
   5  * Copyright (c) 2015 Krzysztof Kozlowski
   6  * Copyright (c) 2014 Collabora Ltd.
   7  * Copyright (c) 2013-2015 Samsung Electronics Co., Ltd.
   8  *              http://www.samsung.com
   9  */
  10
  11 /dts-v1/;
  12 #include <dt-bindings/leds/common.h>
  13 #include <dt-bindings/sound/samsung-i2s.h>
  14 #include "exynos5422-odroidxu3-common.dtsi"
  15
  16 / {
  17         model = "Hardkernel Odroid XU4";
  18         compatible = "hardkernel,odroid-xu4", "samsung,exynos5800", \
  19                      "samsung,exynos5";
  20
  21         led-controller {
  22                 compatible = "pwm-leds";
  23
  24                 led-1 {
  25                         function = LED_FUNCTION_HEARTBEAT;
  26                         color = <LED_COLOR_ID_BLUE>;
  27                         pwms = <&pwm 2 2000000 0>;
  28                         pwm-names = "pwm2";
  29                         max-brightness = <255>;
  30                         linux,default-trigger = "heartbeat";
  31                 };
  32         };
  33
  34         sound: sound {
  35                 compatible = "samsung,odroid-xu3-audio";
  36                 model = "Odroid-XU4";
  37
  38                 samsung,audio-routing = "I2S Playback", "Mixer DAI TX";
  39
  40                 cpu {
  41                         sound-dai = <&i2s0 0>, <&i2s0 1>;
  42                 };
  43
  44                 codec {
  45                         sound-dai = <&hdmi>;
  46                 };
  47         };
  48 };
  49
  50 &i2s0 {
  51         status = "okay";
  52
  53         assigned-clocks = <&clock CLK_MOUT_EPLL>,
  54                           <&clock CLK_MOUT_MAU_EPLL>,
  55                           <&clock CLK_MOUT_USER_MAU_EPLL>,
  56                           <&clock_audss EXYNOS_MOUT_AUDSS>,
  57                           <&clock_audss EXYNOS_MOUT_I2S>,
  58                           <&i2s0 CLK_I2S_RCLK_SRC>,
  59                           <&clock_audss EXYNOS_DOUT_SRP>,
  60                           <&clock_audss EXYNOS_DOUT_AUD_BUS>,
  61                           <&clock_audss EXYNOS_DOUT_I2S>;
  62
  63         assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
  64                                  <&clock CLK_MOUT_EPLL>,
  65                                  <&clock CLK_MOUT_MAU_EPLL>,
  66                                  <&clock CLK_MAU_EPLL>,
  67                                  <&clock_audss EXYNOS_MOUT_AUDSS>,
  68                                  <&clock_audss EXYNOS_SCLK_I2S>;
  69
  70         assigned-clock-rates = <0>,
  71                                <0>,
  72                                <0>,
  73                                <0>,
  74                                <0>,
  75                                <0>,
  76                                <196608001>,
  77                                <(196608002 / 2)>,
  78                                <196608000>;
  79 };
  80
  81 &pwm {
  82         /*
  83          * PWM 0 -- fan
  84          * PWM 2 -- Blue LED
  85          */
  86         pinctrl-0 = <&pwm0_out &pwm2_out>;
  87         pinctrl-names = "default";
  88         samsung,pwm-outputs = <0>, <2>;
  89         status = "okay";
  90 };
  91
  92 &usbdrd_dwc3_1 {
  93         dr_mode = "host";
  94 };