1 // SPDX-License-Identifier: GPL-2.0
3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
7 #include <dt-bindings/sound/samsung-i2s.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include "exynos4412.dtsi"
11 #include "exynos4412-ppmu-common.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include "exynos-mfc-reserved-memory.dtsi"
17 stdout-path = &serial_1;
21 compatible = "samsung,secure-firmware";
22 reg = <0x0204F000 0x1000>;
26 compatible = "gpio-keys";
27 pinctrl-names = "default";
28 pinctrl-0 = <&gpio_power_key>;
31 gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_POWER>;
34 debounce-interval = <10>;
40 compatible = "hardkernel,odroid-xu4-audio";
43 sound-dai = <&i2s0 0>;
47 sound-dai = <&hdmi>, <&max98090>;
52 pinctrl-0 = <&emmc_rstn>;
53 pinctrl-names = "default";
54 compatible = "mmc-pwrseq-emmc";
55 reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
60 compatible = "samsung,clock-xxti";
61 clock-frequency = <0>;
65 compatible = "samsung,clock-xusbxti";
66 clock-frequency = <24000000>;
71 cpu_thermal: cpu-thermal {
74 /* Corresponds to 800MHz at freq_table */
75 cooling-device = <&cpu0 7 7>;
78 /* Corresponds to 200MHz at freq_table */
79 cooling-device = <&cpu0 13 13>;
87 devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
88 vdd-supply = <&buck1_reg>;
103 devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
104 vdd-supply = <&buck3_reg>;
109 devfreq = <&bus_leftbus>;
114 devfreq = <&bus_leftbus>;
119 devfreq = <&bus_leftbus>;
124 devfreq = <&bus_leftbus>;
129 devfreq = <&bus_leftbus>;
135 pinctrl-names = "default";
140 assigned-clocks = <&clock CLK_FOUT_EPLL>;
141 assigned-clock-rates = <45158401>;
145 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
146 <&clock_audss EXYNOS_MOUT_I2S>,
147 <&clock_audss EXYNOS_DOUT_SRP>,
148 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
149 <&clock_audss EXYNOS_DOUT_I2S>;
151 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
152 <&clock_audss EXYNOS_MOUT_AUDSS>;
154 assigned-clock-rates = <0>, <0>,
161 cpu0-supply = <&buck2_reg>;
165 gpio_power_key: power_key {
166 samsung,pins = "gpx1-3";
167 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
170 max77686_irq: max77686-irq {
171 samsung,pins = "gpx3-2";
172 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
173 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
174 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
178 samsung,pins = "gpx3-7";
179 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
182 emmc_rstn: emmc-rstn {
183 samsung,pins = "gpk1-2";
184 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
198 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
199 <&clock CLK_SCLK_FIMC0>;
200 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
201 assigned-clock-rates = <0>, <176000000>;
206 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
207 <&clock CLK_SCLK_FIMC1>;
208 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
209 assigned-clock-rates = <0>, <176000000>;
214 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
215 <&clock CLK_SCLK_FIMC2>;
216 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
217 assigned-clock-rates = <0>, <176000000>;
222 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
223 <&clock CLK_SCLK_FIMC3>;
224 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
225 assigned-clock-rates = <0>, <176000000>;
229 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
230 pinctrl-names = "default";
231 pinctrl-0 = <&hdmi_hpd>;
232 vdd-supply = <&ldo8_reg>;
233 vdd_osc-supply = <&ldo10_reg>;
234 vdd_pll-supply = <&ldo8_reg>;
244 dr_mode = "peripheral";
246 vusb_d-supply = <&ldo15_reg>;
247 vusb_a-supply = <&ldo12_reg>;
251 samsung,i2c-sda-delay = <100>;
252 samsung,i2c-max-bus-freq = <400000>;
256 compatible = "smsc,usb3503";
259 intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
260 connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
261 reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
266 compatible = "maxim,max77686";
267 interrupt-parent = <&gpx3>;
268 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
269 pinctrl-names = "default";
270 pinctrl-0 = <&max77686_irq>;
276 regulator-name = "VDD_ALIVE_1.0V";
277 regulator-min-microvolt = <1000000>;
278 regulator-max-microvolt = <1000000>;
283 regulator-name = "VDDQ_M1_2_1.8V";
284 regulator-min-microvolt = <1800000>;
285 regulator-max-microvolt = <1800000>;
290 regulator-name = "VDDQ_EXT_1.8V";
291 regulator-min-microvolt = <1800000>;
292 regulator-max-microvolt = <1800000>;
297 regulator-name = "VDDQ_MMC2_2.8V";
298 regulator-min-microvolt = <2800000>;
299 regulator-max-microvolt = <2800000>;
304 regulator-name = "VDDQ_MMC1_3_1.8V";
305 regulator-min-microvolt = <1800000>;
306 regulator-max-microvolt = <1800000>;
312 regulator-name = "VDD10_MPLL_1.0V";
313 regulator-min-microvolt = <1000000>;
314 regulator-max-microvolt = <1000000>;
319 regulator-name = "VDD10_XPLL_1.0V";
320 regulator-min-microvolt = <1000000>;
321 regulator-max-microvolt = <1000000>;
326 regulator-name = "VDD10_HDMI_1.0V";
327 regulator-min-microvolt = <1000000>;
328 regulator-max-microvolt = <1000000>;
332 regulator-name = "VDDQ_MIPIHSI_1.8V";
333 regulator-min-microvolt = <1800000>;
334 regulator-max-microvolt = <1800000>;
338 regulator-name = "VDD18_ABB1_1.8V";
339 regulator-min-microvolt = <1800000>;
340 regulator-max-microvolt = <1800000>;
345 regulator-name = "VDD33_USB_3.3V";
346 regulator-min-microvolt = <3300000>;
347 regulator-max-microvolt = <3300000>;
353 regulator-name = "VDDQ_C2C_W_1.8V";
354 regulator-min-microvolt = <1800000>;
355 regulator-max-microvolt = <1800000>;
361 regulator-name = "VDD18_ABB0_2_1.8V";
362 regulator-min-microvolt = <1800000>;
363 regulator-max-microvolt = <1800000>;
369 regulator-name = "VDD10_HSIC_1.0V";
370 regulator-min-microvolt = <1000000>;
371 regulator-max-microvolt = <1000000>;
377 regulator-name = "VDD18_HSIC_1.8V";
378 regulator-min-microvolt = <1800000>;
379 regulator-max-microvolt = <1800000>;
385 regulator-name = "LDO20_1.8V";
386 regulator-min-microvolt = <1800000>;
387 regulator-max-microvolt = <1800000>;
392 regulator-name = "TFLASH_2.8V";
393 regulator-min-microvolt = <2800000>;
394 regulator-max-microvolt = <2800000>;
400 * Only U3 uses it, so let it define the
403 regulator-name = "LDO22";
408 regulator-name = "VDDQ_LCD_1.8V";
409 regulator-min-microvolt = <1800000>;
410 regulator-max-microvolt = <1800000>;
416 regulator-name = "vdd_mif";
417 regulator-min-microvolt = <900000>;
418 regulator-max-microvolt = <1100000>;
424 regulator-name = "vdd_arm";
425 regulator-min-microvolt = <900000>;
426 regulator-max-microvolt = <1350000>;
432 regulator-name = "vdd_int";
433 regulator-min-microvolt = <900000>;
434 regulator-max-microvolt = <1050000>;
440 regulator-name = "vdd_g3d";
441 regulator-min-microvolt = <900000>;
442 regulator-max-microvolt = <1100000>;
443 regulator-microvolt-offset = <50000>;
447 regulator-name = "VDDQ_CKEM1_2_1.2V";
448 regulator-min-microvolt = <1200000>;
449 regulator-max-microvolt = <1200000>;
455 regulator-name = "BUCK6_1.35V";
456 regulator-min-microvolt = <1350000>;
457 regulator-max-microvolt = <1350000>;
463 regulator-name = "BUCK7_2.0V";
464 regulator-min-microvolt = <2000000>;
465 regulator-max-microvolt = <2000000>;
471 * Constraints set by specific board: X,
474 regulator-name = "BUCK8_2.8V";
482 max98090: max98090@10 {
483 compatible = "maxim,max98090";
485 interrupt-parent = <&gpx0>;
486 interrupts = <0 IRQ_TYPE_NONE>;
487 clocks = <&i2s0 CLK_I2S_CDCLK>;
488 clock-names = "mclk";
489 #sound-dai-cells = <0>;
502 pinctrl-0 = <&i2s0_bus>;
503 pinctrl-names = "default";
505 assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
506 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
514 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
515 pinctrl-names = "default";
516 vmmc-supply = <&ldo20_reg>;
517 mmc-pwrseq = <&emmc_pwrseq>;
521 card-detect-delay = <200>;
522 samsung,dw-mshc-ciu-div = <3>;
523 samsung,dw-mshc-sdr-timing = <2 3>;
524 samsung,dw-mshc-ddr-timing = <1 2>;
531 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
532 clock-names = "rtc", "rtc_src";
537 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
538 pinctrl-names = "default";
539 vmmc-supply = <&ldo21_reg>;
540 vqmmc-supply = <&ldo4_reg>;
541 cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
555 vtmu-supply = <&ldo10_reg>;