1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/clock/en7523-clk.h>
9 interrupt-parent = <&gic>;
20 reg = <0x84000000 0xA00000>;
25 reg = <0x84B00000 0x100000>;
30 reg = <0x85000000 0x1A00000>;
33 npu_phyaddr@86B00000 {
35 reg = <0x86B00000 0x100000>;
40 reg = <0x86D00000 0x100000>;
45 compatible = "arm,psci-0.2";
66 compatible = "arm,cortex-a53";
68 enable-method = "psci";
69 clock-frequency = <80000000>;
70 next-level-cache = <&L2_0>;
75 compatible = "arm,cortex-a53";
77 enable-method = "psci";
78 clock-frequency = <80000000>;
79 next-level-cache = <&L2_0>;
87 scu: system-controller@1fa20000 {
88 compatible = "airoha,en7523-scu";
89 reg = <0x1fa20000 0x400>,
94 gic: interrupt-controller@9000000 {
95 compatible = "arm,gic-v3";
97 #interrupt-cells = <3>;
100 reg = <0x09000000 0x20000>,
101 <0x09080000 0x80000>,
104 <0x09600000 0x20000>;
105 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
109 compatible = "arm,armv8-timer";
110 interrupt-parent = <&gic>;
111 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
112 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
113 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
114 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
117 uart1: serial@1fbf0000 {
118 compatible = "ns16550";
119 reg = <0x1fbf0000 0x30>;
122 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
123 clock-frequency = <1843200>;
127 gpio0: gpio@1fbf0200 {
128 compatible = "airoha,en7523-gpio";
129 reg = <0x1fbf0204 0x4>,
137 gpio1: gpio@1fbf0270 {
138 compatible = "airoha,en7523-gpio";
139 reg = <0x1fbf0270 0x4>,
147 pcie0: pcie@1fa91000 {
148 compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
150 reg = <0x1fa91000 0x1000>;
152 linux,pci-domain = <0>;
153 #address-cells = <3>;
155 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
156 interrupt-names = "pcie_irq";
157 clocks = <&scu EN7523_CLK_PCIE>;
158 clock-names = "sys_ck0";
159 bus-range = <0x00 0xff>;
160 ranges = <0x82000000 0 0x20000000 0x20000000 0 0x8000000>;
163 #interrupt-cells = <1>;
164 interrupt-map-mask = <0 0 0 7>;
165 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
166 <0 0 0 2 &pcie_intc0 1>,
167 <0 0 0 3 &pcie_intc0 2>,
168 <0 0 0 4 &pcie_intc0 3>;
169 pcie_intc0: interrupt-controller {
170 interrupt-controller;
171 #address-cells = <0>;
172 #interrupt-cells = <1>;
176 pcie1: pcie@1fa92000 {
177 compatible = "airoha,en7523-pcie", "mediatek,mt7622-pcie";
179 reg = <0x1fa92000 0x1000>;
181 linux,pci-domain = <1>;
182 #address-cells = <3>;
184 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
185 interrupt-names = "pcie_irq";
186 clocks = <&scu EN7523_CLK_PCIE>;
187 clock-names = "sys_ck1";
188 bus-range = <0x00 0xff>;
189 ranges = <0x82000000 0 0x28000000 0x28000000 0 0x8000000>;
192 #interrupt-cells = <1>;
193 interrupt-map-mask = <0 0 0 7>;
194 interrupt-map = <0 0 0 1 &pcie_intc1 0>,
195 <0 0 0 2 &pcie_intc1 1>,
196 <0 0 0 3 &pcie_intc1 2>,
197 <0 0 0 4 &pcie_intc1 3>;
198 pcie_intc1: interrupt-controller {
199 interrupt-controller;
200 #address-cells = <0>;
201 #interrupt-cells = <1>;