2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 * Based on "omap4.dtsi"
13 compatible = "ti,dra742", "ti,dra74", "ti,dra7";
18 compatible = "arm,cortex-a15";
20 operating-points-v2 = <&cpu0_opp_table>;
22 clocks = <&dpll_mpu_ck>;
25 clock-latency = <300000>; /* From omap-cpufreq driver */
28 #cooling-cells = <2>; /* min followed by max */
30 vbb-supply = <&abb_mpu>;
35 compatible = "arm,cortex-a15-pmu";
36 interrupt-parent = <&wakeupgen>;
37 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
38 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
42 dsp2_system: dsp_system@41500000 {
43 compatible = "syscon";
44 reg = <0x41500000 0x100>;
47 omap_dwc3_4: omap_dwc3_4@48940000 {
48 compatible = "ti,dwc3";
49 ti,hwmods = "usb_otg_ss4";
50 reg = <0x48940000 0x10000>;
51 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
58 compatible = "snps,dwc3";
59 reg = <0x48950000 0x17000>;
60 interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
61 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
62 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
63 interrupt-names = "peripheral",
66 maximum-speed = "high-speed";
71 mmu0_dsp2: mmu@41501000 {
72 compatible = "ti,dra7-dsp-iommu";
73 reg = <0x41501000 0x100>;
74 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
75 ti,hwmods = "mmu0_dsp2";
77 ti,syscon-mmuconfig = <&dsp2_system 0x0>;
81 mmu1_dsp2: mmu@41502000 {
82 compatible = "ti,dra7-dsp-iommu";
83 reg = <0x41502000 0x100>;
84 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
85 ti,hwmods = "mmu1_dsp2";
87 ti,syscon-mmuconfig = <&dsp2_system 0x1>;
98 reg = <0x58000000 0x80>,
103 reg-names = "dss", "pll1_clkctrl", "pll1",
104 "pll2_clkctrl", "pll2";
106 clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 8>,
107 <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 12>,
108 <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 13>;
109 clock-names = "fck", "video1_clk", "video2_clk";
113 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
114 ti,mbox-tx = <6 2 2>;
115 ti,mbox-rx = <4 2 2>;
118 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
119 ti,mbox-tx = <5 2 2>;
120 ti,mbox-rx = <1 2 2>;
126 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
127 ti,mbox-tx = <6 2 2>;
128 ti,mbox-rx = <4 2 2>;
131 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
132 ti,mbox-tx = <5 2 2>;
133 ti,mbox-rx = <1 2 2>;
139 compatible = "ti,dra746-pcie-rc", "ti,dra7-pcie";
143 compatible = "ti,dra746-pcie-ep", "ti,dra7-pcie-ep";
147 compatible = "ti,dra746-pcie-rc", "ti,dra7-pcie";