2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/bus/ti-sysc.h>
8 #include <dt-bindings/clock/dm816.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/omap.h>
13 compatible = "ti,dm816";
14 interrupt-parent = <&intc>;
33 compatible = "arm,cortex-a8";
40 compatible = "arm,cortex-a8-pmu";
45 * The soc node represents the soc top level view. It is used for IPs
46 * that are not memory mapped in the MPU view or for the MPU itself.
49 compatible = "ti,omap-infra";
51 compatible = "ti,omap3-mpu";
57 * XXX: Use a flat representation of the dm816x interconnect.
58 * The real dm816x interconnect network is quite complex. Since
59 * it will not bring real advantage to represent that in DT
60 * for the moment, just use a fake OCP bus entry to represent
61 * the whole bus hierarchy.
64 compatible = "simple-bus";
65 reg = <0x44000000 0x10000>;
72 compatible = "ti,dm816-prcm", "simple-bus";
73 reg = <0x48180000 0x4000>;
76 ranges = <0 0x48180000 0x4000>;
83 prcm_clockdomains: clockdomains {
88 compatible = "ti,dm816-scrm", "simple-bus";
89 reg = <0x48140000 0x21000>;
93 ranges = <0 0x48140000 0x21000>;
95 dm816x_pinmux: pinmux@800 {
96 compatible = "pinctrl-single";
100 #pinctrl-cells = <1>;
101 pinctrl-single,register-width = <16>;
102 pinctrl-single,function-mask = <0xf>;
105 /* Device Configuration Registers */
106 scm_conf: syscon@600 {
107 compatible = "syscon", "simple-bus";
109 #address-cells = <1>;
111 ranges = <0 0x600 0x110>;
113 usb_phy0: usb-phy@20 {
114 compatible = "ti,dm8168-usb-phy";
117 clocks = <&main_fapll 6>;
118 clock-names = "refclk";
120 syscon = <&scm_conf>;
123 usb_phy1: usb-phy@28 {
124 compatible = "ti,dm8168-usb-phy";
127 clocks = <&main_fapll 6>;
128 clock-names = "refclk";
130 syscon = <&scm_conf>;
134 scrm_clocks: clocks {
135 #address-cells = <1>;
139 scrm_clockdomains: clockdomains {
143 target-module@49000000 {
144 compatible = "ti,sysc-omap4", "ti,sysc";
145 reg = <0x49000000 0x4>;
147 clocks = <&alwon_clkctrl DM816_TPCC_CLKCTRL 0>;
149 #address-cells = <1>;
151 ranges = <0x0 0x49000000 0x10000>;
154 compatible = "ti,edma3-tpcc";
156 reg-names = "edma3_cc";
157 interrupts = <12 13 14>;
158 interrupt-names = "edma3_ccint", "edma3_mperr",
163 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
164 <&edma_tptc2 3>, <&edma_tptc3 0>;
166 ti,edma-memcpy-channels = <20 21>;
170 target-module@49800000 {
171 compatible = "ti,sysc-omap4", "ti,sysc";
172 reg = <0x49800000 0x4>,
174 reg-names = "rev", "sysc";
175 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
176 ti,sysc-midle = <SYSC_IDLE_FORCE>;
177 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
179 clocks = <&alwon_clkctrl DM816_TPTC0_CLKCTRL 0>;
181 #address-cells = <1>;
183 ranges = <0x0 0x49800000 0x100000>;
186 compatible = "ti,edma3-tptc";
189 interrupt-names = "edma3_tcerrint";
193 target-module@49900000 {
194 compatible = "ti,sysc-omap4", "ti,sysc";
195 reg = <0x49900000 0x4>,
197 reg-names = "rev", "sysc";
198 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
199 ti,sysc-midle = <SYSC_IDLE_FORCE>;
200 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
202 clocks = <&alwon_clkctrl DM816_TPTC1_CLKCTRL 0>;
204 #address-cells = <1>;
206 ranges = <0x0 0x49900000 0x100000>;
209 compatible = "ti,edma3-tptc";
212 interrupt-names = "edma3_tcerrint";
216 target-module@49a00000 {
217 compatible = "ti,sysc-omap4", "ti,sysc";
218 reg = <0x49a00000 0x4>,
220 reg-names = "rev", "sysc";
221 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
222 ti,sysc-midle = <SYSC_IDLE_FORCE>;
223 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
225 clocks = <&alwon_clkctrl DM816_TPTC2_CLKCTRL 0>;
227 #address-cells = <1>;
229 ranges = <0x0 0x49a00000 0x100000>;
232 compatible = "ti,edma3-tptc";
235 interrupt-names = "edma3_tcerrint";
239 target-module@49b00000 {
240 compatible = "ti,sysc-omap4", "ti,sysc";
241 reg = <0x49b00000 0x4>,
243 reg-names = "rev", "sysc";
244 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
245 ti,sysc-midle = <SYSC_IDLE_FORCE>;
246 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
248 clocks = <&alwon_clkctrl DM816_TPTC3_CLKCTRL 0>;
250 #address-cells = <1>;
252 ranges = <0x0 0x49b00000 0x100000>;
255 compatible = "ti,edma3-tptc";
258 interrupt-names = "edma3_tcerrint";
263 compatible = "ti,am3352-elm";
265 reg = <0x48080000 0x2000>;
269 gpio1: gpio@48032000 {
270 compatible = "ti,omap4-gpio";
273 reg = <0x48032000 0x1000>;
277 interrupt-controller;
278 #interrupt-cells = <2>;
281 gpio2: gpio@4804c000 {
282 compatible = "ti,omap4-gpio";
285 reg = <0x4804c000 0x1000>;
289 interrupt-controller;
290 #interrupt-cells = <2>;
293 gpmc: gpmc@50000000 {
294 compatible = "ti,am3352-gpmc";
296 reg = <0x50000000 0x2000>;
297 #address-cells = <2>;
303 gpmc,num-waitpins = <2>;
304 interrupt-controller;
305 #interrupt-cells = <2>;
311 compatible = "ti,omap4-i2c";
313 reg = <0x48028000 0x1000>;
314 #address-cells = <1>;
320 compatible = "ti,omap4-i2c";
322 reg = <0x4802a000 0x1000>;
323 #address-cells = <1>;
328 intc: interrupt-controller@48200000 {
329 compatible = "ti,dm816-intc";
330 interrupt-controller;
331 #interrupt-cells = <1>;
332 reg = <0x48200000 0x1000>;
336 compatible = "ti,am3352-rtc", "ti,da830-rtc";
337 reg = <0x480c0000 0x1000>;
338 interrupts = <75 76>;
342 mailbox: mailbox@480c8000 {
343 compatible = "ti,omap4-mailbox";
344 reg = <0x480c8000 0x2000>;
346 ti,hwmods = "mailbox";
348 ti,mbox-num-users = <4>;
349 ti,mbox-num-fifos = <12>;
351 ti,mbox-tx = <3 0 0>;
352 ti,mbox-rx = <0 0 0>;
356 spinbox: spinbox@480ca000 {
357 compatible = "ti,omap4-hwspinlock";
358 reg = <0x480ca000 0x2000>;
359 ti,hwmods = "spinbox";
363 mdio: mdio@4a100800 {
364 compatible = "ti,davinci_mdio";
365 #address-cells = <1>;
367 reg = <0x4a100800 0x100>;
368 ti,hwmods = "davinci_mdio";
369 bus_freq = <1000000>;
370 phy0: ethernet-phy@0 {
373 phy1: ethernet-phy@1 {
378 eth0: ethernet@4a100000 {
379 compatible = "ti,dm816-emac";
381 reg = <0x4a100000 0x800
383 clocks = <&sysclk24_ck>;
384 syscon = <&scm_conf>;
385 ti,davinci-ctrl-reg-offset = <0>;
386 ti,davinci-ctrl-mod-reg-offset = <0x900>;
387 ti,davinci-ctrl-ram-offset = <0x2000>;
388 ti,davinci-ctrl-ram-size = <0x2000>;
389 interrupts = <40 41 42 43>;
390 phy-handle = <&phy0>;
393 eth1: ethernet@4a120000 {
394 compatible = "ti,dm816-emac";
396 reg = <0x4a120000 0x4000>;
397 clocks = <&sysclk24_ck>;
398 syscon = <&scm_conf>;
399 ti,davinci-ctrl-reg-offset = <0>;
400 ti,davinci-ctrl-mod-reg-offset = <0x900>;
401 ti,davinci-ctrl-ram-offset = <0x2000>;
402 ti,davinci-ctrl-ram-size = <0x2000>;
403 interrupts = <44 45 46 47>;
404 phy-handle = <&phy1>;
407 sata: sata@4a140000 {
408 compatible = "ti,dm816-ahci";
409 reg = <0x4a140000 0x10000>;
414 mcspi1: spi@48030000 {
415 compatible = "ti,omap4-mcspi";
416 reg = <0x48030000 0x1000>;
417 #address-cells = <1>;
421 ti,hwmods = "mcspi1";
422 dmas = <&edma 16 0 &edma 17 0
423 &edma 18 0 &edma 19 0
424 &edma 20 0 &edma 21 0
425 &edma 22 0 &edma 23 0>;
426 dma-names = "tx0", "rx0", "tx1", "rx1",
427 "tx2", "rx2", "tx3", "rx3";
431 compatible = "ti,omap4-hsmmc";
432 reg = <0x48060000 0x11000>;
435 dmas = <&edma 24 0 &edma 25 0>;
436 dma-names = "tx", "rx";
439 timer1_target: target-module@4802e000 {
440 compatible = "ti,sysc-omap4-timer", "ti,sysc";
441 reg = <0x4802e000 0x4>,
443 reg-names = "rev", "sysc";
444 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
445 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
448 <SYSC_IDLE_SMART_WKUP>;
449 clocks = <&alwon_clkctrl DM816_TIMER1_CLKCTRL 0>;
451 #address-cells = <1>;
453 ranges = <0x0 0x4802e000 0x1000>;
456 compatible = "ti,dm816-timer";
460 clocks = <&alwon_clkctrl DM816_TIMER1_CLKCTRL 0>;
465 timer2_target: target-module@48040000 {
466 compatible = "ti,sysc-omap4-timer", "ti,sysc";
467 reg = <0x48040000 0x4>,
469 reg-names = "rev", "sysc";
470 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
471 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
474 <SYSC_IDLE_SMART_WKUP>;
475 clocks = <&alwon_clkctrl DM816_TIMER2_CLKCTRL 0>;
477 #address-cells = <1>;
479 ranges = <0x0 0x48040000 0x1000>;
482 compatible = "ti,dm816-timer";
485 clocks = <&alwon_clkctrl DM816_TIMER2_CLKCTRL 0>;
490 timer3: timer@48042000 {
491 compatible = "ti,dm816-timer";
492 reg = <0x48042000 0x2000>;
494 ti,hwmods = "timer3";
497 timer4: timer@48044000 {
498 compatible = "ti,dm816-timer";
499 reg = <0x48044000 0x2000>;
501 ti,hwmods = "timer4";
505 timer5: timer@48046000 {
506 compatible = "ti,dm816-timer";
507 reg = <0x48046000 0x2000>;
509 ti,hwmods = "timer5";
513 timer6: timer@48048000 {
514 compatible = "ti,dm816-timer";
515 reg = <0x48048000 0x2000>;
517 ti,hwmods = "timer6";
521 timer7: timer@4804a000 {
522 compatible = "ti,dm816-timer";
523 reg = <0x4804a000 0x2000>;
525 ti,hwmods = "timer7";
529 uart1: uart@48020000 {
530 compatible = "ti,am3352-uart", "ti,omap3-uart";
532 reg = <0x48020000 0x2000>;
533 clock-frequency = <48000000>;
535 dmas = <&edma 26 0 &edma 27 0>;
536 dma-names = "tx", "rx";
539 uart2: uart@48022000 {
540 compatible = "ti,am3352-uart", "ti,omap3-uart";
542 reg = <0x48022000 0x2000>;
543 clock-frequency = <48000000>;
545 dmas = <&edma 28 0 &edma 29 0>;
546 dma-names = "tx", "rx";
549 uart3: uart@48024000 {
550 compatible = "ti,am3352-uart", "ti,omap3-uart";
552 reg = <0x48024000 0x2000>;
553 clock-frequency = <48000000>;
555 dmas = <&edma 30 0 &edma 31 0>;
556 dma-names = "tx", "rx";
559 /* NOTE: USB needs a transceiver driver for phys to work */
560 usb: usb_otg_hs@47401000 {
561 compatible = "ti,am33xx-usb";
562 reg = <0x47401000 0x400000>;
564 #address-cells = <1>;
566 ti,hwmods = "usb_otg_hs";
569 compatible = "ti,musb-dm816";
570 reg = <0x47401400 0x400
572 reg-names = "mc", "control";
574 interrupt-names = "mc";
576 interface-type = <0>;
578 phy-names = "usb2-phy";
579 mentor,multipoint = <1>;
580 mentor,num-eps = <16>;
581 mentor,ram-bits = <12>;
582 mentor,power = <500>;
584 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
585 &cppi41dma 2 0 &cppi41dma 3 0
586 &cppi41dma 4 0 &cppi41dma 5 0
587 &cppi41dma 6 0 &cppi41dma 7 0
588 &cppi41dma 8 0 &cppi41dma 9 0
589 &cppi41dma 10 0 &cppi41dma 11 0
590 &cppi41dma 12 0 &cppi41dma 13 0
591 &cppi41dma 14 0 &cppi41dma 0 1
592 &cppi41dma 1 1 &cppi41dma 2 1
593 &cppi41dma 3 1 &cppi41dma 4 1
594 &cppi41dma 5 1 &cppi41dma 6 1
595 &cppi41dma 7 1 &cppi41dma 8 1
596 &cppi41dma 9 1 &cppi41dma 10 1
597 &cppi41dma 11 1 &cppi41dma 12 1
598 &cppi41dma 13 1 &cppi41dma 14 1>;
600 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
601 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
603 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
604 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
609 compatible = "ti,musb-dm816";
610 reg = <0x47401c00 0x400
612 reg-names = "mc", "control";
614 interrupt-names = "mc";
616 interface-type = <0>;
618 phy-names = "usb2-phy";
619 mentor,multipoint = <1>;
620 mentor,num-eps = <16>;
621 mentor,ram-bits = <12>;
622 mentor,power = <500>;
624 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
625 &cppi41dma 17 0 &cppi41dma 18 0
626 &cppi41dma 19 0 &cppi41dma 20 0
627 &cppi41dma 21 0 &cppi41dma 22 0
628 &cppi41dma 23 0 &cppi41dma 24 0
629 &cppi41dma 25 0 &cppi41dma 26 0
630 &cppi41dma 27 0 &cppi41dma 28 0
631 &cppi41dma 29 0 &cppi41dma 15 1
632 &cppi41dma 16 1 &cppi41dma 17 1
633 &cppi41dma 18 1 &cppi41dma 19 1
634 &cppi41dma 20 1 &cppi41dma 21 1
635 &cppi41dma 22 1 &cppi41dma 23 1
636 &cppi41dma 24 1 &cppi41dma 25 1
637 &cppi41dma 26 1 &cppi41dma 27 1
638 &cppi41dma 28 1 &cppi41dma 29 1>;
640 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
641 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
643 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
644 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
648 cppi41dma: dma-controller@47402000 {
649 compatible = "ti,am3359-cppi41";
650 reg = <0x47400000 0x1000
654 reg-names = "glue", "controller", "scheduler", "queuemgr";
656 interrupt-names = "glue";
658 #dma-channels = <30>;
659 #dma-requests = <256>;
663 wd_timer2: wd_timer@480c2000 {
664 compatible = "ti,omap3-wdt";
665 ti,hwmods = "wd_timer";
666 reg = <0x480c2000 0x1000>;
672 #include "dm816x-clocks.dtsi"
674 /* Preferred always-on timer for clocksource */
679 assigned-clocks = <&timer1_fck>;
680 assigned-clock-parents = <&sys_clkin_ck>;
684 /* Preferred timer for clockevent */
689 assigned-clocks = <&timer2_fck>;
690 assigned-clock-parents = <&sys_clkin_ck>;