2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/omap.h>
11 compatible = "ti,dm816";
12 interrupt-parent = <&intc>;
31 compatible = "arm,cortex-a8";
38 compatible = "arm,cortex-a8-pmu";
43 * The soc node represents the soc top level view. It is used for IPs
44 * that are not memory mapped in the MPU view or for the MPU itself.
47 compatible = "ti,omap-infra";
49 compatible = "ti,omap3-mpu";
55 * XXX: Use a flat representation of the dm816x interconnect.
56 * The real dm816x interconnect network is quite complex. Since
57 * it will not bring real advantage to represent that in DT
58 * for the moment, just use a fake OCP bus entry to represent
59 * the whole bus hierarchy.
62 compatible = "simple-bus";
63 reg = <0x44000000 0x10000>;
70 compatible = "ti,dm816-prcm";
71 reg = <0x48180000 0x4000>;
78 prcm_clockdomains: clockdomains {
83 compatible = "ti,dm816-scrm", "simple-bus";
84 reg = <0x48140000 0x21000>;
87 ranges = <0 0x48140000 0x21000>;
89 dm816x_pinmux: pinmux@800 {
90 compatible = "pinctrl-single";
94 pinctrl-single,register-width = <16>;
95 pinctrl-single,function-mask = <0xf>;
98 /* Device Configuration Registers */
99 scm_conf: syscon@600 {
100 compatible = "syscon", "simple-bus";
102 #address-cells = <1>;
104 ranges = <0 0x600 0x110>;
106 usb_phy0: usb-phy@20 {
107 compatible = "ti,dm8168-usb-phy";
110 clocks = <&main_fapll 6>;
111 clock-names = "refclk";
113 syscon = <&scm_conf>;
116 usb_phy1: usb-phy@28 {
117 compatible = "ti,dm8168-usb-phy";
120 clocks = <&main_fapll 6>;
121 clock-names = "refclk";
123 syscon = <&scm_conf>;
127 scrm_clocks: clocks {
128 #address-cells = <1>;
132 scrm_clockdomains: clockdomains {
136 edma: edma@49000000 {
137 compatible = "ti,edma3";
138 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2", "tptc3";
139 reg = <0x49000000 0x10000>,
141 interrupts = <12 13 14>;
146 compatible = "ti,816-elm";
148 reg = <0x48080000 0x2000>;
152 gpio1: gpio@48032000 {
153 compatible = "ti,omap4-gpio";
156 reg = <0x48032000 0x1000>;
160 interrupt-controller;
161 #interrupt-cells = <2>;
164 gpio2: gpio@4804c000 {
165 compatible = "ti,omap4-gpio";
168 reg = <0x4804c000 0x1000>;
172 interrupt-controller;
173 #interrupt-cells = <2>;
176 gpmc: gpmc@50000000 {
177 compatible = "ti,am3352-gpmc";
179 reg = <0x50000000 0x2000>;
180 #address-cells = <2>;
186 gpmc,num-waitpins = <2>;
187 interrupt-controller;
188 #interrupt-cells = <2>;
194 compatible = "ti,omap4-i2c";
196 reg = <0x48028000 0x1000>;
197 #address-cells = <1>;
200 dmas = <&edma 58 &edma 59>;
201 dma-names = "tx", "rx";
205 compatible = "ti,omap4-i2c";
207 reg = <0x4802a000 0x1000>;
208 #address-cells = <1>;
211 dmas = <&edma 60 &edma 61>;
212 dma-names = "tx", "rx";
215 intc: interrupt-controller@48200000 {
216 compatible = "ti,dm816-intc";
217 interrupt-controller;
218 #interrupt-cells = <1>;
219 reg = <0x48200000 0x1000>;
223 compatible = "ti,am3352-rtc", "ti,da830-rtc";
224 reg = <0x480c0000 0x1000>;
225 interrupts = <75 76>;
229 mailbox: mailbox@480c8000 {
230 compatible = "ti,omap4-mailbox";
231 reg = <0x480c8000 0x2000>;
233 ti,hwmods = "mailbox";
235 ti,mbox-num-users = <4>;
236 ti,mbox-num-fifos = <12>;
238 ti,mbox-tx = <3 0 0>;
239 ti,mbox-rx = <0 0 0>;
243 spinbox: spinbox@480ca000 {
244 compatible = "ti,omap4-hwspinlock";
245 reg = <0x480ca000 0x2000>;
246 ti,hwmods = "spinbox";
250 mdio: mdio@4a100800 {
251 compatible = "ti,davinci_mdio";
252 #address-cells = <1>;
254 reg = <0x4a100800 0x100>;
255 ti,hwmods = "davinci_mdio";
256 bus_freq = <1000000>;
257 phy0: ethernet-phy@0 {
260 phy1: ethernet-phy@1 {
265 eth0: ethernet@4a100000 {
266 compatible = "ti,dm816-emac";
268 reg = <0x4a100000 0x800
270 clocks = <&sysclk24_ck>;
271 syscon = <&scm_conf>;
272 ti,davinci-ctrl-reg-offset = <0>;
273 ti,davinci-ctrl-mod-reg-offset = <0x900>;
274 ti,davinci-ctrl-ram-offset = <0x2000>;
275 ti,davinci-ctrl-ram-size = <0x2000>;
276 interrupts = <40 41 42 43>;
277 phy-handle = <&phy0>;
280 eth1: ethernet@4a120000 {
281 compatible = "ti,dm816-emac";
283 reg = <0x4a120000 0x4000>;
284 clocks = <&sysclk24_ck>;
285 syscon = <&scm_conf>;
286 ti,davinci-ctrl-reg-offset = <0>;
287 ti,davinci-ctrl-mod-reg-offset = <0x900>;
288 ti,davinci-ctrl-ram-offset = <0x2000>;
289 ti,davinci-ctrl-ram-size = <0x2000>;
290 interrupts = <44 45 46 47>;
291 phy-handle = <&phy1>;
294 mcspi1: spi@48030000 {
295 compatible = "ti,omap4-mcspi";
296 reg = <0x48030000 0x1000>;
297 #address-cells = <1>;
301 ti,hwmods = "mcspi1";
302 dmas = <&edma 16 &edma 17
306 dma-names = "tx0", "rx0", "tx1", "rx1",
307 "tx2", "rx2", "tx3", "rx3";
311 compatible = "ti,omap4-hsmmc";
312 reg = <0x48060000 0x11000>;
315 dmas = <&edma 24 &edma 25>;
316 dma-names = "tx", "rx";
319 timer1: timer@4802e000 {
320 compatible = "ti,dm816-timer";
321 reg = <0x4802e000 0x2000>;
323 ti,hwmods = "timer1";
327 timer2: timer@48040000 {
328 compatible = "ti,dm816-timer";
329 reg = <0x48040000 0x2000>;
331 ti,hwmods = "timer2";
334 timer3: timer@48042000 {
335 compatible = "ti,dm816-timer";
336 reg = <0x48042000 0x2000>;
338 ti,hwmods = "timer3";
341 timer4: timer@48044000 {
342 compatible = "ti,dm816-timer";
343 reg = <0x48044000 0x2000>;
345 ti,hwmods = "timer4";
349 timer5: timer@48046000 {
350 compatible = "ti,dm816-timer";
351 reg = <0x48046000 0x2000>;
353 ti,hwmods = "timer5";
357 timer6: timer@48048000 {
358 compatible = "ti,dm816-timer";
359 reg = <0x48048000 0x2000>;
361 ti,hwmods = "timer6";
365 timer7: timer@4804a000 {
366 compatible = "ti,dm816-timer";
367 reg = <0x4804a000 0x2000>;
369 ti,hwmods = "timer7";
373 uart1: uart@48020000 {
374 compatible = "ti,am3352-uart", "ti,omap3-uart";
376 reg = <0x48020000 0x2000>;
377 clock-frequency = <48000000>;
379 dmas = <&edma 26 &edma 27>;
380 dma-names = "tx", "rx";
383 uart2: uart@48022000 {
384 compatible = "ti,am3352-uart", "ti,omap3-uart";
386 reg = <0x48022000 0x2000>;
387 clock-frequency = <48000000>;
389 dmas = <&edma 28 &edma 29>;
390 dma-names = "tx", "rx";
393 uart3: uart@48024000 {
394 compatible = "ti,am3352-uart", "ti,omap3-uart";
396 reg = <0x48024000 0x2000>;
397 clock-frequency = <48000000>;
399 dmas = <&edma 30 &edma 31>;
400 dma-names = "tx", "rx";
403 /* NOTE: USB needs a transceiver driver for phys to work */
404 usb: usb_otg_hs@47401000 {
405 compatible = "ti,am33xx-usb";
406 reg = <0x47401000 0x400000>;
408 #address-cells = <1>;
410 ti,hwmods = "usb_otg_hs";
413 compatible = "ti,musb-dm816";
414 reg = <0x47401400 0x400
416 reg-names = "mc", "control";
418 interrupt-names = "mc";
420 interface-type = <0>;
422 phy-names = "usb2-phy";
423 mentor,multipoint = <1>;
424 mentor,num-eps = <16>;
425 mentor,ram-bits = <12>;
426 mentor,power = <500>;
428 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
429 &cppi41dma 2 0 &cppi41dma 3 0
430 &cppi41dma 4 0 &cppi41dma 5 0
431 &cppi41dma 6 0 &cppi41dma 7 0
432 &cppi41dma 8 0 &cppi41dma 9 0
433 &cppi41dma 10 0 &cppi41dma 11 0
434 &cppi41dma 12 0 &cppi41dma 13 0
435 &cppi41dma 14 0 &cppi41dma 0 1
436 &cppi41dma 1 1 &cppi41dma 2 1
437 &cppi41dma 3 1 &cppi41dma 4 1
438 &cppi41dma 5 1 &cppi41dma 6 1
439 &cppi41dma 7 1 &cppi41dma 8 1
440 &cppi41dma 9 1 &cppi41dma 10 1
441 &cppi41dma 11 1 &cppi41dma 12 1
442 &cppi41dma 13 1 &cppi41dma 14 1>;
444 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
445 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
447 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
448 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
453 compatible = "ti,musb-dm816";
454 reg = <0x47401c00 0x400
456 reg-names = "mc", "control";
458 interrupt-names = "mc";
460 interface-type = <0>;
462 phy-names = "usb2-phy";
463 mentor,multipoint = <1>;
464 mentor,num-eps = <16>;
465 mentor,ram-bits = <12>;
466 mentor,power = <500>;
468 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
469 &cppi41dma 17 0 &cppi41dma 18 0
470 &cppi41dma 19 0 &cppi41dma 20 0
471 &cppi41dma 21 0 &cppi41dma 22 0
472 &cppi41dma 23 0 &cppi41dma 24 0
473 &cppi41dma 25 0 &cppi41dma 26 0
474 &cppi41dma 27 0 &cppi41dma 28 0
475 &cppi41dma 29 0 &cppi41dma 15 1
476 &cppi41dma 16 1 &cppi41dma 17 1
477 &cppi41dma 18 1 &cppi41dma 19 1
478 &cppi41dma 20 1 &cppi41dma 21 1
479 &cppi41dma 22 1 &cppi41dma 23 1
480 &cppi41dma 24 1 &cppi41dma 25 1
481 &cppi41dma 26 1 &cppi41dma 27 1
482 &cppi41dma 28 1 &cppi41dma 29 1>;
484 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
485 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
487 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
488 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
492 cppi41dma: dma-controller@47402000 {
493 compatible = "ti,am3359-cppi41";
494 reg = <0x47400000 0x1000
498 reg-names = "glue", "controller", "scheduler", "queuemgr";
500 interrupt-names = "glue";
502 #dma-channels = <30>;
503 #dma-requests = <256>;
507 wd_timer2: wd_timer@480c2000 {
508 compatible = "ti,omap3-wdt";
509 ti,hwmods = "wd_timer";
510 reg = <0x480c2000 0x1000>;
516 #include "dm816x-clocks.dtsi"