2 * This file is licensed under the terms of the GNU General Public License
3 * version 2. This program is licensed "as is" without any warranty of any
4 * kind, whether express or implied.
7 #include <dt-bindings/bus/ti-sysc.h>
8 #include <dt-bindings/clock/dm814.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/dm814x.h>
13 compatible = "ti,dm814";
14 interrupt-parent = <&intc>;
25 ethernet0 = &cpsw_emac0;
26 ethernet1 = &cpsw_emac1;
37 compatible = "arm,cortex-a8";
44 compatible = "arm,cortex-a8-pmu";
49 * The soc node represents the soc top level view. It is used for IPs
50 * that are not memory mapped in the MPU view or for the MPU itself.
53 compatible = "ti,omap-infra";
55 compatible = "ti,omap3-mpu";
61 compatible = "simple-bus";
65 ti,hwmods = "l3_main";
68 compatible = "ti,am33xx-usb";
69 reg = <0x47400000 0x1000>;
73 ti,hwmods = "usb_otg_hs";
75 usb0_phy: usb-phy@47401300 {
76 compatible = "ti,am335x-usb-phy";
77 reg = <0x47401300 0x100>;
79 ti,ctrl_mod = <&usb_ctrl_mod>;
84 compatible = "ti,musb-am33xx";
85 reg = <0x47401400 0x400
87 reg-names = "mc", "control";
90 interrupt-names = "mc";
92 mentor,multipoint = <1>;
93 mentor,num-eps = <16>;
94 mentor,ram-bits = <12>;
98 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
99 &cppi41dma 2 0 &cppi41dma 3 0
100 &cppi41dma 4 0 &cppi41dma 5 0
101 &cppi41dma 6 0 &cppi41dma 7 0
102 &cppi41dma 8 0 &cppi41dma 9 0
103 &cppi41dma 10 0 &cppi41dma 11 0
104 &cppi41dma 12 0 &cppi41dma 13 0
105 &cppi41dma 14 0 &cppi41dma 0 1
106 &cppi41dma 1 1 &cppi41dma 2 1
107 &cppi41dma 3 1 &cppi41dma 4 1
108 &cppi41dma 5 1 &cppi41dma 6 1
109 &cppi41dma 7 1 &cppi41dma 8 1
110 &cppi41dma 9 1 &cppi41dma 10 1
111 &cppi41dma 11 1 &cppi41dma 12 1
112 &cppi41dma 13 1 &cppi41dma 14 1>;
114 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
115 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
117 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
118 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
123 compatible = "ti,musb-am33xx";
124 reg = <0x47401c00 0x400
126 reg-names = "mc", "control";
128 interrupt-names = "mc";
130 mentor,multipoint = <1>;
131 mentor,num-eps = <16>;
132 mentor,ram-bits = <12>;
133 mentor,power = <500>;
136 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
137 &cppi41dma 17 0 &cppi41dma 18 0
138 &cppi41dma 19 0 &cppi41dma 20 0
139 &cppi41dma 21 0 &cppi41dma 22 0
140 &cppi41dma 23 0 &cppi41dma 24 0
141 &cppi41dma 25 0 &cppi41dma 26 0
142 &cppi41dma 27 0 &cppi41dma 28 0
143 &cppi41dma 29 0 &cppi41dma 15 1
144 &cppi41dma 16 1 &cppi41dma 17 1
145 &cppi41dma 18 1 &cppi41dma 19 1
146 &cppi41dma 20 1 &cppi41dma 21 1
147 &cppi41dma 22 1 &cppi41dma 23 1
148 &cppi41dma 24 1 &cppi41dma 25 1
149 &cppi41dma 26 1 &cppi41dma 27 1
150 &cppi41dma 28 1 &cppi41dma 29 1>;
152 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
153 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
155 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
156 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
160 cppi41dma: dma-controller@47402000 {
161 compatible = "ti,am3359-cppi41";
162 reg = <0x47400000 0x1000
166 reg-names = "glue", "controller", "scheduler", "queuemgr";
168 interrupt-names = "glue";
170 /* For backwards compatibility: */
171 #dma-channels = <30>;
173 #dma-requests = <256>;
174 dma-requests = <256>;
179 * See TRM "Table 1-317. L4LS Instance Summary" for hints.
180 * It shows the module target agent registers though, so the
181 * actual device is typically 0x1000 before the target agent
182 * except in cases where the module is larger than 0x1000.
184 l4ls: l4ls@48000000 {
185 compatible = "ti,dm814-l4ls", "simple-bus";
186 #address-cells = <1>;
188 ranges = <0 0x48000000 0x2000000>;
191 compatible = "ti,omap4-i2c";
192 #address-cells = <1>;
195 reg = <0x28000 0x1000>;
200 compatible = "ti,814-elm";
202 reg = <0x80000 0x2000>;
207 compatible = "ti,omap4-gpio";
210 reg = <0x32000 0x2000>;
214 interrupt-controller;
215 #interrupt-cells = <2>;
219 compatible = "ti,omap4-gpio";
222 reg = <0x4c000 0x2000>;
226 interrupt-controller;
227 #interrupt-cells = <2>;
231 compatible = "ti,omap4-gpio";
234 reg = <0x1ac000 0x2000>;
238 interrupt-controller;
239 #interrupt-cells = <2>;
243 compatible = "ti,omap4-gpio";
246 reg = <0x1ae000 0x2000>;
250 interrupt-controller;
251 #interrupt-cells = <2>;
255 compatible = "ti,omap4-i2c";
256 #address-cells = <1>;
259 reg = <0x2a000 0x1000>;
264 compatible = "ti,omap4-mcspi";
265 reg = <0x30000 0x1000>;
266 #address-cells = <1>;
270 ti,hwmods = "mcspi1";
271 dmas = <&edma 16 0 &edma 17 0
272 &edma 18 0 &edma 19 0
273 &edma 20 0 &edma 21 0
274 &edma 22 0 &edma 23 0>;
276 dma-names = "tx0", "rx0", "tx1", "rx1",
277 "tx2", "rx2", "tx3", "rx3";
281 compatible = "ti,omap4-mcspi";
282 reg = <0x1a0000 0x1000>;
283 #address-cells = <1>;
287 ti,hwmods = "mcspi2";
288 dmas = <&edma 42 0 &edma 43 0
289 &edma 44 0 &edma 45 0>;
290 dma-names = "tx0", "rx0", "tx1", "rx1";
293 /* Board must configure dmas with edma_xbar for EDMA */
295 compatible = "ti,omap4-mcspi";
296 reg = <0x1a2000 0x1000>;
297 #address-cells = <1>;
301 ti,hwmods = "mcspi3";
305 compatible = "ti,omap4-mcspi";
306 reg = <0x1a4000 0x1000>;
307 #address-cells = <1>;
311 ti,hwmods = "mcspi4";
314 timer1_target: target-module@2e000 {
315 compatible = "ti,sysc-omap4-timer", "ti,sysc";
318 reg-names = "rev", "sysc";
319 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
320 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
323 <SYSC_IDLE_SMART_WKUP>;
324 clocks = <&timer1_fck>;
326 #address-cells = <1>;
328 ranges = <0x0 0x2e000 0x1000>;
331 compatible = "ti,am335x-timer-1ms";
335 clocks = <&timer1_fck>;
341 compatible = "ti,am3352-uart", "ti,omap3-uart";
343 reg = <0x20000 0x2000>;
344 clock-frequency = <48000000>;
346 dmas = <&edma 26 0 &edma 27 0>;
347 dma-names = "tx", "rx";
351 compatible = "ti,am3352-uart", "ti,omap3-uart";
353 reg = <0x22000 0x2000>;
354 clock-frequency = <48000000>;
356 dmas = <&edma 28 0 &edma 29 0>;
357 dma-names = "tx", "rx";
361 compatible = "ti,am3352-uart", "ti,omap3-uart";
363 reg = <0x24000 0x2000>;
364 clock-frequency = <48000000>;
366 dmas = <&edma 30 0 &edma 31 0>;
367 dma-names = "tx", "rx";
370 timer2_target: target-module@40000 {
371 compatible = "ti,sysc-omap4-timer", "ti,sysc";
374 reg-names = "rev", "sysc";
375 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
376 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
379 <SYSC_IDLE_SMART_WKUP>;
380 clocks = <&timer2_fck>;
382 #address-cells = <1>;
384 ranges = <0x0 0x40000 0x1000>;
387 compatible = "ti,dm814-timer";
390 clocks = <&timer2_fck>;
395 timer3: timer@42000 {
396 compatible = "ti,dm814-timer";
397 reg = <0x42000 0x2000>;
399 ti,hwmods = "timer3";
403 compatible = "ti,omap4-hsmmc";
407 dma-names = "tx", "rx";
409 interrupt-parent = <&intc>;
410 reg = <0x60000 0x1000>;
414 compatible = "ti,am3352-rtc", "ti,da830-rtc";
415 reg = <0xc0000 0x1000>;
416 interrupts = <75 76>;
421 compatible = "ti,omap4-hsmmc";
425 dma-names = "tx", "rx";
427 interrupt-parent = <&intc>;
428 reg = <0x1d8000 0x1000>;
431 control: control@140000 {
432 compatible = "ti,dm814-scm", "simple-bus";
433 reg = <0x140000 0x20000>;
434 #address-cells = <1>;
436 ranges = <0 0x140000 0x20000>;
438 scm_conf: scm_conf@0 {
439 compatible = "syscon", "simple-bus";
441 #address-cells = <1>;
443 ranges = <0 0 0x800>;
445 phy_gmii_sel: phy-gmii-sel {
446 compatible = "ti,dm814-phy-gmii-sel";
452 #address-cells = <1>;
456 scm_clockdomains: clockdomains {
460 usb_ctrl_mod: control@620 {
461 compatible = "ti,am335x-usb-ctrl-module";
464 reg-names = "phy_ctrl", "wakeup";
467 edma_xbar: dma-router@f90 {
468 compatible = "ti,am335x-edma-crossbar";
472 dma-masters = <&edma>;
476 * Note that silicon revision 2.1 and older
477 * require input enabled (bit 18 set) for all
478 * 3.3V I/Os to avoid cumulative hardware damage.
479 * For more info, see errata advisory 2.1.87.
480 * We leave bit 18 out of function-mask and rely
481 * on the bootloader for it.
483 pincntl: pinmux@800 {
484 compatible = "pinctrl-single";
486 #address-cells = <1>;
488 #pinctrl-cells = <1>;
489 pinctrl-single,register-width = <32>;
490 pinctrl-single,function-mask = <0x307ff>;
493 usb1_phy: usb-phy@1b00 {
494 compatible = "ti,am335x-usb-phy";
495 reg = <0x1b00 0x100>;
497 ti,ctrl_mod = <&usb_ctrl_mod>;
503 compatible = "ti,dm814-prcm", "simple-bus";
504 reg = <0x180000 0x2000>;
505 #address-cells = <1>;
507 ranges = <0 0x180000 0x2000>;
509 prcm_clocks: clocks {
510 #address-cells = <1>;
514 prcm_clockdomains: clockdomains {
518 /* See TRM PLL_SUBSYS_BASE and "PLLSS Registers" */
519 pllss: pllss@1c5000 {
520 compatible = "ti,dm814-pllss", "simple-bus";
521 reg = <0x1c5000 0x1000>;
522 #address-cells = <1>;
524 ranges = <0 0x1c5000 0x1000>;
526 pllss_clocks: clocks {
527 #address-cells = <1>;
531 pllss_clockdomains: clockdomains {
536 compatible = "ti,omap3-wdt";
537 ti,hwmods = "wd_timer";
538 reg = <0x1c7000 0x1000>;
543 intc: interrupt-controller@48200000 {
544 compatible = "ti,dm814-intc";
545 interrupt-controller;
546 #interrupt-cells = <1>;
547 reg = <0x48200000 0x1000>;
550 /* Board must configure evtmux with edma_xbar for EDMA */
552 compatible = "ti,omap4-hsmmc";
555 interrupt-parent = <&intc>;
556 reg = <0x47810000 0x1000>;
559 target-module@49000000 {
560 compatible = "ti,sysc-omap4", "ti,sysc";
561 reg = <0x49000000 0x4>;
563 clocks = <&alwon_clkctrl DM814_TPCC_CLKCTRL 0>;
565 #address-cells = <1>;
567 ranges = <0x0 0x49000000 0x10000>;
570 compatible = "ti,edma3-tpcc";
572 reg-names = "edma3_cc";
573 interrupts = <12 13 14>;
574 interrupt-names = "edma3_ccint", "edma3_mperr",
579 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
580 <&edma_tptc2 3>, <&edma_tptc3 0>;
582 ti,edma-memcpy-channels = <20 21>;
586 target-module@49800000 {
587 compatible = "ti,sysc-omap4", "ti,sysc";
588 reg = <0x49800000 0x4>,
590 reg-names = "rev", "sysc";
591 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
592 ti,sysc-midle = <SYSC_IDLE_FORCE>;
593 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
595 clocks = <&alwon_clkctrl DM814_TPTC0_CLKCTRL 0>;
597 #address-cells = <1>;
599 ranges = <0x0 0x49800000 0x100000>;
602 compatible = "ti,edma3-tptc";
605 interrupt-names = "edma3_tcerrint";
609 target-module@49900000 {
610 compatible = "ti,sysc-omap4", "ti,sysc";
611 reg = <0x49900000 0x4>,
613 reg-names = "rev", "sysc";
614 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
615 ti,sysc-midle = <SYSC_IDLE_FORCE>;
616 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
618 clocks = <&alwon_clkctrl DM814_TPTC1_CLKCTRL 0>;
620 #address-cells = <1>;
622 ranges = <0x0 0x49900000 0x100000>;
625 compatible = "ti,edma3-tptc";
628 interrupt-names = "edma3_tcerrint";
632 target-module@49a00000 {
633 compatible = "ti,sysc-omap4", "ti,sysc";
634 reg = <0x49a00000 0x4>,
636 reg-names = "rev", "sysc";
637 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
638 ti,sysc-midle = <SYSC_IDLE_FORCE>;
639 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
641 clocks = <&alwon_clkctrl DM814_TPTC2_CLKCTRL 0>;
643 #address-cells = <1>;
645 ranges = <0x0 0x49a00000 0x100000>;
648 compatible = "ti,edma3-tptc";
651 interrupt-names = "edma3_tcerrint";
655 target-module@49b00000 {
656 compatible = "ti,sysc-omap4", "ti,sysc";
657 reg = <0x49b00000 0x4>,
659 reg-names = "rev", "sysc";
660 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
661 ti,sysc-midle = <SYSC_IDLE_FORCE>;
662 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
664 clocks = <&alwon_clkctrl DM814_TPTC3_CLKCTRL 0>;
666 #address-cells = <1>;
668 ranges = <0x0 0x49b00000 0x100000>;
671 compatible = "ti,edma3-tptc";
674 interrupt-names = "edma3_tcerrint";
678 /* See TRM "Table 1-318. L4HS Instance Summary" */
679 l4hs: l4hs@4a000000 {
680 compatible = "ti,dm814-l4hs", "simple-bus";
681 #address-cells = <1>;
683 ranges = <0 0x4a000000 0x1b4040>;
685 target-module@100000 {
686 compatible = "ti,sysc-omap4-simple", "ti,sysc";
687 reg = <0x100900 0x4>,
690 reg-names = "rev", "sysc", "syss";
692 ti,sysc-midle = <SYSC_IDLE_FORCE>,
694 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
697 clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
699 #address-cells = <1>;
701 ranges = <0 0x100000 0x8000>;
704 compatible = "ti,cpsw";
705 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
706 clock-names = "fck", "cpts";
707 cpdma_channels = <8>;
708 ale_entries = <1024>;
709 bd_ram_size = <0x2000>;
710 mac_control = <0x20>;
713 cpts_clock_mult = <0x80000000>;
714 cpts_clock_shift = <29>;
717 #address-cells = <1>;
725 interrupts = <40 41 42 43>;
726 ranges = <0 0 0x8000>;
727 syscon = <&scm_conf>;
729 davinci_mdio: mdio@800 {
730 compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
731 clocks = <&cpsw_125mhz_gclk>;
733 #address-cells = <1>;
735 bus_freq = <1000000>;
739 cpsw_emac0: slave@200 {
740 /* Filled in by U-Boot */
741 mac-address = [ 00 00 00 00 00 00 ];
742 phys = <&phy_gmii_sel 1>;
745 cpsw_emac1: slave@300 {
746 /* Filled in by U-Boot */
747 mac-address = [ 00 00 00 00 00 00 ];
748 phys = <&phy_gmii_sel 2>;
754 gpmc: gpmc@50000000 {
755 compatible = "ti,am3352-gpmc";
758 reg = <0x50000000 0x2000>;
761 gpmc,num-waitpins = <2>;
762 #address-cells = <2>;
764 interrupt-controller;
765 #interrupt-cells = <2>;
772 #include "dm814x-clocks.dtsi"
774 /* Preferred always-on timer for clocksource */
779 assigned-clocks = <&timer1_fck>;
780 assigned-clock-parents = <&devosc_ck>;
784 /* Preferred timer for clockevent */
789 assigned-clocks = <&timer2_fck>;
790 assigned-clock-parents = <&devosc_ck>;