arch/arm/boot/dts/bcm53573.dtsi

   1 /*
   2  * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
   3  *
   4  * Licensed under the ISC license.
   5  */
   6
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9 #include <dt-bindings/interrupt-controller/irq.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include "skeleton.dtsi"
  12
  13 / {
  14         interrupt-parent = <&gic>;
  15
  16         aliases {
  17                 serial0 = &uart0;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22         };
  23
  24         cpus {
  25                 #address-cells = <1>;
  26                 #size-cells = <0>;
  27
  28                 cpu@0 {
  29                         device_type = "cpu";
  30                         compatible = "arm,cortex-a7";
  31                         reg = <0x0>;
  32                 };
  33         };
  34
  35         mpcore {
  36                 compatible = "simple-bus";
  37                 ranges = <0x00000000 0x18310000 0x00008000>;
  38                 #address-cells = <1>;
  39                 #size-cells = <1>;
  40
  41                 gic: interrupt-controller@1000 {
  42                         compatible = "arm,cortex-a7-gic";
  43                         #interrupt-cells = <3>;
  44                         #address-cells = <0>;
  45                         interrupt-controller;
  46                         reg = <0x1000 0x1000>,
  47                               <0x2000 0x0100>;
  48                 };
  49         };
  50
  51         timer {
  52                 compatible = "arm,armv7-timer";
  53                 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
  54                              <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
  55                              <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
  56                              <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
  57         };
  58
  59         clocks {
  60                 #address-cells = <1>;
  61                 #size-cells = <1>;
  62                 ranges;
  63
  64                 alp: oscillator {
  65                         #clock-cells = <0>;
  66                         compatible = "fixed-clock";
  67                         clock-frequency = <40000000>;
  68                 };
  69         };
  70
  71         axi@18000000 {
  72                 compatible = "brcm,bus-axi";
  73                 reg = <0x18000000 0x1000>;
  74                 ranges = <0x00000000 0x18000000 0x00100000>;
  75                 #address-cells = <1>;
  76                 #size-cells = <1>;
  77
  78                 #interrupt-cells = <1>;
  79                 interrupt-map-mask = <0x000fffff 0xffff>;
  80                 interrupt-map =
  81                         /* ChipCommon */
  82                         <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
  83
  84                         /* IEEE 802.11 0 */
  85                         <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
  86
  87                         /* PCIe Controller 0 */
  88                         <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  89                         <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  90                         <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  91                         <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  92                         <0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  93                         <0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
  94
  95                         /* USB 2.0 Controller */
  96                         <0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
  97
  98                         /* Ethernet Controller 0 */
  99                         <0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
 100
 101                         /* IEEE 802.11 1 */
 102                         <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
 103
 104                         /* Ethernet Controller 1 */
 105                         <0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 106
 107                 chipcommon: chipcommon@0 {
 108                         compatible = "simple-bus";
 109                         reg = <0x00000000 0x1000>;
 110                         ranges;
 111
 112                         #address-cells = <1>;
 113                         #size-cells = <1>;
 114
 115                         gpio-controller;
 116                         #gpio-cells = <2>;
 117
 118                         uart0: serial@300 {
 119                                 compatible = "ns16550a";
 120                                 reg = <0x0300 0x100>;
 121                                 interrupt-parent = <&gic>;
 122                                 interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>;
 123                                 clocks = <&alp>;
 124                                 status = "okay";
 125                         };
 126                 };
 127
 128                 pcie0: pcie@2000 {
 129                         reg = <0x00002000 0x1000>;
 130                 };
 131
 132                 usb2: usb2@4000 {
 133                         reg = <0x4000 0x1000>;
 134                         ranges;
 135                         #address-cells = <1>;
 136                         #size-cells = <1>;
 137
 138                         ehci: ehci@4000 {
 139                                 compatible = "generic-ehci";
 140                                 reg = <0x4000 0x1000>;
 141                                 interrupt-parent = <&gic>;
 142                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 143
 144                                 #address-cells = <1>;
 145                                 #size-cells = <0>;
 146
 147                                 ehci_port1: port@1 {
 148                                         reg = <1>;
 149                                         #trigger-source-cells = <0>;
 150                                 };
 151
 152                                 ehci_port2: port@2 {
 153                                         reg = <2>;
 154                                         #trigger-source-cells = <0>;
 155                                 };
 156                         };
 157
 158                         ohci: ohci@d000 {
 159                                 #usb-cells = <0>;
 160
 161                                 compatible = "generic-ohci";
 162                                 reg = <0xd000 0x1000>;
 163                                 interrupt-parent = <&gic>;
 164                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 165
 166                                 #address-cells = <1>;
 167                                 #size-cells = <0>;
 168
 169                                 ohci_port1: port@1 {
 170                                         reg = <1>;
 171                                         #trigger-source-cells = <0>;
 172                                 };
 173
 174                                 ohci_port2: port@2 {
 175                                         reg = <2>;
 176                                         #trigger-source-cells = <0>;
 177                                 };
 178                         };
 179                 };
 180
 181                 gmac0: ethernet@5000 {
 182                         reg = <0x5000 0x1000>;
 183                 };
 184
 185                 gmac1: ethernet@b000 {
 186                         reg = <0xb000 0x1000>;
 187                 };
 188
 189                 pmu@12000 {
 190                         compatible = "simple-mfd", "syscon";
 191                         reg = <0x00012000 0x00001000>;
 192
 193                         ilp: ilp {
 194                                 compatible = "brcm,bcm53573-ilp";
 195                                 clocks = <&alp>;
 196                                 #clock-cells = <0>;
 197                                 clock-output-names = "ilp";
 198                         };
 199                 };
 200         };
 201 };