arch/arm/boot/dts/bcm5301x.dtsi

   1 /*
   2  * Broadcom BCM470X / BCM5301X ARM platform code.
   3  * Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
   4  * BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
   5  *
   6  * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
   7  *
   8  * Licensed under the GNU/GPL. See COPYING for details.
   9  */
  10
  11 #include <dt-bindings/clock/bcm-nsp.h>
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/input.h>
  14 #include <dt-bindings/interrupt-controller/irq.h>
  15 #include <dt-bindings/interrupt-controller/arm-gic.h>
  16
  17 / {
  18         #address-cells = <1>;
  19         #size-cells = <1>;
  20         interrupt-parent = <&gic>;
  21
  22         chipcommon-a-bus@18000000 {
  23                 compatible = "simple-bus";
  24                 ranges = <0x00000000 0x18000000 0x00001000>;
  25                 #address-cells = <1>;
  26                 #size-cells = <1>;
  27
  28                 uart0: serial@300 {
  29                         compatible = "ns16550";
  30                         reg = <0x0300 0x100>;
  31                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  32                         clocks = <&iprocslow>;
  33                         status = "disabled";
  34                 };
  35
  36                 uart1: serial@400 {
  37                         compatible = "ns16550";
  38                         reg = <0x0400 0x100>;
  39                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  40                         clocks = <&iprocslow>;
  41                         pinctrl-names = "default";
  42                         pinctrl-0 = <&pinmux_uart1>;
  43                         status = "disabled";
  44                 };
  45         };
  46
  47         mpcore-bus@19000000 {
  48                 compatible = "simple-bus";
  49                 ranges = <0x00000000 0x19000000 0x00023000>;
  50                 #address-cells = <1>;
  51                 #size-cells = <1>;
  52
  53                 a9pll: arm_clk@0 {
  54                         #clock-cells = <0>;
  55                         compatible = "brcm,nsp-armpll";
  56                         clocks = <&osc>;
  57                         reg = <0x00000 0x1000>;
  58                 };
  59
  60                 scu@20000 {
  61                         compatible = "arm,cortex-a9-scu";
  62                         reg = <0x20000 0x100>;
  63                 };
  64
  65                 timer@20200 {
  66                         compatible = "arm,cortex-a9-global-timer";
  67                         reg = <0x20200 0x100>;
  68                         interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
  69                         clocks = <&periph_clk>;
  70                 };
  71
  72                 timer@20600 {
  73                         compatible = "arm,cortex-a9-twd-timer";
  74                         reg = <0x20600 0x20>;
  75                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
  76                                                   IRQ_TYPE_EDGE_RISING)>;
  77                         clocks = <&periph_clk>;
  78                 };
  79
  80                 watchdog@20620 {
  81                         compatible = "arm,cortex-a9-twd-wdt";
  82                         reg = <0x20620 0x20>;
  83                         interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) |
  84                                                   IRQ_TYPE_EDGE_RISING)>;
  85                         clocks = <&periph_clk>;
  86                 };
  87
  88                 gic: interrupt-controller@21000 {
  89                         compatible = "arm,cortex-a9-gic";
  90                         #interrupt-cells = <3>;
  91                         #address-cells = <0>;
  92                         interrupt-controller;
  93                         reg = <0x21000 0x1000>,
  94                               <0x20100 0x100>;
  95                 };
  96
  97                 L2: cache-controller@22000 {
  98                         compatible = "arm,pl310-cache";
  99                         reg = <0x22000 0x1000>;
 100                         cache-unified;
 101                         arm,shared-override;
 102                         prefetch-data = <1>;
 103                         prefetch-instr = <1>;
 104                         cache-level = <2>;
 105                 };
 106         };
 107
 108         pmu {
 109                 compatible = "arm,cortex-a9-pmu";
 110                 interrupts =
 111                         <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
 112                         <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 113         };
 114
 115         clocks {
 116                 #address-cells = <1>;
 117                 #size-cells = <1>;
 118                 ranges;
 119
 120                 osc: oscillator {
 121                         #clock-cells = <0>;
 122                         compatible = "fixed-clock";
 123                         clock-frequency = <25000000>;
 124                 };
 125
 126                 iprocmed: iprocmed {
 127                         #clock-cells = <0>;
 128                         compatible = "fixed-factor-clock";
 129                         clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
 130                         clock-div = <2>;
 131                         clock-mult = <1>;
 132                 };
 133
 134                 iprocslow: iprocslow {
 135                         #clock-cells = <0>;
 136                         compatible = "fixed-factor-clock";
 137                         clocks = <&genpll BCM_NSP_GENPLL_IPROCFAST_CLK>;
 138                         clock-div = <4>;
 139                         clock-mult = <1>;
 140                 };
 141
 142                 periph_clk: periph_clk {
 143                         #clock-cells = <0>;
 144                         compatible = "fixed-factor-clock";
 145                         clocks = <&a9pll>;
 146                         clock-div = <2>;
 147                         clock-mult = <1>;
 148                 };
 149         };
 150
 151         usb2_phy: usb2-phy@1800c000 {
 152                 compatible = "brcm,ns-usb2-phy";
 153                 reg = <0x1800c000 0x1000>;
 154                 reg-names = "dmu";
 155                 #phy-cells = <0>;
 156                 clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>;
 157                 clock-names = "phy-ref-clk";
 158         };
 159
 160         axi@18000000 {
 161                 compatible = "brcm,bus-axi";
 162                 reg = <0x18000000 0x1000>;
 163                 ranges = <0x00000000 0x18000000 0x00100000>;
 164                 #address-cells = <1>;
 165                 #size-cells = <1>;
 166
 167                 #interrupt-cells = <1>;
 168                 interrupt-map-mask = <0x000fffff 0xffff>;
 169                 interrupt-map =
 170                         /* ChipCommon */
 171                         <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 172
 173                         /* Switch Register Access Block */
 174                         <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
 175                         <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
 176                         <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
 177                         <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
 178                         <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
 179                         <0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
 180                         <0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
 181                         <0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
 182                         <0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
 183                         <0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
 184                         <0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
 185                         <0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
 186                         <0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
 187
 188                         /* PCIe Controller 0 */
 189                         <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 190                         <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
 191                         <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 192                         <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 193                         <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
 194                         <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 195
 196                         /* PCIe Controller 1 */
 197                         <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 198                         <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
 199                         <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
 200                         <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
 201                         <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 202                         <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 203
 204                         /* PCIe Controller 2 */
 205                         <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
 206                         <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
 207                         <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
 208                         <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
 209                         <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 210                         <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
 211
 212                         /* USB 2.0 Controller */
 213                         <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
 214
 215                         /* USB 3.0 Controller */
 216                         <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
 217
 218                         /* Ethernet Controller 0 */
 219                         <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
 220
 221                         /* Ethernet Controller 1 */
 222                         <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
 223
 224                         /* Ethernet Controller 2 */
 225                         <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
 226
 227                         /* Ethernet Controller 3 */
 228                         <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
 229
 230                         /* NAND Controller */
 231                         <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
 232                         <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
 233                         <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
 234                         <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 235                         <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 236                         <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
 237                         <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
 238                         <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 239
 240                 chipcommon: chipcommon@0 {
 241                         reg = <0x00000000 0x1000>;
 242
 243                         gpio-controller;
 244                         #gpio-cells = <2>;
 245                         interrupt-controller;
 246                         #interrupt-cells = <2>;
 247                 };
 248
 249                 pcie0: pcie@12000 {
 250                         reg = <0x00012000 0x1000>;
 251                 };
 252
 253                 pcie1: pcie@13000 {
 254                         reg = <0x00013000 0x1000>;
 255                 };
 256
 257                 pcie2: pcie@14000 {
 258                         reg = <0x00014000 0x1000>;
 259                 };
 260
 261                 usb2: usb2@21000 {
 262                         reg = <0x00021000 0x1000>;
 263
 264                         #address-cells = <1>;
 265                         #size-cells = <1>;
 266                         ranges;
 267
 268                         interrupt-parent = <&gic>;
 269
 270                         ehci: usb@21000 {
 271                                 #usb-cells = <0>;
 272
 273                                 compatible = "generic-ehci";
 274                                 reg = <0x00021000 0x1000>;
 275                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 276                                 phys = <&usb2_phy>;
 277
 278                                 #address-cells = <1>;
 279                                 #size-cells = <0>;
 280
 281                                 ehci_port1: port@1 {
 282                                         reg = <1>;
 283                                         #trigger-source-cells = <0>;
 284                                 };
 285
 286                                 ehci_port2: port@2 {
 287                                         reg = <2>;
 288                                         #trigger-source-cells = <0>;
 289                                 };
 290                         };
 291
 292                         ohci: usb@22000 {
 293                                 #usb-cells = <0>;
 294
 295                                 compatible = "generic-ohci";
 296                                 reg = <0x00022000 0x1000>;
 297                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 298
 299                                 #address-cells = <1>;
 300                                 #size-cells = <0>;
 301
 302                                 ohci_port1: port@1 {
 303                                         reg = <1>;
 304                                         #trigger-source-cells = <0>;
 305                                 };
 306
 307                                 ohci_port2: port@2 {
 308                                         reg = <2>;
 309                                         #trigger-source-cells = <0>;
 310                                 };
 311                         };
 312                 };
 313
 314                 usb3: usb3@23000 {
 315                         reg = <0x00023000 0x1000>;
 316
 317                         #address-cells = <1>;
 318                         #size-cells = <1>;
 319                         ranges;
 320
 321                         interrupt-parent = <&gic>;
 322
 323                         xhci: usb@23000 {
 324                                 #usb-cells = <0>;
 325
 326                                 compatible = "generic-xhci";
 327                                 reg = <0x00023000 0x1000>;
 328                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 329                                 phys = <&usb3_phy>;
 330                                 phy-names = "usb";
 331
 332                                 #address-cells = <1>;
 333                                 #size-cells = <0>;
 334
 335                                 xhci_port1: port@1 {
 336                                         reg = <1>;
 337                                         #trigger-source-cells = <0>;
 338                                 };
 339                         };
 340                 };
 341
 342                 gmac0: ethernet@24000 {
 343                         reg = <0x24000 0x800>;
 344                 };
 345
 346                 gmac1: ethernet@25000 {
 347                         reg = <0x25000 0x800>;
 348                 };
 349
 350                 gmac2: ethernet@26000 {
 351                         reg = <0x26000 0x800>;
 352                 };
 353
 354                 gmac3: ethernet@27000 {
 355                         reg = <0x27000 0x800>;
 356                 };
 357         };
 358
 359         pwm: pwm@18002000 {
 360                 compatible = "brcm,iproc-pwm";
 361                 reg = <0x18002000 0x28>;
 362                 clocks = <&osc>;
 363                 #pwm-cells = <3>;
 364                 status = "disabled";
 365         };
 366
 367         mdio: mdio@18003000 {
 368                 compatible = "brcm,iproc-mdio";
 369                 reg = <0x18003000 0x8>;
 370                 #size-cells = <0>;
 371                 #address-cells = <1>;
 372         };
 373
 374         mdio-mux@18003000 {
 375                 compatible = "mdio-mux-mmioreg", "mdio-mux";
 376                 mdio-parent-bus = <&mdio>;
 377                 #address-cells = <1>;
 378                 #size-cells = <0>;
 379                 reg = <0x18003000 0x4>;
 380                 mux-mask = <0x200>;
 381
 382                 mdio@0 {
 383                         reg = <0x0>;
 384                         #address-cells = <1>;
 385                         #size-cells = <0>;
 386
 387                         usb3_phy: usb3-phy@10 {
 388                                 compatible = "brcm,ns-ax-usb3-phy";
 389                                 reg = <0x10>;
 390                                 usb3-dmp-syscon = <&usb3_dmp>;
 391                                 #phy-cells = <0>;
 392                                 status = "disabled";
 393                         };
 394                 };
 395         };
 396
 397         usb3_dmp: syscon@18105000 {
 398                 reg = <0x18105000 0x1000>;
 399         };
 400
 401         uart2: serial@18008000 {
 402                 compatible = "ns16550a";
 403                 reg = <0x18008000 0x20>;
 404                 clocks = <&iprocslow>;
 405                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 406                 reg-shift = <2>;
 407                 status = "disabled";
 408         };
 409
 410         i2c0: i2c@18009000 {
 411                 compatible = "brcm,iproc-i2c";
 412                 reg = <0x18009000 0x50>;
 413                 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
 414                 #address-cells = <1>;
 415                 #size-cells = <0>;
 416                 clock-frequency = <100000>;
 417                 status = "disabled";
 418         };
 419
 420         dmu-bus@1800c000 {
 421                 compatible = "simple-bus";
 422                 ranges = <0 0x1800c000 0x1000>;
 423                 #address-cells = <1>;
 424                 #size-cells = <1>;
 425
 426                 cru@100 {
 427                         compatible = "simple-bus";
 428                         reg = <0x100 0x1a4>;
 429                         ranges;
 430                         #address-cells = <1>;
 431                         #size-cells = <1>;
 432
 433                         lcpll0: lcpll0@100 {
 434                                 #clock-cells = <1>;
 435                                 compatible = "brcm,nsp-lcpll0";
 436                                 reg = <0x100 0x14>;
 437                                 clocks = <&osc>;
 438                                 clock-output-names = "lcpll0", "pcie_phy",
 439                                                      "sdio", "ddr_phy";
 440                         };
 441
 442                         genpll: genpll@140 {
 443                                 #clock-cells = <1>;
 444                                 compatible = "brcm,nsp-genpll";
 445                                 reg = <0x140 0x24>;
 446                                 clocks = <&osc>;
 447                                 clock-output-names = "genpll", "phy",
 448                                                      "ethernetclk",
 449                                                      "usbclk", "iprocfast",
 450                                                      "sata1", "sata2";
 451                         };
 452
 453                         pinctrl: pin-controller@1c0 {
 454                                 compatible = "brcm,bcm4708-pinmux";
 455                                 reg = <0x1c0 0x24>;
 456                                 reg-names = "cru_gpio_control";
 457
 458                                 spi-pins {
 459                                         groups = "spi_grp";
 460                                         function = "spi";
 461                                 };
 462
 463                                 pinmux_i2c: i2c-pins {
 464                                         groups = "i2c_grp";
 465                                         function = "i2c";
 466                                 };
 467
 468                                 pinmux_pwm: pwm-pins {
 469                                         groups = "pwm0_grp", "pwm1_grp",
 470                                                  "pwm2_grp", "pwm3_grp";
 471                                         function = "pwm";
 472                                 };
 473
 474                                 pinmux_uart1: uart1-pins {
 475                                         groups = "uart1_grp";
 476                                         function = "uart1";
 477                                 };
 478                         };
 479
 480                         thermal: thermal@2c0 {
 481                                 compatible = "brcm,ns-thermal";
 482                                 reg = <0x2c0 0x10>;
 483                                 #thermal-sensor-cells = <0>;
 484                         };
 485                 };
 486         };
 487
 488         srab: ethernet-switch@18007000 {
 489                 compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
 490                 reg = <0x18007000 0x1000>;
 491
 492                 status = "disabled";
 493
 494                 /* ports are defined in board DTS */
 495                 ports {
 496                         #address-cells = <1>;
 497                         #size-cells = <0>;
 498                 };
 499         };
 500
 501         rng: rng@18004000 {
 502                 compatible = "brcm,bcm5301x-rng";
 503                 reg = <0x18004000 0x14>;
 504         };
 505
 506         nand_controller: nand-controller@18028000 {
 507                 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
 508                 reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
 509                 reg-names = "nand", "iproc-idm", "iproc-ext";
 510                 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 511
 512                 #address-cells = <1>;
 513                 #size-cells = <0>;
 514
 515                 brcm,nand-has-wp;
 516         };
 517
 518         spi@18029200 {
 519                 compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
 520                 reg = <0x18029200 0x184>,
 521                       <0x18029000 0x124>,
 522                       <0x1811b408 0x004>,
 523                       <0x180293a0 0x01c>;
 524                 reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
 525                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
 526                              <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
 527                              <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 528                              <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 529                              <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 530                              <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
 531                              <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 532                 interrupt-names = "mspi_done",
 533                                   "mspi_halted",
 534                                   "spi_lr_fullness_reached",
 535                                   "spi_lr_session_aborted",
 536                                   "spi_lr_impatient",
 537                                   "spi_lr_session_done",
 538                                   "spi_lr_overread";
 539                 clocks = <&iprocmed>;
 540                 clock-names = "iprocmed";
 541                 num-cs = <2>;
 542                 #address-cells = <1>;
 543                 #size-cells = <0>;
 544
 545                 spi_nor: flash@0 {
 546                         compatible = "jedec,spi-nor";
 547                         reg = <0>;
 548                         spi-max-frequency = <20000000>;
 549                         status = "disabled";
 550
 551                         partitions {
 552                                 compatible = "brcm,bcm947xx-cfe-partitions";
 553                         };
 554                 };
 555         };
 556
 557         thermal-zones {
 558                 cpu_thermal: cpu-thermal {
 559                         polling-delay-passive = <0>;
 560                         polling-delay = <1000>;
 561                         coefficients = <(-556) 418000>;
 562                         thermal-sensors = <&thermal>;
 563
 564                         trips {
 565                                 cpu-crit {
 566                                         temperature     = <125000>;
 567                                         hysteresis      = <0>;
 568                                         type            = "critical";
 569                                 };
 570                         };
 571
 572                         cooling-maps {
 573                         };
 574                 };
 575         };
 576 };