arch/arm/boot/dts/bcm283x.dtsi

   1 #include <dt-bindings/pinctrl/bcm2835.h>
   2 #include <dt-bindings/clock/bcm2835.h>
   3 #include <dt-bindings/clock/bcm2835-aux.h>
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/interrupt-controller/irq.h>
   6 #include <dt-bindings/soc/bcm2835-pm.h>
   7
   8 /* firmware-provided startup stubs live here, where the secondary CPUs are
   9  * spinning.
  10  */
  11 /memreserve/ 0x00000000 0x00001000;
  12
  13 /* This include file covers the common peripherals and configuration between
  14  * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
  15  * bcm2835.dtsi and bcm2836.dtsi.
  16  */
  17
  18 / {
  19         compatible = "brcm,bcm2835";
  20         model = "BCM2835";
  21         interrupt-parent = <&intc>;
  22         #address-cells = <1>;
  23         #size-cells = <1>;
  24
  25         aliases {
  26                 serial0 = &uart0;
  27                 serial1 = &uart1;
  28         };
  29
  30         chosen {
  31                 stdout-path = "serial0:115200n8";
  32         };
  33
  34         thermal-zones {
  35                 cpu_thermal: cpu-thermal {
  36                         polling-delay-passive = <0>;
  37                         polling-delay = <1000>;
  38
  39                         thermal-sensors = <&thermal>;
  40
  41                         trips {
  42                                 cpu-crit {
  43                                         temperature     = <90000>;
  44                                         hysteresis      = <0>;
  45                                         type            = "critical";
  46                                 };
  47                         };
  48
  49                         cooling-maps {
  50                         };
  51                 };
  52         };
  53
  54         soc {
  55                 compatible = "simple-bus";
  56                 #address-cells = <1>;
  57                 #size-cells = <1>;
  58
  59                 timer@7e003000 {
  60                         compatible = "brcm,bcm2835-system-timer";
  61                         reg = <0x7e003000 0x1000>;
  62                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  63                         /* This could be a reference to BCM2835_CLOCK_TIMER,
  64                          * but we don't have the driver using the common clock
  65                          * support yet.
  66                          */
  67                         clock-frequency = <1000000>;
  68                 };
  69
  70                 txp@7e004000 {
  71                         compatible = "brcm,bcm2835-txp";
  72                         reg = <0x7e004000 0x20>;
  73                         interrupts = <1 11>;
  74                 };
  75
  76                 dma: dma@7e007000 {
  77                         compatible = "brcm,bcm2835-dma";
  78                         reg = <0x7e007000 0xf00>;
  79                         interrupts = <1 16>,
  80                                      <1 17>,
  81                                      <1 18>,
  82                                      <1 19>,
  83                                      <1 20>,
  84                                      <1 21>,
  85                                      <1 22>,
  86                                      <1 23>,
  87                                      <1 24>,
  88                                      <1 25>,
  89                                      <1 26>,
  90                                      /* dma channel 11-14 share one irq */
  91                                      <1 27>,
  92                                      <1 27>,
  93                                      <1 27>,
  94                                      <1 27>,
  95                                      /* unused shared irq for all channels */
  96                                      <1 28>;
  97                         interrupt-names = "dma0",
  98                                           "dma1",
  99                                           "dma2",
 100                                           "dma3",
 101                                           "dma4",
 102                                           "dma5",
 103                                           "dma6",
 104                                           "dma7",
 105                                           "dma8",
 106                                           "dma9",
 107                                           "dma10",
 108                                           "dma11",
 109                                           "dma12",
 110                                           "dma13",
 111                                           "dma14",
 112                                           "dma-shared-all";
 113                         #dma-cells = <1>;
 114                         brcm,dma-channel-mask = <0x7f35>;
 115                 };
 116
 117                 intc: interrupt-controller@7e00b200 {
 118                         compatible = "brcm,bcm2835-armctrl-ic";
 119                         reg = <0x7e00b200 0x200>;
 120                         interrupt-controller;
 121                         #interrupt-cells = <2>;
 122                 };
 123
 124                 pm: watchdog@7e100000 {
 125                         compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
 126                         #power-domain-cells = <1>;
 127                         #reset-cells = <1>;
 128                         reg = <0x7e100000 0x114>,
 129                               <0x7e00a000 0x24>;
 130                         clocks = <&clocks BCM2835_CLOCK_V3D>,
 131                                  <&clocks BCM2835_CLOCK_PERI_IMAGE>,
 132                                  <&clocks BCM2835_CLOCK_H264>,
 133                                  <&clocks BCM2835_CLOCK_ISP>;
 134                         clock-names = "v3d", "peri_image", "h264", "isp";
 135                         system-power-controller;
 136                 };
 137
 138                 clocks: cprman@7e101000 {
 139                         compatible = "brcm,bcm2835-cprman";
 140                         #clock-cells = <1>;
 141                         reg = <0x7e101000 0x2000>;
 142
 143                         /* CPRMAN derives almost everything from the
 144                          * platform's oscillator.  However, the DSI
 145                          * pixel clocks come from the DSI analog PHY.
 146                          */
 147                         clocks = <&clk_osc>,
 148                                 <&dsi0 0>, <&dsi0 1>, <&dsi0 2>,
 149                                 <&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
 150                 };
 151
 152                 rng@7e104000 {
 153                         compatible = "brcm,bcm2835-rng";
 154                         reg = <0x7e104000 0x10>;
 155                         interrupts = <2 29>;
 156                 };
 157
 158                 mailbox: mailbox@7e00b880 {
 159                         compatible = "brcm,bcm2835-mbox";
 160                         reg = <0x7e00b880 0x40>;
 161                         interrupts = <0 1>;
 162                         #mbox-cells = <0>;
 163                 };
 164
 165                 gpio: gpio@7e200000 {
 166                         compatible = "brcm,bcm2835-gpio";
 167                         reg = <0x7e200000 0xb4>;
 168                         /*
 169                          * The GPIO IP block is designed for 3 banks of GPIOs.
 170                          * Each bank has a GPIO interrupt for itself.
 171                          * There is an overall "any bank" interrupt.
 172                          * In order, these are GIC interrupts 17, 18, 19, 20.
 173                          * Since the BCM2835 only has 2 banks, the 2nd bank
 174                          * interrupt output appears to be mirrored onto the
 175                          * 3rd bank's interrupt signal.
 176                          * So, a bank0 interrupt shows up on 17, 20, and
 177                          * a bank1 interrupt shows up on 18, 19, 20!
 178                          */
 179                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
 180
 181                         gpio-controller;
 182                         #gpio-cells = <2>;
 183
 184                         interrupt-controller;
 185                         #interrupt-cells = <2>;
 186                         gpio-ranges = <&gpio 0 0 54>;
 187
 188                         /* Defines pin muxing groups according to
 189                          * BCM2835-ARM-Peripherals.pdf page 102.
 190                          *
 191                          * While each pin can have its mux selected
 192                          * for various functions individually, some
 193                          * groups only make sense to switch to a
 194                          * particular function together.
 195                          */
 196                         dpi_gpio0: dpi_gpio0 {
 197                                 brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
 198                                              12 13 14 15 16 17 18 19
 199                                              20 21 22 23 24 25 26 27>;
 200                                 brcm,function = <BCM2835_FSEL_ALT2>;
 201                         };
 202                         emmc_gpio22: emmc_gpio22 {
 203                                 brcm,pins = <22 23 24 25 26 27>;
 204                                 brcm,function = <BCM2835_FSEL_ALT3>;
 205                         };
 206                         emmc_gpio34: emmc_gpio34 {
 207                                 brcm,pins = <34 35 36 37 38 39>;
 208                                 brcm,function = <BCM2835_FSEL_ALT3>;
 209                                 brcm,pull = <BCM2835_PUD_OFF
 210                                              BCM2835_PUD_UP
 211                                              BCM2835_PUD_UP
 212                                              BCM2835_PUD_UP
 213                                              BCM2835_PUD_UP
 214                                              BCM2835_PUD_UP>;
 215                         };
 216                         emmc_gpio48: emmc_gpio48 {
 217                                 brcm,pins = <48 49 50 51 52 53>;
 218                                 brcm,function = <BCM2835_FSEL_ALT3>;
 219                         };
 220
 221                         gpclk0_gpio4: gpclk0_gpio4 {
 222                                 brcm,pins = <4>;
 223                                 brcm,function = <BCM2835_FSEL_ALT0>;
 224                         };
 225                         gpclk1_gpio5: gpclk1_gpio5 {
 226                                 brcm,pins = <5>;
 227                                 brcm,function = <BCM2835_FSEL_ALT0>;
 228                         };
 229                         gpclk1_gpio42: gpclk1_gpio42 {
 230                                 brcm,pins = <42>;
 231                                 brcm,function = <BCM2835_FSEL_ALT0>;
 232                         };
 233                         gpclk1_gpio44: gpclk1_gpio44 {
 234                                 brcm,pins = <44>;
 235                                 brcm,function = <BCM2835_FSEL_ALT0>;
 236                         };
 237                         gpclk2_gpio6: gpclk2_gpio6 {
 238                                 brcm,pins = <6>;
 239                                 brcm,function = <BCM2835_FSEL_ALT0>;
 240                         };
 241                         gpclk2_gpio43: gpclk2_gpio43 {
 242                                 brcm,pins = <43>;
 243                                 brcm,function = <BCM2835_FSEL_ALT0>;
 244                                 brcm,pull = <BCM2835_PUD_OFF>;
 245                         };
 246
 247                         i2c0_gpio0: i2c0_gpio0 {
 248                                 brcm,pins = <0 1>;
 249                                 brcm,function = <BCM2835_FSEL_ALT0>;
 250                         };
 251                         i2c0_gpio28: i2c0_gpio28 {
 252                                 brcm,pins = <28 29>;
 253                                 brcm,function = <BCM2835_FSEL_ALT0>;
 254                         };
 255                         i2c0_gpio44: i2c0_gpio44 {
 256                                 brcm,pins = <44 45>;
 257                                 brcm,function = <BCM2835_FSEL_ALT1>;
 258                         };
 259                         i2c1_gpio2: i2c1_gpio2 {
 260                                 brcm,pins = <2 3>;
 261                                 brcm,function = <BCM2835_FSEL_ALT0>;
 262                         };
 263                         i2c1_gpio44: i2c1_gpio44 {
 264                                 brcm,pins = <44 45>;
 265                                 brcm,function = <BCM2835_FSEL_ALT2>;
 266                         };
 267                         i2c_slave_gpio18: i2c_slave_gpio18 {
 268                                 brcm,pins = <18 19 20 21>;
 269                                 brcm,function = <BCM2835_FSEL_ALT3>;
 270                         };
 271
 272                         jtag_gpio4: jtag_gpio4 {
 273                                 brcm,pins = <4 5 6 12 13>;
 274                                 brcm,function = <BCM2835_FSEL_ALT5>;
 275                         };
 276                         jtag_gpio22: jtag_gpio22 {
 277                                 brcm,pins = <22 23 24 25 26 27>;
 278                                 brcm,function = <BCM2835_FSEL_ALT4>;
 279                         };
 280
 281                         pcm_gpio18: pcm_gpio18 {
 282                                 brcm,pins = <18 19 20 21>;
 283                                 brcm,function = <BCM2835_FSEL_ALT0>;
 284                         };
 285                         pcm_gpio28: pcm_gpio28 {
 286                                 brcm,pins = <28 29 30 31>;
 287                                 brcm,function = <BCM2835_FSEL_ALT2>;
 288                         };
 289
 290                         pwm0_gpio12: pwm0_gpio12 {
 291                                 brcm,pins = <12>;
 292                                 brcm,function = <BCM2835_FSEL_ALT0>;
 293                         };
 294                         pwm0_gpio18: pwm0_gpio18 {
 295                                 brcm,pins = <18>;
 296                                 brcm,function = <BCM2835_FSEL_ALT5>;
 297                         };
 298                         pwm0_gpio40: pwm0_gpio40 {
 299                                 brcm,pins = <40>;
 300                                 brcm,function = <BCM2835_FSEL_ALT0>;
 301                         };
 302                         pwm1_gpio13: pwm1_gpio13 {
 303                                 brcm,pins = <13>;
 304                                 brcm,function = <BCM2835_FSEL_ALT0>;
 305                         };
 306                         pwm1_gpio19: pwm1_gpio19 {
 307                                 brcm,pins = <19>;
 308                                 brcm,function = <BCM2835_FSEL_ALT5>;
 309                         };
 310                         pwm1_gpio41: pwm1_gpio41 {
 311                                 brcm,pins = <41>;
 312                                 brcm,function = <BCM2835_FSEL_ALT0>;
 313                         };
 314                         pwm1_gpio45: pwm1_gpio45 {
 315                                 brcm,pins = <45>;
 316                                 brcm,function = <BCM2835_FSEL_ALT0>;
 317                         };
 318
 319                         sdhost_gpio48: sdhost_gpio48 {
 320                                 brcm,pins = <48 49 50 51 52 53>;
 321                                 brcm,function = <BCM2835_FSEL_ALT0>;
 322                         };
 323
 324                         spi0_gpio7: spi0_gpio7 {
 325                                 brcm,pins = <7 8 9 10 11>;
 326                                 brcm,function = <BCM2835_FSEL_ALT0>;
 327                         };
 328                         spi0_gpio35: spi0_gpio35 {
 329                                 brcm,pins = <35 36 37 38 39>;
 330                                 brcm,function = <BCM2835_FSEL_ALT0>;
 331                         };
 332                         spi1_gpio16: spi1_gpio16 {
 333                                 brcm,pins = <16 17 18 19 20 21>;
 334                                 brcm,function = <BCM2835_FSEL_ALT4>;
 335                         };
 336                         spi2_gpio40: spi2_gpio40 {
 337                                 brcm,pins = <40 41 42 43 44 45>;
 338                                 brcm,function = <BCM2835_FSEL_ALT4>;
 339                         };
 340
 341                         uart0_gpio14: uart0_gpio14 {
 342                                 brcm,pins = <14 15>;
 343                                 brcm,function = <BCM2835_FSEL_ALT0>;
 344                         };
 345                         /* Separate from the uart0_gpio14 group
 346                          * because it conflicts with spi1_gpio16, and
 347                          * people often run uart0 on the two pins
 348                          * without flow control.
 349                          */
 350                         uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
 351                                 brcm,pins = <16 17>;
 352                                 brcm,function = <BCM2835_FSEL_ALT3>;
 353                         };
 354                         uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
 355                                 brcm,pins = <30 31>;
 356                                 brcm,function = <BCM2835_FSEL_ALT3>;
 357                                 brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
 358                         };
 359                         uart0_gpio32: uart0_gpio32 {
 360                                 brcm,pins = <32 33>;
 361                                 brcm,function = <BCM2835_FSEL_ALT3>;
 362                                 brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
 363                         };
 364                         uart0_gpio36: uart0_gpio36 {
 365                                 brcm,pins = <36 37>;
 366                                 brcm,function = <BCM2835_FSEL_ALT2>;
 367                         };
 368                         uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 {
 369                                 brcm,pins = <38 39>;
 370                                 brcm,function = <BCM2835_FSEL_ALT2>;
 371                         };
 372
 373                         uart1_gpio14: uart1_gpio14 {
 374                                 brcm,pins = <14 15>;
 375                                 brcm,function = <BCM2835_FSEL_ALT5>;
 376                         };
 377                         uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
 378                                 brcm,pins = <16 17>;
 379                                 brcm,function = <BCM2835_FSEL_ALT5>;
 380                         };
 381                         uart1_gpio32: uart1_gpio32 {
 382                                 brcm,pins = <32 33>;
 383                                 brcm,function = <BCM2835_FSEL_ALT5>;
 384                         };
 385                         uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
 386                                 brcm,pins = <30 31>;
 387                                 brcm,function = <BCM2835_FSEL_ALT5>;
 388                         };
 389                         uart1_gpio40: uart1_gpio40 {
 390                                 brcm,pins = <40 41>;
 391                                 brcm,function = <BCM2835_FSEL_ALT5>;
 392                         };
 393                         uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
 394                                 brcm,pins = <42 43>;
 395                                 brcm,function = <BCM2835_FSEL_ALT5>;
 396                         };
 397                 };
 398
 399                 uart0: serial@7e201000 {
 400                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
 401                         reg = <0x7e201000 0x200>;
 402                         interrupts = <2 25>;
 403                         clocks = <&clocks BCM2835_CLOCK_UART>,
 404                                  <&clocks BCM2835_CLOCK_VPU>;
 405                         clock-names = "uartclk", "apb_pclk";
 406                         arm,primecell-periphid = <0x00241011>;
 407                 };
 408
 409                 sdhost: mmc@7e202000 {
 410                         compatible = "brcm,bcm2835-sdhost";
 411                         reg = <0x7e202000 0x100>;
 412                         interrupts = <2 24>;
 413                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 414                         dmas = <&dma 13>;
 415                         dma-names = "rx-tx";
 416                         status = "disabled";
 417                 };
 418
 419                 i2s: i2s@7e203000 {
 420                         compatible = "brcm,bcm2835-i2s";
 421                         reg = <0x7e203000 0x24>;
 422                         clocks = <&clocks BCM2835_CLOCK_PCM>;
 423
 424                         dmas = <&dma 2>,
 425                                <&dma 3>;
 426                         dma-names = "tx", "rx";
 427                         status = "disabled";
 428                 };
 429
 430                 spi: spi@7e204000 {
 431                         compatible = "brcm,bcm2835-spi";
 432                         reg = <0x7e204000 0x200>;
 433                         interrupts = <2 22>;
 434                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 435                         dmas = <&dma 6>, <&dma 7>;
 436                         dma-names = "tx", "rx";
 437                         #address-cells = <1>;
 438                         #size-cells = <0>;
 439                         status = "disabled";
 440                 };
 441
 442                 i2c0: i2c@7e205000 {
 443                         compatible = "brcm,bcm2835-i2c";
 444                         reg = <0x7e205000 0x200>;
 445                         interrupts = <2 21>;
 446                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 447                         #address-cells = <1>;
 448                         #size-cells = <0>;
 449                         status = "disabled";
 450                 };
 451
 452                 pixelvalve@7e206000 {
 453                         compatible = "brcm,bcm2835-pixelvalve0";
 454                         reg = <0x7e206000 0x100>;
 455                         interrupts = <2 13>; /* pwa0 */
 456                 };
 457
 458                 pixelvalve@7e207000 {
 459                         compatible = "brcm,bcm2835-pixelvalve1";
 460                         reg = <0x7e207000 0x100>;
 461                         interrupts = <2 14>; /* pwa1 */
 462                 };
 463
 464                 dpi: dpi@7e208000 {
 465                         compatible = "brcm,bcm2835-dpi";
 466                         reg = <0x7e208000 0x8c>;
 467                         clocks = <&clocks BCM2835_CLOCK_VPU>,
 468                                  <&clocks BCM2835_CLOCK_DPI>;
 469                         clock-names = "core", "pixel";
 470                         #address-cells = <1>;
 471                         #size-cells = <0>;
 472                         status = "disabled";
 473                 };
 474
 475                 dsi0: dsi@7e209000 {
 476                         compatible = "brcm,bcm2835-dsi0";
 477                         reg = <0x7e209000 0x78>;
 478                         interrupts = <2 4>;
 479                         #address-cells = <1>;
 480                         #size-cells = <0>;
 481                         #clock-cells = <1>;
 482
 483                         clocks = <&clocks BCM2835_PLLA_DSI0>,
 484                                  <&clocks BCM2835_CLOCK_DSI0E>,
 485                                  <&clocks BCM2835_CLOCK_DSI0P>;
 486                         clock-names = "phy", "escape", "pixel";
 487
 488                         clock-output-names = "dsi0_byte",
 489                                              "dsi0_ddr2",
 490                                              "dsi0_ddr";
 491
 492                         status = "disabled";
 493                 };
 494
 495                 thermal: thermal@7e212000 {
 496                         compatible = "brcm,bcm2835-thermal";
 497                         reg = <0x7e212000 0x8>;
 498                         clocks = <&clocks BCM2835_CLOCK_TSENS>;
 499                         #thermal-sensor-cells = <0>;
 500                         status = "disabled";
 501                 };
 502
 503                 aux: aux@7e215000 {
 504                         compatible = "brcm,bcm2835-aux";
 505                         #clock-cells = <1>;
 506                         reg = <0x7e215000 0x8>;
 507                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 508                 };
 509
 510                 uart1: serial@7e215040 {
 511                         compatible = "brcm,bcm2835-aux-uart";
 512                         reg = <0x7e215040 0x40>;
 513                         interrupts = <1 29>;
 514                         clocks = <&aux BCM2835_AUX_CLOCK_UART>;
 515                         status = "disabled";
 516                 };
 517
 518                 spi1: spi@7e215080 {
 519                         compatible = "brcm,bcm2835-aux-spi";
 520                         reg = <0x7e215080 0x40>;
 521                         interrupts = <1 29>;
 522                         clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
 523                         #address-cells = <1>;
 524                         #size-cells = <0>;
 525                         status = "disabled";
 526                 };
 527
 528                 spi2: spi@7e2150c0 {
 529                         compatible = "brcm,bcm2835-aux-spi";
 530                         reg = <0x7e2150c0 0x40>;
 531                         interrupts = <1 29>;
 532                         clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
 533                         #address-cells = <1>;
 534                         #size-cells = <0>;
 535                         status = "disabled";
 536                 };
 537
 538                 pwm: pwm@7e20c000 {
 539                         compatible = "brcm,bcm2835-pwm";
 540                         reg = <0x7e20c000 0x28>;
 541                         clocks = <&clocks BCM2835_CLOCK_PWM>;
 542                         assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
 543                         assigned-clock-rates = <10000000>;
 544                         #pwm-cells = <2>;
 545                         status = "disabled";
 546                 };
 547
 548                 sdhci: sdhci@7e300000 {
 549                         compatible = "brcm,bcm2835-sdhci";
 550                         reg = <0x7e300000 0x100>;
 551                         interrupts = <2 30>;
 552                         clocks = <&clocks BCM2835_CLOCK_EMMC>;
 553                         status = "disabled";
 554                 };
 555
 556                 hvs@7e400000 {
 557                         compatible = "brcm,bcm2835-hvs";
 558                         reg = <0x7e400000 0x6000>;
 559                         interrupts = <2 1>;
 560                 };
 561
 562                 dsi1: dsi@7e700000 {
 563                         compatible = "brcm,bcm2835-dsi1";
 564                         reg = <0x7e700000 0x8c>;
 565                         interrupts = <2 12>;
 566                         #address-cells = <1>;
 567                         #size-cells = <0>;
 568                         #clock-cells = <1>;
 569
 570                         clocks = <&clocks BCM2835_PLLD_DSI1>,
 571                                  <&clocks BCM2835_CLOCK_DSI1E>,
 572                                  <&clocks BCM2835_CLOCK_DSI1P>;
 573                         clock-names = "phy", "escape", "pixel";
 574
 575                         clock-output-names = "dsi1_byte",
 576                                              "dsi1_ddr2",
 577                                              "dsi1_ddr";
 578
 579                         status = "disabled";
 580                 };
 581
 582                 i2c1: i2c@7e804000 {
 583                         compatible = "brcm,bcm2835-i2c";
 584                         reg = <0x7e804000 0x1000>;
 585                         interrupts = <2 21>;
 586                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 587                         #address-cells = <1>;
 588                         #size-cells = <0>;
 589                         status = "disabled";
 590                 };
 591
 592                 i2c2: i2c@7e805000 {
 593                         compatible = "brcm,bcm2835-i2c";
 594                         reg = <0x7e805000 0x1000>;
 595                         interrupts = <2 21>;
 596                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 597                         #address-cells = <1>;
 598                         #size-cells = <0>;
 599                         status = "disabled";
 600                 };
 601
 602                 vec: vec@7e806000 {
 603                         compatible = "brcm,bcm2835-vec";
 604                         reg = <0x7e806000 0x1000>;
 605                         clocks = <&clocks BCM2835_CLOCK_VEC>;
 606                         interrupts = <2 27>;
 607                         status = "disabled";
 608                 };
 609
 610                 pixelvalve@7e807000 {
 611                         compatible = "brcm,bcm2835-pixelvalve2";
 612                         reg = <0x7e807000 0x100>;
 613                         interrupts = <2 10>; /* pixelvalve */
 614                 };
 615
 616                 hdmi: hdmi@7e902000 {
 617                         compatible = "brcm,bcm2835-hdmi";
 618                         reg = <0x7e902000 0x600>,
 619                               <0x7e808000 0x100>;
 620                         interrupts = <2 8>, <2 9>;
 621                         ddc = <&i2c2>;
 622                         clocks = <&clocks BCM2835_PLLH_PIX>,
 623                                  <&clocks BCM2835_CLOCK_HSM>;
 624                         clock-names = "pixel", "hdmi";
 625                         dmas = <&dma 17>;
 626                         dma-names = "audio-rx";
 627                         status = "disabled";
 628                 };
 629
 630                 usb: usb@7e980000 {
 631                         compatible = "brcm,bcm2835-usb";
 632                         reg = <0x7e980000 0x10000>;
 633                         interrupts = <1 9>;
 634                         #address-cells = <1>;
 635                         #size-cells = <0>;
 636                         clocks = <&clk_usb>;
 637                         clock-names = "otg";
 638                         phys = <&usbphy>;
 639                         phy-names = "usb2-phy";
 640                 };
 641
 642                 v3d: v3d@7ec00000 {
 643                         compatible = "brcm,bcm2835-v3d";
 644                         reg = <0x7ec00000 0x1000>;
 645                         interrupts = <1 10>;
 646                         power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
 647                 };
 648
 649                 vc4: gpu {
 650                         compatible = "brcm,bcm2835-vc4";
 651                 };
 652         };
 653
 654         clocks {
 655                 compatible = "simple-bus";
 656                 #address-cells = <1>;
 657                 #size-cells = <0>;
 658
 659                 /* The oscillator is the root of the clock tree. */
 660                 clk_osc: clock@3 {
 661                         compatible = "fixed-clock";
 662                         reg = <3>;
 663                         #clock-cells = <0>;
 664                         clock-output-names = "osc";
 665                         clock-frequency = <19200000>;
 666                 };
 667
 668                 clk_usb: clock@4 {
 669                         compatible = "fixed-clock";
 670                         reg = <4>;
 671                         #clock-cells = <0>;
 672                         clock-output-names = "otg";
 673                         clock-frequency = <480000000>;
 674                 };
 675         };
 676
 677         usbphy: phy {
 678                 compatible = "usb-nop-xceiv";
 679                 #phy-cells = <0>;
 680         };
 681 };