arch/arm/boot/dts/at91sam9x5.dtsi

   1 /*
   2  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
   3  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
   4  *                   AT91SAM9X25, AT91SAM9X35 SoC
   5  *
   6  *  Copyright (C) 2012 Atmel,
   7  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 #include "skeleton.dtsi"
  13 #include <dt-bindings/dma/at91.h>
  14 #include <dt-bindings/pinctrl/at91.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/clock/at91.h>
  18
  19 / {
  20         model = "Atmel AT91SAM9x5 family SoC";
  21         compatible = "atmel,at91sam9x5";
  22         interrupt-parent = <&aic>;
  23
  24         aliases {
  25                 serial0 = &dbgu;
  26                 serial1 = &usart0;
  27                 serial2 = &usart1;
  28                 serial3 = &usart2;
  29                 gpio0 = &pioA;
  30                 gpio1 = &pioB;
  31                 gpio2 = &pioC;
  32                 gpio3 = &pioD;
  33                 tcb0 = &tcb0;
  34                 tcb1 = &tcb1;
  35                 i2c0 = &i2c0;
  36                 i2c1 = &i2c1;
  37                 i2c2 = &i2c2;
  38                 ssc0 = &ssc0;
  39                 pwm0 = &pwm0;
  40         };
  41         cpus {
  42                 #address-cells = <0>;
  43                 #size-cells = <0>;
  44
  45                 cpu {
  46                         compatible = "arm,arm926ej-s";
  47                         device_type = "cpu";
  48                 };
  49         };
  50
  51         memory {
  52                 reg = <0x20000000 0x10000000>;
  53         };
  54
  55         clocks {
  56                 slow_xtal: slow_xtal {
  57                         compatible = "fixed-clock";
  58                         #clock-cells = <0>;
  59                         clock-frequency = <0>;
  60                 };
  61
  62                 main_xtal: main_xtal {
  63                         compatible = "fixed-clock";
  64                         #clock-cells = <0>;
  65                         clock-frequency = <0>;
  66                 };
  67
  68                 adc_op_clk: adc_op_clk{
  69                         compatible = "fixed-clock";
  70                         #clock-cells = <0>;
  71                         clock-frequency = <1000000>;
  72                 };
  73         };
  74
  75         sram: sram@300000 {
  76                 compatible = "mmio-sram";
  77                 reg = <0x00300000 0x8000>;
  78         };
  79
  80         ahb {
  81                 compatible = "simple-bus";
  82                 #address-cells = <1>;
  83                 #size-cells = <1>;
  84                 ranges;
  85
  86                 apb {
  87                         compatible = "simple-bus";
  88                         #address-cells = <1>;
  89                         #size-cells = <1>;
  90                         ranges;
  91
  92                         aic: interrupt-controller@fffff000 {
  93                                 #interrupt-cells = <3>;
  94                                 compatible = "atmel,at91rm9200-aic";
  95                                 interrupt-controller;
  96                                 reg = <0xfffff000 0x200>;
  97                                 atmel,external-irqs = <31>;
  98                         };
  99
 100                         matrix: matrix@ffffde00 {
 101                                 compatible = "atmel,at91sam9x5-matrix", "syscon";
 102                                 reg = <0xffffde00 0x100>;
 103                         };
 104
 105                         pmecc: ecc-engine@ffffe000 {
 106                                 compatible = "atmel,at91sam9g45-pmecc";
 107                                 reg = <0xffffe000 0x600>,
 108                                       <0xffffe600 0x200>;
 109                         };
 110
 111                         ramc0: ramc@ffffe800 {
 112                                 compatible = "atmel,at91sam9g45-ddramc";
 113                                 reg = <0xffffe800 0x200>;
 114                                 clocks = <&ddrck>;
 115                                 clock-names = "ddrck";
 116                         };
 117
 118                         smc: smc@ffffea00 {
 119                                 compatible = "atmel,at91sam9260-smc", "syscon";
 120                                 reg = <0xffffea00 0x200>;
 121                         };
 122
 123                         pmc: pmc@fffffc00 {
 124                                 compatible = "atmel,at91sam9x5-pmc", "syscon";
 125                                 reg = <0xfffffc00 0x200>;
 126                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 127                                 interrupt-controller;
 128                                 #address-cells = <1>;
 129                                 #size-cells = <0>;
 130                                 #interrupt-cells = <1>;
 131
 132                                 main_rc_osc: main_rc_osc {
 133                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 134                                         #clock-cells = <0>;
 135                                         interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
 136                                         clock-frequency = <12000000>;
 137                                         clock-accuracy = <50000000>;
 138                                 };
 139
 140                                 main_osc: main_osc {
 141                                         compatible = "atmel,at91rm9200-clk-main-osc";
 142                                         #clock-cells = <0>;
 143                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 144                                         clocks = <&main_xtal>;
 145                                 };
 146
 147                                 main: mainck {
 148                                         compatible = "atmel,at91sam9x5-clk-main";
 149                                         #clock-cells = <0>;
 150                                         interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
 151                                         clocks = <&main_rc_osc>, <&main_osc>;
 152                                 };
 153
 154                                 plla: pllack {
 155                                         compatible = "atmel,at91rm9200-clk-pll";
 156                                         #clock-cells = <0>;
 157                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 158                                         clocks = <&main>;
 159                                         reg = <0>;
 160                                         atmel,clk-input-range = <2000000 32000000>;
 161                                         #atmel,pll-clk-output-range-cells = <4>;
 162                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0
 163                                                                        695000000 750000000 1 0
 164                                                                        645000000 700000000 2 0
 165                                                                        595000000 650000000 3 0
 166                                                                        545000000 600000000 0 1
 167                                                                        495000000 555000000 1 1
 168                                                                        445000000 500000000 2 1
 169                                                                        400000000 450000000 3 1>;
 170                                 };
 171
 172                                 plladiv: plladivck {
 173                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 174                                         #clock-cells = <0>;
 175                                         clocks = <&plla>;
 176                                 };
 177
 178                                 utmi: utmick {
 179                                         compatible = "atmel,at91sam9x5-clk-utmi";
 180                                         #clock-cells = <0>;
 181                                         interrupts-extended = <&pmc AT91_PMC_LOCKU>;
 182                                         clocks = <&main>;
 183                                 };
 184
 185                                 mck: masterck {
 186                                         compatible = "atmel,at91sam9x5-clk-master";
 187                                         #clock-cells = <0>;
 188                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 189                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 190                                         atmel,clk-output-range = <0 133333333>;
 191                                         atmel,clk-divisors = <1 2 4 3>;
 192                                         atmel,master-clk-have-div3-pres;
 193                                 };
 194
 195                                 usb: usbck {
 196                                         compatible = "atmel,at91sam9x5-clk-usb";
 197                                         #clock-cells = <0>;
 198                                         clocks = <&plladiv>, <&utmi>;
 199                                 };
 200
 201                                 prog: progck {
 202                                         compatible = "atmel,at91sam9x5-clk-programmable";
 203                                         #address-cells = <1>;
 204                                         #size-cells = <0>;
 205                                         interrupt-parent = <&pmc>;
 206                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 207
 208                                         prog0: prog0 {
 209                                                 #clock-cells = <0>;
 210                                                 reg = <0>;
 211                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 212                                         };
 213
 214                                         prog1: prog1 {
 215                                                 #clock-cells = <0>;
 216                                                 reg = <1>;
 217                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 218                                         };
 219                                 };
 220
 221                                 smd: smdclk {
 222                                         compatible = "atmel,at91sam9x5-clk-smd";
 223                                         #clock-cells = <0>;
 224                                         clocks = <&plladiv>, <&utmi>;
 225                                 };
 226
 227                                 systemck {
 228                                         compatible = "atmel,at91rm9200-clk-system";
 229                                         #address-cells = <1>;
 230                                         #size-cells = <0>;
 231
 232                                         ddrck: ddrck {
 233                                                 #clock-cells = <0>;
 234                                                 reg = <2>;
 235                                                 clocks = <&mck>;
 236                                         };
 237
 238                                         smdck: smdck {
 239                                                 #clock-cells = <0>;
 240                                                 reg = <4>;
 241                                                 clocks = <&smd>;
 242                                         };
 243
 244                                         uhpck: uhpck {
 245                                                 #clock-cells = <0>;
 246                                                 reg = <6>;
 247                                                 clocks = <&usb>;
 248                                         };
 249
 250                                         udpck: udpck {
 251                                                 #clock-cells = <0>;
 252                                                 reg = <7>;
 253                                                 clocks = <&usb>;
 254                                         };
 255
 256                                         pck0: pck0 {
 257                                                 #clock-cells = <0>;
 258                                                 reg = <8>;
 259                                                 clocks = <&prog0>;
 260                                         };
 261
 262                                         pck1: pck1 {
 263                                                 #clock-cells = <0>;
 264                                                 reg = <9>;
 265                                                 clocks = <&prog1>;
 266                                         };
 267                                 };
 268
 269                                 periphck {
 270                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 271                                         #address-cells = <1>;
 272                                         #size-cells = <0>;
 273                                         clocks = <&mck>;
 274
 275                                         pioAB_clk: pioAB_clk {
 276                                                 #clock-cells = <0>;
 277                                                 reg = <2>;
 278                                         };
 279
 280                                         pioCD_clk: pioCD_clk {
 281                                                 #clock-cells = <0>;
 282                                                 reg = <3>;
 283                                         };
 284
 285                                         smd_clk: smd_clk {
 286                                                 #clock-cells = <0>;
 287                                                 reg = <4>;
 288                                         };
 289
 290                                         usart0_clk: usart0_clk {
 291                                                 #clock-cells = <0>;
 292                                                 reg = <5>;
 293                                         };
 294
 295                                         usart1_clk: usart1_clk {
 296                                                 #clock-cells = <0>;
 297                                                 reg = <6>;
 298                                         };
 299
 300                                         usart2_clk: usart2_clk {
 301                                                 #clock-cells = <0>;
 302                                                 reg = <7>;
 303                                         };
 304
 305                                         twi0_clk: twi0_clk {
 306                                                 reg = <9>;
 307                                                 #clock-cells = <0>;
 308                                         };
 309
 310                                         twi1_clk: twi1_clk {
 311                                                 #clock-cells = <0>;
 312                                                 reg = <10>;
 313                                         };
 314
 315                                         twi2_clk: twi2_clk {
 316                                                 #clock-cells = <0>;
 317                                                 reg = <11>;
 318                                         };
 319
 320                                         mci0_clk: mci0_clk {
 321                                                 #clock-cells = <0>;
 322                                                 reg = <12>;
 323                                         };
 324
 325                                         spi0_clk: spi0_clk {
 326                                                 #clock-cells = <0>;
 327                                                 reg = <13>;
 328                                         };
 329
 330                                         spi1_clk: spi1_clk {
 331                                                 #clock-cells = <0>;
 332                                                 reg = <14>;
 333                                         };
 334
 335                                         uart0_clk: uart0_clk {
 336                                                 #clock-cells = <0>;
 337                                                 reg = <15>;
 338                                         };
 339
 340                                         uart1_clk: uart1_clk {
 341                                                 #clock-cells = <0>;
 342                                                 reg = <16>;
 343                                         };
 344
 345                                         tcb0_clk: tcb0_clk {
 346                                                 #clock-cells = <0>;
 347                                                 reg = <17>;
 348                                         };
 349
 350                                         pwm_clk: pwm_clk {
 351                                                 #clock-cells = <0>;
 352                                                 reg = <18>;
 353                                         };
 354
 355                                         adc_clk: adc_clk {
 356                                                 #clock-cells = <0>;
 357                                                 reg = <19>;
 358                                         };
 359
 360                                         dma0_clk: dma0_clk {
 361                                                 #clock-cells = <0>;
 362                                                 reg = <20>;
 363                                         };
 364
 365                                         dma1_clk: dma1_clk {
 366                                                 #clock-cells = <0>;
 367                                                 reg = <21>;
 368                                         };
 369
 370                                         uhphs_clk: uhphs_clk {
 371                                                 #clock-cells = <0>;
 372                                                 reg = <22>;
 373                                         };
 374
 375                                         udphs_clk: udphs_clk {
 376                                                 #clock-cells = <0>;
 377                                                 reg = <23>;
 378                                         };
 379
 380                                         mci1_clk: mci1_clk {
 381                                                 #clock-cells = <0>;
 382                                                 reg = <26>;
 383                                         };
 384
 385                                         ssc0_clk: ssc0_clk {
 386                                                 #clock-cells = <0>;
 387                                                 reg = <28>;
 388                                         };
 389                                 };
 390                         };
 391
 392                         reset_controller: rstc@fffffe00 {
 393                                 compatible = "atmel,at91sam9g45-rstc";
 394                                 reg = <0xfffffe00 0x10>;
 395                                 clocks = <&clk32k>;
 396                         };
 397
 398                         shutdown_controller: shdwc@fffffe10 {
 399                                 compatible = "atmel,at91sam9x5-shdwc";
 400                                 reg = <0xfffffe10 0x10>;
 401                                 clocks = <&clk32k>;
 402                         };
 403
 404                         pit: timer@fffffe30 {
 405                                 compatible = "atmel,at91sam9260-pit";
 406                                 reg = <0xfffffe30 0xf>;
 407                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 408                                 clocks = <&mck>;
 409                         };
 410
 411                         sckc@fffffe50 {
 412                                 compatible = "atmel,at91sam9x5-sckc";
 413                                 reg = <0xfffffe50 0x4>;
 414
 415                                 slow_osc: slow_osc {
 416                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
 417                                         #clock-cells = <0>;
 418                                         clocks = <&slow_xtal>;
 419                                 };
 420
 421                                 slow_rc_osc: slow_rc_osc {
 422                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
 423                                         #clock-cells = <0>;
 424                                         clock-frequency = <32768>;
 425                                         clock-accuracy = <50000000>;
 426                                 };
 427
 428                                 clk32k: slck {
 429                                         compatible = "atmel,at91sam9x5-clk-slow";
 430                                         #clock-cells = <0>;
 431                                         clocks = <&slow_rc_osc>, <&slow_osc>;
 432                                 };
 433                         };
 434
 435                         tcb0: timer@f8008000 {
 436                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
 437                                 #address-cells = <1>;
 438                                 #size-cells = <0>;
 439                                 reg = <0xf8008000 0x100>;
 440                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 441                                 clocks = <&tcb0_clk>, <&clk32k>;
 442                                 clock-names = "t0_clk", "slow_clk";
 443                         };
 444
 445                         tcb1: timer@f800c000 {
 446                                 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
 447                                 #address-cells = <1>;
 448                                 #size-cells = <0>;
 449                                 reg = <0xf800c000 0x100>;
 450                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 451                                 clocks = <&tcb0_clk>, <&clk32k>;
 452                                 clock-names = "t0_clk", "slow_clk";
 453                         };
 454
 455                         dma0: dma-controller@ffffec00 {
 456                                 compatible = "atmel,at91sam9g45-dma";
 457                                 reg = <0xffffec00 0x200>;
 458                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
 459                                 #dma-cells = <2>;
 460                                 clocks = <&dma0_clk>;
 461                                 clock-names = "dma_clk";
 462                         };
 463
 464                         dma1: dma-controller@ffffee00 {
 465                                 compatible = "atmel,at91sam9g45-dma";
 466                                 reg = <0xffffee00 0x200>;
 467                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
 468                                 #dma-cells = <2>;
 469                                 clocks = <&dma1_clk>;
 470                                 clock-names = "dma_clk";
 471                         };
 472
 473                         pinctrl: pinctrl@fffff400 {
 474                                 #address-cells = <1>;
 475                                 #size-cells = <1>;
 476                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 477                                 ranges = <0xfffff400 0xfffff400 0x800>;
 478
 479                                 /* shared pinctrl settings */
 480                                 dbgu {
 481                                         pinctrl_dbgu: dbgu-0 {
 482                                                 atmel,pins =
 483                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
 484                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 485                                         };
 486                                 };
 487
 488                                 ebi {
 489                                         pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
 490                                                 atmel,pins =
 491                                                         <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE
 492                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE
 493                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE
 494                                                          AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE
 495                                                          AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE
 496                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE
 497                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE
 498                                                          AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 499                                         };
 500
 501                                         pinctrl_ebi_data_8_15: ebi-data-msb-0 {
 502                                                 atmel,pins =
 503                                                         <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE
 504                                                          AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE
 505                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE
 506                                                          AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
 507                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE
 508                                                          AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE
 509                                                          AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE
 510                                                          AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 511                                         };
 512
 513                                         pinctrl_ebi_addr_nand: ebi-addr-0 {
 514                                                 atmel,pins =
 515                                                         <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE
 516                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 517                                         };
 518                                 };
 519
 520                                 usart0 {
 521                                         pinctrl_usart0: usart0-0 {
 522                                                 atmel,pins =
 523                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
 524                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 525                                         };
 526
 527                                         pinctrl_usart0_rts: usart0_rts-0 {
 528                                                 atmel,pins =
 529                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A */
 530                                         };
 531
 532                                         pinctrl_usart0_cts: usart0_cts-0 {
 533                                                 atmel,pins =
 534                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA3 periph A */
 535                                         };
 536
 537                                         pinctrl_usart0_sck: usart0_sck-0 {
 538                                                 atmel,pins =
 539                                                         <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA4 periph A */
 540                                         };
 541                                 };
 542
 543                                 usart1 {
 544                                         pinctrl_usart1: usart1-0 {
 545                                                 atmel,pins =
 546                                                         <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE
 547                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 548                                         };
 549
 550                                         pinctrl_usart1_rts: usart1_rts-0 {
 551                                                 atmel,pins =
 552                                                         <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
 553                                         };
 554
 555                                         pinctrl_usart1_cts: usart1_cts-0 {
 556                                                 atmel,pins =
 557                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
 558                                         };
 559
 560                                         pinctrl_usart1_sck: usart1_sck-0 {
 561                                                 atmel,pins =
 562                                                         <AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
 563                                         };
 564                                 };
 565
 566                                 usart2 {
 567                                         pinctrl_usart2: usart2-0 {
 568                                                 atmel,pins =
 569                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE
 570                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 571                                         };
 572
 573                                         pinctrl_usart2_rts: usart2_rts-0 {
 574                                                 atmel,pins =
 575                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 576                                         };
 577
 578                                         pinctrl_usart2_cts: usart2_cts-0 {
 579                                                 atmel,pins =
 580                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 581                                         };
 582
 583                                         pinctrl_usart2_sck: usart2_sck-0 {
 584                                                 atmel,pins =
 585                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB2 periph B */
 586                                         };
 587                                 };
 588
 589                                 uart0 {
 590                                         pinctrl_uart0: uart0-0 {
 591                                                 atmel,pins =
 592                                                         <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC8 periph C */
 593                                                          AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;       /* PC9 periph C with pullup */
 594                                         };
 595                                 };
 596
 597                                 uart1 {
 598                                         pinctrl_uart1: uart1-0 {
 599                                                 atmel,pins =
 600                                                         <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC16 periph C */
 601                                                          AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;      /* PC17 periph C with pullup */
 602                                         };
 603                                 };
 604
 605                                 nand {
 606                                         pinctrl_nand_oe_we: nand-oe-we-0 {
 607                                                 atmel,pins =
 608                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE
 609                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 610                                         };
 611
 612                                         pinctrl_nand_rb: nand-rb-0 {
 613                                                 atmel,pins =
 614                                                         <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 615                                         };
 616
 617                                         pinctrl_nand_cs: nand-cs-0 {
 618                                                 atmel,pins =
 619                                                         <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 620                                         };
 621                                 };
 622
 623                                 mmc0 {
 624                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 625                                                 atmel,pins =
 626                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 627                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
 628                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA15 periph A with pullup */
 629                                         };
 630
 631                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 632                                                 atmel,pins =
 633                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
 634                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
 635                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
 636                                         };
 637                                 };
 638
 639                                 mmc1 {
 640                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 641                                                 atmel,pins =
 642                                                         <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA13 periph B */
 643                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA12 periph B with pullup */
 644                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA11 periph B with pullup */
 645                                         };
 646
 647                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 648                                                 atmel,pins =
 649                                                         <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
 650                                                          AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
 651                                                          AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA4 periph B with pullup */
 652                                         };
 653                                 };
 654
 655                                 ssc0 {
 656                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 657                                                 atmel,pins =
 658                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 659                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 660                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
 661                                         };
 662
 663                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 664                                                 atmel,pins =
 665                                                         <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 666                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 667                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 668                                         };
 669                                 };
 670
 671                                 spi0 {
 672                                         pinctrl_spi0: spi0-0 {
 673                                                 atmel,pins =
 674                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A SPI0_MISO pin */
 675                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A SPI0_MOSI pin */
 676                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
 677                                         };
 678                                 };
 679
 680                                 spi1 {
 681                                         pinctrl_spi1: spi1-0 {
 682                                                 atmel,pins =
 683                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA21 periph B SPI1_MISO pin */
 684                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B SPI1_MOSI pin */
 685                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
 686                                         };
 687                                 };
 688
 689                                 i2c0 {
 690                                         pinctrl_i2c0: i2c0-0 {
 691                                                 atmel,pins =
 692                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A I2C0 data */
 693                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
 694                                         };
 695                                 };
 696
 697                                 i2c1 {
 698                                         pinctrl_i2c1: i2c1-0 {
 699                                                 atmel,pins =
 700                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC0 periph C I2C1 data */
 701                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* PC1 periph C I2C1 clock */
 702                                         };
 703                                 };
 704
 705                                 i2c2 {
 706                                         pinctrl_i2c2: i2c2-0 {
 707                                                 atmel,pins =
 708                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB4 periph B I2C2 data */
 709                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB5 periph B I2C2 clock */
 710                                         };
 711                                 };
 712
 713                                 i2c_gpio0 {
 714                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
 715                                                 atmel,pins =
 716                                                         <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
 717                                                          AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;       /* PA31 gpio multidrive I2C0 clock */
 718                                         };
 719                                 };
 720
 721                                 i2c_gpio1 {
 722                                         pinctrl_i2c_gpio1: i2c_gpio1-0 {
 723                                                 atmel,pins =
 724                                                         <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PC0 gpio multidrive I2C1 data */
 725                                                          AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PC1 gpio multidrive I2C1 clock */
 726                                         };
 727                                 };
 728
 729                                 i2c_gpio2 {
 730                                         pinctrl_i2c_gpio2: i2c_gpio2-0 {
 731                                                 atmel,pins =
 732                                                         <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PB4 gpio multidrive I2C2 data */
 733                                                          AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PB5 gpio multidrive I2C2 clock */
 734                                         };
 735                                 };
 736
 737                                 pwm0 {
 738                                         pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
 739                                                 atmel,pins =
 740                                                         <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 741                                         };
 742                                         pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
 743                                                 atmel,pins =
 744                                                         <AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 745                                         };
 746                                         pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
 747                                                 atmel,pins =
 748                                                         <AT91_PIOC 18 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 749                                         };
 750
 751                                         pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
 752                                                 atmel,pins =
 753                                                         <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 754                                         };
 755                                         pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
 756                                                 atmel,pins =
 757                                                         <AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 758                                         };
 759                                         pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
 760                                                 atmel,pins =
 761                                                         <AT91_PIOC 19 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 762                                         };
 763
 764                                         pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
 765                                                 atmel,pins =
 766                                                         <AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 767                                         };
 768                                         pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
 769                                                 atmel,pins =
 770                                                         <AT91_PIOC 20 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 771                                         };
 772
 773                                         pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
 774                                                 atmel,pins =
 775                                                         <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 776                                         };
 777                                         pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
 778                                                 atmel,pins =
 779                                                         <AT91_PIOC 21 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 780                                         };
 781                                 };
 782
 783                                 tcb0 {
 784                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 785                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 786                                         };
 787
 788                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 789                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 790                                         };
 791
 792                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 793                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 794                                         };
 795
 796                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 797                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 798                                         };
 799
 800                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 801                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 802                                         };
 803
 804                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 805                                                 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 806                                         };
 807
 808                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 809                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 810                                         };
 811
 812                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 813                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 814                                         };
 815
 816                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 817                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 818                                         };
 819                                 };
 820
 821                                 tcb1 {
 822                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 823                                                 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 824                                         };
 825
 826                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 827                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 828                                         };
 829
 830                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 831                                                 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 832                                         };
 833
 834                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 835                                                 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 836                                         };
 837
 838                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 839                                                 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 840                                         };
 841
 842                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 843                                                 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 844                                         };
 845
 846                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 847                                                 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 848                                         };
 849
 850                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 851                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 852                                         };
 853
 854                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 855                                                 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 856                                         };
 857                                 };
 858
 859                                 pioA: gpio@fffff400 {
 860                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 861                                         reg = <0xfffff400 0x200>;
 862                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 863                                         #gpio-cells = <2>;
 864                                         gpio-controller;
 865                                         interrupt-controller;
 866                                         #interrupt-cells = <2>;
 867                                         clocks = <&pioAB_clk>;
 868                                 };
 869
 870                                 pioB: gpio@fffff600 {
 871                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 872                                         reg = <0xfffff600 0x200>;
 873                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 874                                         #gpio-cells = <2>;
 875                                         gpio-controller;
 876                                         #gpio-lines = <19>;
 877                                         interrupt-controller;
 878                                         #interrupt-cells = <2>;
 879                                         clocks = <&pioAB_clk>;
 880                                 };
 881
 882                                 pioC: gpio@fffff800 {
 883                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 884                                         reg = <0xfffff800 0x200>;
 885                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 886                                         #gpio-cells = <2>;
 887                                         gpio-controller;
 888                                         interrupt-controller;
 889                                         #interrupt-cells = <2>;
 890                                         clocks = <&pioCD_clk>;
 891                                 };
 892
 893                                 pioD: gpio@fffffa00 {
 894                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 895                                         reg = <0xfffffa00 0x200>;
 896                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 897                                         #gpio-cells = <2>;
 898                                         gpio-controller;
 899                                         #gpio-lines = <22>;
 900                                         interrupt-controller;
 901                                         #interrupt-cells = <2>;
 902                                         clocks = <&pioCD_clk>;
 903                                 };
 904                         };
 905
 906                         ssc0: ssc@f0010000 {
 907                                 compatible = "atmel,at91sam9g45-ssc";
 908                                 reg = <0xf0010000 0x4000>;
 909                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 910                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
 911                                        <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
 912                                 dma-names = "tx", "rx";
 913                                 pinctrl-names = "default";
 914                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 915                                 clocks = <&ssc0_clk>;
 916                                 clock-names = "pclk";
 917                                 status = "disabled";
 918                         };
 919
 920                         mmc0: mmc@f0008000 {
 921                                 compatible = "atmel,hsmci";
 922                                 reg = <0xf0008000 0x600>;
 923                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 924                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
 925                                 dma-names = "rxtx";
 926                                 pinctrl-names = "default";
 927                                 clocks = <&mci0_clk>;
 928                                 clock-names = "mci_clk";
 929                                 #address-cells = <1>;
 930                                 #size-cells = <0>;
 931                                 status = "disabled";
 932                         };
 933
 934                         mmc1: mmc@f000c000 {
 935                                 compatible = "atmel,hsmci";
 936                                 reg = <0xf000c000 0x600>;
 937                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
 938                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
 939                                 dma-names = "rxtx";
 940                                 pinctrl-names = "default";
 941                                 clocks = <&mci1_clk>;
 942                                 clock-names = "mci_clk";
 943                                 #address-cells = <1>;
 944                                 #size-cells = <0>;
 945                                 status = "disabled";
 946                         };
 947
 948                         dbgu: serial@fffff200 {
 949                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 950                                 reg = <0xfffff200 0x200>;
 951                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 952                                 pinctrl-names = "default";
 953                                 pinctrl-0 = <&pinctrl_dbgu>;
 954                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(8)>,
 955                                        <&dma1 1 (AT91_DMA_CFG_PER_ID(9) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 956                                 dma-names = "tx", "rx";
 957                                 clocks = <&mck>;
 958                                 clock-names = "usart";
 959                                 status = "disabled";
 960                         };
 961
 962                         usart0: serial@f801c000 {
 963                                 compatible = "atmel,at91sam9260-usart";
 964                                 reg = <0xf801c000 0x200>;
 965                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 966                                 pinctrl-names = "default";
 967                                 pinctrl-0 = <&pinctrl_usart0>;
 968                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(3)>,
 969                                        <&dma0 1 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 970                                 dma-names = "tx", "rx";
 971                                 clocks = <&usart0_clk>;
 972                                 clock-names = "usart";
 973                                 status = "disabled";
 974                         };
 975
 976                         usart1: serial@f8020000 {
 977                                 compatible = "atmel,at91sam9260-usart";
 978                                 reg = <0xf8020000 0x200>;
 979                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 980                                 pinctrl-names = "default";
 981                                 pinctrl-0 = <&pinctrl_usart1>;
 982                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(5)>,
 983                                        <&dma0 1 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 984                                 dma-names = "tx", "rx";
 985                                 clocks = <&usart1_clk>;
 986                                 clock-names = "usart";
 987                                 status = "disabled";
 988                         };
 989
 990                         usart2: serial@f8024000 {
 991                                 compatible = "atmel,at91sam9260-usart";
 992                                 reg = <0xf8024000 0x200>;
 993                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 994                                 pinctrl-names = "default";
 995                                 pinctrl-0 = <&pinctrl_usart2>;
 996                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(12)>,
 997                                        <&dma1 1 (AT91_DMA_CFG_PER_ID(13) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
 998                                 dma-names = "tx", "rx";
 999                                 clocks = <&usart2_clk>;
1000                                 clock-names = "usart";
1001                                 status = "disabled";
1002                         };
1003
1004                         i2c0: i2c@f8010000 {
1005                                 compatible = "atmel,at91sam9x5-i2c";
1006                                 reg = <0xf8010000 0x100>;
1007                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
1008                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
1009                                        <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
1010                                 dma-names = "tx", "rx";
1011                                 #address-cells = <1>;
1012                                 #size-cells = <0>;
1013                                 pinctrl-names = "default";
1014                                 pinctrl-0 = <&pinctrl_i2c0>;
1015                                 clocks = <&twi0_clk>;
1016                                 status = "disabled";
1017                         };
1018
1019                         i2c1: i2c@f8014000 {
1020                                 compatible = "atmel,at91sam9x5-i2c";
1021                                 reg = <0xf8014000 0x100>;
1022                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
1023                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
1024                                        <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
1025                                 dma-names = "tx", "rx";
1026                                 #address-cells = <1>;
1027                                 #size-cells = <0>;
1028                                 pinctrl-names = "default";
1029                                 pinctrl-0 = <&pinctrl_i2c1>;
1030                                 clocks = <&twi1_clk>;
1031                                 status = "disabled";
1032                         };
1033
1034                         i2c2: i2c@f8018000 {
1035                                 compatible = "atmel,at91sam9x5-i2c";
1036                                 reg = <0xf8018000 0x100>;
1037                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
1038                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
1039                                        <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
1040                                 dma-names = "tx", "rx";
1041                                 #address-cells = <1>;
1042                                 #size-cells = <0>;
1043                                 pinctrl-names = "default";
1044                                 pinctrl-0 = <&pinctrl_i2c2>;
1045                                 clocks = <&twi2_clk>;
1046                                 status = "disabled";
1047                         };
1048
1049                         uart0: serial@f8040000 {
1050                                 compatible = "atmel,at91sam9260-usart";
1051                                 reg = <0xf8040000 0x200>;
1052                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
1053                                 pinctrl-names = "default";
1054                                 pinctrl-0 = <&pinctrl_uart0>;
1055                                 clocks = <&uart0_clk>;
1056                                 clock-names = "usart";
1057                                 status = "disabled";
1058                         };
1059
1060                         uart1: serial@f8044000 {
1061                                 compatible = "atmel,at91sam9260-usart";
1062                                 reg = <0xf8044000 0x200>;
1063                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
1064                                 pinctrl-names = "default";
1065                                 pinctrl-0 = <&pinctrl_uart1>;
1066                                 clocks = <&uart1_clk>;
1067                                 clock-names = "usart";
1068                                 status = "disabled";
1069                         };
1070
1071                         adc0: adc@f804c000 {
1072                                 #address-cells = <1>;
1073                                 #size-cells = <0>;
1074                                 compatible = "atmel,at91sam9x5-adc";
1075                                 reg = <0xf804c000 0x100>;
1076                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
1077                                 clocks = <&adc_clk>,
1078                                          <&adc_op_clk>;
1079                                 clock-names = "adc_clk", "adc_op_clk";
1080                                 atmel,adc-use-external-triggers;
1081                                 atmel,adc-channels-used = <0xffff>;
1082                                 atmel,adc-vref = <3300>;
1083                                 atmel,adc-startup-time = <40>;
1084                                 atmel,adc-sample-hold-time = <11>;
1085                                 atmel,adc-res = <8 10>;
1086                                 atmel,adc-res-names = "lowres", "highres";
1087                                 atmel,adc-use-res = "highres";
1088
1089                                 trigger0 {
1090                                         trigger-name = "external-rising";
1091                                         trigger-value = <0x1>;
1092                                         trigger-external;
1093                                 };
1094
1095                                 trigger1 {
1096                                         trigger-name = "external-falling";
1097                                         trigger-value = <0x2>;
1098                                         trigger-external;
1099                                 };
1100
1101                                 trigger2 {
1102                                         trigger-name = "external-any";
1103                                         trigger-value = <0x3>;
1104                                         trigger-external;
1105                                 };
1106
1107                                 trigger3 {
1108                                         trigger-name = "continuous";
1109                                         trigger-value = <0x6>;
1110                                 };
1111                         };
1112
1113                         spi0: spi@f0000000 {
1114                                 #address-cells = <1>;
1115                                 #size-cells = <0>;
1116                                 compatible = "atmel,at91rm9200-spi";
1117                                 reg = <0xf0000000 0x100>;
1118                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
1119                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
1120                                        <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
1121                                 dma-names = "tx", "rx";
1122                                 pinctrl-names = "default";
1123                                 pinctrl-0 = <&pinctrl_spi0>;
1124                                 clocks = <&spi0_clk>;
1125                                 clock-names = "spi_clk";
1126                                 status = "disabled";
1127                         };
1128
1129                         spi1: spi@f0004000 {
1130                                 #address-cells = <1>;
1131                                 #size-cells = <0>;
1132                                 compatible = "atmel,at91rm9200-spi";
1133                                 reg = <0xf0004000 0x100>;
1134                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
1135                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
1136                                        <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
1137                                 dma-names = "tx", "rx";
1138                                 pinctrl-names = "default";
1139                                 pinctrl-0 = <&pinctrl_spi1>;
1140                                 clocks = <&spi1_clk>;
1141                                 clock-names = "spi_clk";
1142                                 status = "disabled";
1143                         };
1144
1145                         usb2: gadget@f803c000 {
1146                                 #address-cells = <1>;
1147                                 #size-cells = <0>;
1148                                 compatible = "atmel,at91sam9g45-udc";
1149                                 reg = <0x00500000 0x80000
1150                                        0xf803c000 0x400>;
1151                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1152                                 clocks = <&utmi>, <&udphs_clk>;
1153                                 clock-names = "hclk", "pclk";
1154                                 status = "disabled";
1155
1156                                 ep@0 {
1157                                         reg = <0>;
1158                                         atmel,fifo-size = <64>;
1159                                         atmel,nb-banks = <1>;
1160                                 };
1161
1162                                 ep@1 {
1163                                         reg = <1>;
1164                                         atmel,fifo-size = <1024>;
1165                                         atmel,nb-banks = <2>;
1166                                         atmel,can-dma;
1167                                         atmel,can-isoc;
1168                                 };
1169
1170                                 ep@2 {
1171                                         reg = <2>;
1172                                         atmel,fifo-size = <1024>;
1173                                         atmel,nb-banks = <2>;
1174                                         atmel,can-dma;
1175                                         atmel,can-isoc;
1176                                 };
1177
1178                                 ep@3 {
1179                                         reg = <3>;
1180                                         atmel,fifo-size = <1024>;
1181                                         atmel,nb-banks = <3>;
1182                                         atmel,can-dma;
1183                                 };
1184
1185                                 ep@4 {
1186                                         reg = <4>;
1187                                         atmel,fifo-size = <1024>;
1188                                         atmel,nb-banks = <3>;
1189                                         atmel,can-dma;
1190                                 };
1191
1192                                 ep@5 {
1193                                         reg = <5>;
1194                                         atmel,fifo-size = <1024>;
1195                                         atmel,nb-banks = <3>;
1196                                         atmel,can-dma;
1197                                         atmel,can-isoc;
1198                                 };
1199
1200                                 ep@6 {
1201                                         reg = <6>;
1202                                         atmel,fifo-size = <1024>;
1203                                         atmel,nb-banks = <3>;
1204                                         atmel,can-dma;
1205                                         atmel,can-isoc;
1206                                 };
1207                         };
1208
1209                         watchdog: watchdog@fffffe40 {
1210                                 compatible = "atmel,at91sam9260-wdt";
1211                                 reg = <0xfffffe40 0x10>;
1212                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1213                                 clocks = <&clk32k>;
1214                                 atmel,watchdog-type = "hardware";
1215                                 atmel,reset-type = "all";
1216                                 atmel,dbg-halt;
1217                                 status = "disabled";
1218                         };
1219
1220                         rtc@fffffeb0 {
1221                                 compatible = "atmel,at91sam9x5-rtc";
1222                                 reg = <0xfffffeb0 0x40>;
1223                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1224                                 clocks = <&clk32k>;
1225                                 status = "disabled";
1226                         };
1227
1228                         pwm0: pwm@f8034000 {
1229                                 compatible = "atmel,at91sam9rl-pwm";
1230                                 reg = <0xf8034000 0x300>;
1231                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1232                                 clocks = <&pwm_clk>;
1233                                 #pwm-cells = <3>;
1234                                 status = "disabled";
1235                         };
1236                 };
1237
1238                 usb0: ohci@600000 {
1239                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1240                         reg = <0x00600000 0x100000>;
1241                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1242                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1243                         clock-names = "ohci_clk", "hclk", "uhpck";
1244                         status = "disabled";
1245                 };
1246
1247                 usb1: ehci@700000 {
1248                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1249                         reg = <0x00700000 0x100000>;
1250                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1251                         clocks = <&utmi>, <&uhphs_clk>;
1252                         clock-names = "usb_clk", "ehci_clk";
1253                         status = "disabled";
1254                 };
1255
1256                 ebi: ebi@10000000 {
1257                         compatible = "atmel,at91sam9x5-ebi";
1258                         #address-cells = <2>;
1259                         #size-cells = <1>;
1260                         atmel,smc = <&smc>;
1261                         atmel,matrix = <&matrix>;
1262                         reg = <0x10000000 0x60000000>;
1263                         ranges = <0x0 0x0 0x10000000 0x10000000
1264                                   0x1 0x0 0x20000000 0x10000000
1265                                   0x2 0x0 0x30000000 0x10000000
1266                                   0x3 0x0 0x40000000 0x10000000
1267                                   0x4 0x0 0x50000000 0x10000000
1268                                   0x5 0x0 0x60000000 0x10000000>;
1269                         clocks = <&mck>;
1270                         status = "disabled";
1271
1272                         nand_controller: nand-controller {
1273                                 compatible = "atmel,at91sam9g45-nand-controller";
1274                                 ecc-engine = <&pmecc>;
1275                                 #address-cells = <2>;
1276                                 #size-cells = <1>;
1277                                 ranges;
1278                                 status = "disabled";
1279                         };
1280                 };
1281         };
1282
1283         i2c-gpio-0 {
1284                 compatible = "i2c-gpio";
1285                 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1286                          &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1287                         >;
1288                 i2c-gpio,sda-open-drain;
1289                 i2c-gpio,scl-open-drain;
1290                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1291                 #address-cells = <1>;
1292                 #size-cells = <0>;
1293                 pinctrl-names = "default";
1294                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1295                 status = "disabled";
1296         };
1297
1298         i2c-gpio-1 {
1299                 compatible = "i2c-gpio";
1300                 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
1301                          &pioC 1 GPIO_ACTIVE_HIGH /* scl */
1302                         >;
1303                 i2c-gpio,sda-open-drain;
1304                 i2c-gpio,scl-open-drain;
1305                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1306                 #address-cells = <1>;
1307                 #size-cells = <0>;
1308                 pinctrl-names = "default";
1309                 pinctrl-0 = <&pinctrl_i2c_gpio1>;
1310                 status = "disabled";
1311         };
1312
1313         i2c-gpio-2 {
1314                 compatible = "i2c-gpio";
1315                 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1316                          &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1317                         >;
1318                 i2c-gpio,sda-open-drain;
1319                 i2c-gpio,scl-open-drain;
1320                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1321                 #address-cells = <1>;
1322                 #size-cells = <0>;
1323                 pinctrl-names = "default";
1324                 pinctrl-0 = <&pinctrl_i2c_gpio2>;
1325                 status = "disabled";
1326         };
1327 };