1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
5 * Copyright (C) 2012 Atmel,
6 * 2012 Hong Xu <hong.xu@atmel.com>
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14 #include <dt-bindings/mfd/at91-usart.h>
19 model = "Atmel AT91SAM9N12 SoC";
20 compatible = "atmel,at91sam9n12";
21 interrupt-parent = <&aic>;
45 compatible = "arm,arm926ej-s";
52 device_type = "memory";
53 reg = <0x20000000 0x10000000>;
57 slow_xtal: slow_xtal {
58 compatible = "fixed-clock";
60 clock-frequency = <0>;
63 main_xtal: main_xtal {
64 compatible = "fixed-clock";
66 clock-frequency = <0>;
71 compatible = "mmio-sram";
72 reg = <0x00300000 0x8000>;
75 ranges = <0 0x00300000 0x8000>;
79 compatible = "simple-bus";
85 compatible = "simple-bus";
90 aic: interrupt-controller@fffff000 {
91 #interrupt-cells = <3>;
92 compatible = "atmel,at91rm9200-aic";
94 reg = <0xfffff000 0x200>;
95 atmel,external-irqs = <31>;
98 matrix: matrix@ffffde00 {
99 compatible = "atmel,at91sam9n12-matrix", "syscon";
100 reg = <0xffffde00 0x100>;
103 pmecc: ecc-engine@ffffe000 {
104 compatible = "atmel,at91sam9g45-pmecc";
105 reg = <0xffffe000 0x600>,
109 ramc0: ramc@ffffe800 {
110 compatible = "atmel,at91sam9g45-ddramc";
111 reg = <0xffffe800 0x200>;
112 clocks = <&pmc PMC_TYPE_SYSTEM 2>;
113 clock-names = "ddrck";
117 compatible = "atmel,at91sam9260-smc", "syscon";
118 reg = <0xffffea00 0x200>;
122 compatible = "atmel,at91sam9n12-pmc", "syscon";
123 reg = <0xfffffc00 0x200>;
125 clocks = <&clk32k>, <&main_xtal>;
126 clock-names = "slow_clk", "main_xtal";
127 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
130 reset-controller@fffffe00 {
131 compatible = "atmel,at91sam9g45-rstc";
132 reg = <0xfffffe00 0x10>;
136 pit: timer@fffffe30 {
137 compatible = "atmel,at91sam9260-pit";
138 reg = <0xfffffe30 0xf>;
139 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
140 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
144 compatible = "atmel,at91sam9x5-shdwc";
145 reg = <0xfffffe10 0x10>;
150 compatible = "atmel,at91sam9x5-sckc";
151 reg = <0xfffffe50 0x4>;
154 compatible = "atmel,at91sam9x5-clk-slow-osc";
156 clocks = <&slow_xtal>;
159 slow_rc_osc: slow_rc_osc {
160 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
162 clock-frequency = <32768>;
163 clock-accuracy = <50000000>;
167 compatible = "atmel,at91sam9x5-clk-slow";
169 clocks = <&slow_rc_osc>, <&slow_osc>;
174 compatible = "atmel,hsmci";
175 reg = <0xf0008000 0x600>;
176 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
177 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
179 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
180 clock-names = "mci_clk";
181 #address-cells = <1>;
186 tcb0: timer@f8008000 {
187 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
188 #address-cells = <1>;
190 reg = <0xf8008000 0x100>;
191 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
192 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
193 clock-names = "t0_clk", "slow_clk";
196 tcb1: timer@f800c000 {
197 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
198 #address-cells = <1>;
200 reg = <0xf800c000 0x100>;
201 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
202 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&clk32k>;
203 clock-names = "t0_clk", "slow_clk";
206 hlcdc: hlcdc@f8038000 {
207 compatible = "atmel,at91sam9n12-hlcdc";
208 reg = <0xf8038000 0x2000>;
209 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
210 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
211 clock-names = "periph_clk", "sys_clk", "slow_clk";
214 hlcdc-display-controller {
215 compatible = "atmel,hlcdc-display-controller";
216 #address-cells = <1>;
220 #address-cells = <1>;
226 hlcdc_pwm: hlcdc-pwm {
227 compatible = "atmel,hlcdc-pwm";
228 pinctrl-names = "default";
229 pinctrl-0 = <&pinctrl_lcd_pwm>;
234 dma: dma-controller@ffffec00 {
235 compatible = "atmel,at91sam9g45-dma";
236 reg = <0xffffec00 0x200>;
237 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
239 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
240 clock-names = "dma_clk";
244 #address-cells = <1>;
246 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
247 ranges = <0xfffff400 0xfffff400 0x800>;
251 0xffffffff 0xffe07983 0x00000000 /* pioA */
252 0x00040000 0x00047e0f 0x00000000 /* pioB */
253 0xfdffffff 0x07c00000 0xb83fffff /* pioC */
254 0x003fffff 0x003f8000 0x00000000 /* pioD */
257 /* shared pinctrl settings */
259 pinctrl_dbgu: dbgu-0 {
261 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
262 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
267 pinctrl_lcd_base: lcd-base-0 {
269 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
270 AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
271 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDISP */
272 AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
273 AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
276 pinctrl_lcd_pwm: lcd-pwm-0 {
277 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
280 pinctrl_lcd_rgb888: lcd-rgb-3 {
282 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
283 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
284 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
285 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
286 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
287 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
288 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
289 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
290 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
291 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
292 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
293 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
294 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
295 AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
296 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
297 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
298 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
299 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
300 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
301 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
302 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
303 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
304 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
305 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
310 pinctrl_usart0: usart0-0 {
312 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
313 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
316 pinctrl_usart0_rts: usart0_rts-0 {
318 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
321 pinctrl_usart0_cts: usart0_cts-0 {
323 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
328 pinctrl_usart1: usart1-0 {
330 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
331 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
336 pinctrl_usart2: usart2-0 {
338 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
339 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
342 pinctrl_usart2_rts: usart2_rts-0 {
344 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
347 pinctrl_usart2_cts: usart2_cts-0 {
349 <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
354 pinctrl_usart3: usart3-0 {
356 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
357 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
360 pinctrl_usart3_rts: usart3_rts-0 {
362 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
365 pinctrl_usart3_cts: usart3_cts-0 {
367 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
372 pinctrl_uart0: uart0-0 {
374 <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
375 AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
380 pinctrl_uart1: uart1-0 {
382 <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE
383 AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;
388 pinctrl_nand_rb: nand-rb-0 {
390 <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
393 pinctrl_nand_cs: nand-cs-0 {
395 <AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
400 pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
402 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
403 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
404 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
407 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
409 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
410 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
411 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
414 pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
416 <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
417 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
418 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
419 AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
424 pinctrl_ssc0_tx: ssc0_tx-0 {
426 <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
427 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
428 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
431 pinctrl_ssc0_rx: ssc0_rx-0 {
433 <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
434 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
435 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
440 pinctrl_spi0: spi0-0 {
442 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
443 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
444 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
449 pinctrl_spi1: spi1-0 {
451 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
452 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
453 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
458 pinctrl_i2c0: i2c0-0 {
460 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
461 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
466 pinctrl_i2c1: i2c1-0 {
468 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
469 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
474 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
475 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
478 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
479 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
482 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
483 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
486 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
487 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
490 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
491 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
494 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
495 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
498 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
499 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
502 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
503 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
506 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
507 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
512 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
513 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
516 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
517 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
520 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
521 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
524 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
525 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
528 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
529 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
532 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
533 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
536 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
537 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
540 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
541 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
544 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
545 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
549 pioA: gpio@fffff400 {
550 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
551 reg = <0xfffff400 0x200>;
552 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
555 interrupt-controller;
556 #interrupt-cells = <2>;
557 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
560 pioB: gpio@fffff600 {
561 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
562 reg = <0xfffff600 0x200>;
563 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
566 interrupt-controller;
567 #interrupt-cells = <2>;
568 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
571 pioC: gpio@fffff800 {
572 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
573 reg = <0xfffff800 0x200>;
574 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
577 interrupt-controller;
578 #interrupt-cells = <2>;
579 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
582 pioD: gpio@fffffa00 {
583 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
584 reg = <0xfffffa00 0x200>;
585 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
588 interrupt-controller;
589 #interrupt-cells = <2>;
590 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
594 dbgu: serial@fffff200 {
595 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
596 reg = <0xfffff200 0x200>;
597 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
598 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
599 pinctrl-names = "default";
600 pinctrl-0 = <&pinctrl_dbgu>;
601 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
602 clock-names = "usart";
607 compatible = "atmel,at91sam9g45-ssc";
608 reg = <0xf0010000 0x4000>;
609 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
610 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
611 <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
612 dma-names = "tx", "rx";
613 pinctrl-names = "default";
614 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
615 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
616 clock-names = "pclk";
620 usart0: serial@f801c000 {
621 compatible = "atmel,at91sam9260-usart";
622 reg = <0xf801c000 0x4000>;
623 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
624 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
625 pinctrl-names = "default";
626 pinctrl-0 = <&pinctrl_usart0>;
627 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
628 clock-names = "usart";
632 usart1: serial@f8020000 {
633 compatible = "atmel,at91sam9260-usart";
634 reg = <0xf8020000 0x4000>;
635 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
636 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
637 pinctrl-names = "default";
638 pinctrl-0 = <&pinctrl_usart1>;
639 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
640 clock-names = "usart";
644 usart2: serial@f8024000 {
645 compatible = "atmel,at91sam9260-usart";
646 reg = <0xf8024000 0x4000>;
647 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
648 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
649 pinctrl-names = "default";
650 pinctrl-0 = <&pinctrl_usart2>;
651 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
652 clock-names = "usart";
656 usart3: serial@f8028000 {
657 compatible = "atmel,at91sam9260-usart";
658 reg = <0xf8028000 0x4000>;
659 atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
660 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
661 pinctrl-names = "default";
662 pinctrl-0 = <&pinctrl_usart3>;
663 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
664 clock-names = "usart";
669 compatible = "atmel,at91sam9x5-i2c";
670 reg = <0xf8010000 0x100>;
671 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
672 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
673 <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
674 dma-names = "tx", "rx";
675 #address-cells = <1>;
677 pinctrl-names = "default";
678 pinctrl-0 = <&pinctrl_i2c0>;
679 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
684 compatible = "atmel,at91sam9x5-i2c";
685 reg = <0xf8014000 0x100>;
686 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
687 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
688 <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
689 dma-names = "tx", "rx";
690 #address-cells = <1>;
692 pinctrl-names = "default";
693 pinctrl-0 = <&pinctrl_i2c1>;
694 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
699 #address-cells = <1>;
701 compatible = "atmel,at91rm9200-spi";
702 reg = <0xf0000000 0x100>;
703 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
704 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
705 <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
706 dma-names = "tx", "rx";
707 pinctrl-names = "default";
708 pinctrl-0 = <&pinctrl_spi0>;
709 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
710 clock-names = "spi_clk";
715 #address-cells = <1>;
717 compatible = "atmel,at91rm9200-spi";
718 reg = <0xf0004000 0x100>;
719 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
720 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
721 <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
722 dma-names = "tx", "rx";
723 pinctrl-names = "default";
724 pinctrl-0 = <&pinctrl_spi1>;
725 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
726 clock-names = "spi_clk";
731 compatible = "atmel,at91sam9260-wdt";
732 reg = <0xfffffe40 0x10>;
733 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
735 atmel,watchdog-type = "hardware";
736 atmel,reset-type = "all";
742 compatible = "atmel,at91rm9200-rtc";
743 reg = <0xfffffeb0 0x40>;
744 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
750 compatible = "atmel,at91sam9rl-pwm";
751 reg = <0xf8034000 0x300>;
752 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
754 clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
758 usb1: gadget@f803c000 {
759 compatible = "atmel,at91sam9260-udc";
760 reg = <0xf803c000 0x4000>;
761 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
762 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_SYSTEM 7>;
763 clock-names = "pclk", "hclk";
769 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
770 reg = <0x00500000 0x00100000>;
771 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
772 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
773 clock-names = "ohci_clk", "hclk", "uhpck";
778 compatible = "atmel,at91sam9x5-ebi";
779 #address-cells = <2>;
782 atmel,matrix = <&matrix>;
783 reg = <0x10000000 0x60000000>;
784 ranges = <0x0 0x0 0x10000000 0x10000000
785 0x1 0x0 0x20000000 0x10000000
786 0x2 0x0 0x30000000 0x10000000
787 0x3 0x0 0x40000000 0x10000000
788 0x4 0x0 0x50000000 0x10000000
789 0x5 0x0 0x60000000 0x10000000>;
790 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
793 nand_controller: nand-controller {
794 compatible = "atmel,at91sam9g45-nand-controller";
795 ecc-engine = <&pmecc>;
796 #address-cells = <2>;
805 compatible = "i2c-gpio";
806 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
807 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
809 i2c-gpio,sda-open-drain;
810 i2c-gpio,scl-open-drain;
811 i2c-gpio,delay-us = <2>; /* ~100 kHz */
812 #address-cells = <1>;