arch/arm/boot/dts/at91sam9g45.dtsi

   1 /*
   2  * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
   3  *                    applies to AT91SAM9G45, AT91SAM9M10,
   4  *                    AT91SAM9G46, AT91SAM9M11 SoC
   5  *
   6  *  Copyright (C) 2011 Atmel,
   7  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 #include "skeleton.dtsi"
  13 #include <dt-bindings/dma/at91.h>
  14 #include <dt-bindings/pinctrl/at91.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/clock/at91.h>
  18
  19 / {
  20         model = "Atmel AT91SAM9G45 family SoC";
  21         compatible = "atmel,at91sam9g45";
  22         interrupt-parent = <&aic>;
  23
  24         aliases {
  25                 serial0 = &dbgu;
  26                 serial1 = &usart0;
  27                 serial2 = &usart1;
  28                 serial3 = &usart2;
  29                 serial4 = &usart3;
  30                 gpio0 = &pioA;
  31                 gpio1 = &pioB;
  32                 gpio2 = &pioC;
  33                 gpio3 = &pioD;
  34                 gpio4 = &pioE;
  35                 tcb0 = &tcb0;
  36                 tcb1 = &tcb1;
  37                 i2c0 = &i2c0;
  38                 i2c1 = &i2c1;
  39                 ssc0 = &ssc0;
  40                 ssc1 = &ssc1;
  41                 pwm0 = &pwm0;
  42         };
  43         cpus {
  44                 #address-cells = <0>;
  45                 #size-cells = <0>;
  46
  47                 cpu {
  48                         compatible = "arm,arm926ej-s";
  49                         device_type = "cpu";
  50                 };
  51         };
  52
  53         memory {
  54                 reg = <0x70000000 0x10000000>;
  55         };
  56
  57         clocks {
  58                 slow_xtal: slow_xtal {
  59                         compatible = "fixed-clock";
  60                         #clock-cells = <0>;
  61                         clock-frequency = <0>;
  62                 };
  63
  64                 main_xtal: main_xtal {
  65                         compatible = "fixed-clock";
  66                         #clock-cells = <0>;
  67                         clock-frequency = <0>;
  68                 };
  69
  70                 adc_op_clk: adc_op_clk{
  71                         compatible = "fixed-clock";
  72                         #clock-cells = <0>;
  73                         clock-frequency = <300000>;
  74                 };
  75         };
  76
  77         sram: sram@300000 {
  78                 compatible = "mmio-sram";
  79                 reg = <0x00300000 0x10000>;
  80         };
  81
  82         ahb {
  83                 compatible = "simple-bus";
  84                 #address-cells = <1>;
  85                 #size-cells = <1>;
  86                 ranges;
  87
  88                 apb {
  89                         compatible = "simple-bus";
  90                         #address-cells = <1>;
  91                         #size-cells = <1>;
  92                         ranges;
  93
  94                         aic: interrupt-controller@fffff000 {
  95                                 #interrupt-cells = <3>;
  96                                 compatible = "atmel,at91rm9200-aic";
  97                                 interrupt-controller;
  98                                 reg = <0xfffff000 0x200>;
  99                                 atmel,external-irqs = <31>;
 100                         };
 101
 102                         ramc0: ramc@ffffe400 {
 103                                 compatible = "atmel,at91sam9g45-ddramc";
 104                                 reg = <0xffffe400 0x200>;
 105                                 clocks = <&ddrck>;
 106                                 clock-names = "ddrck";
 107                         };
 108
 109                         ramc1: ramc@ffffe600 {
 110                                 compatible = "atmel,at91sam9g45-ddramc";
 111                                 reg = <0xffffe600 0x200>;
 112                                 clocks = <&ddrck>;
 113                                 clock-names = "ddrck";
 114                         };
 115
 116                         smc: smc@ffffe800 {
 117                                 compatible = "atmel,at91sam9260-smc", "syscon";
 118                                 reg = <0xffffe800 0x200>;
 119                         };
 120
 121                         matrix: matrix@ffffea00 {
 122                                 compatible = "atmel,at91sam9g45-matrix", "syscon";
 123                                 reg = <0xffffea00 0x200>;
 124                         };
 125
 126                         pmc: pmc@fffffc00 {
 127                                 compatible = "atmel,at91sam9g45-pmc", "syscon";
 128                                 reg = <0xfffffc00 0x100>;
 129                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 130                                 interrupt-controller;
 131                                 #address-cells = <1>;
 132                                 #size-cells = <0>;
 133                                 #interrupt-cells = <1>;
 134
 135                                 main_osc: main_osc {
 136                                         compatible = "atmel,at91rm9200-clk-main-osc";
 137                                         #clock-cells = <0>;
 138                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 139                                         clocks = <&main_xtal>;
 140                                 };
 141
 142                                 main: mainck {
 143                                         compatible = "atmel,at91rm9200-clk-main";
 144                                         #clock-cells = <0>;
 145                                         clocks = <&main_osc>;
 146                                 };
 147
 148                                 plla: pllack {
 149                                         compatible = "atmel,at91rm9200-clk-pll";
 150                                         #clock-cells = <0>;
 151                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 152                                         clocks = <&main>;
 153                                         reg = <0>;
 154                                         atmel,clk-input-range = <2000000 32000000>;
 155                                         #atmel,pll-clk-output-range-cells = <4>;
 156                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0
 157                                                                        695000000 750000000 1 0
 158                                                                        645000000 700000000 2 0
 159                                                                        595000000 650000000 3 0
 160                                                                        545000000 600000000 0 1
 161                                                                        495000000 555000000 1 1
 162                                                                        445000000 500000000 2 1
 163                                                                        400000000 450000000 3 1>;
 164                                 };
 165
 166                                 plladiv: plladivck {
 167                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 168                                         #clock-cells = <0>;
 169                                         clocks = <&plla>;
 170                                 };
 171
 172                                 utmi: utmick {
 173                                         compatible = "atmel,at91sam9x5-clk-utmi";
 174                                         #clock-cells = <0>;
 175                                         interrupts-extended = <&pmc AT91_PMC_LOCKU>;
 176                                         clocks = <&main>;
 177                                 };
 178
 179                                 mck: masterck {
 180                                         compatible = "atmel,at91rm9200-clk-master";
 181                                         #clock-cells = <0>;
 182                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 183                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
 184                                         atmel,clk-output-range = <0 133333333>;
 185                                         atmel,clk-divisors = <1 2 4 3>;
 186                                 };
 187
 188                                 usb: usbck {
 189                                         compatible = "atmel,at91sam9x5-clk-usb";
 190                                         #clock-cells = <0>;
 191                                         clocks = <&plladiv>, <&utmi>;
 192                                 };
 193
 194                                 prog: progck {
 195                                         compatible = "atmel,at91sam9g45-clk-programmable";
 196                                         #address-cells = <1>;
 197                                         #size-cells = <0>;
 198                                         interrupt-parent = <&pmc>;
 199                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
 200
 201                                         prog0: prog0 {
 202                                                 #clock-cells = <0>;
 203                                                 reg = <0>;
 204                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 205                                         };
 206
 207                                         prog1: prog1 {
 208                                                 #clock-cells = <0>;
 209                                                 reg = <1>;
 210                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 211                                         };
 212                                 };
 213
 214                                 systemck {
 215                                         compatible = "atmel,at91rm9200-clk-system";
 216                                         #address-cells = <1>;
 217                                         #size-cells = <0>;
 218
 219                                         ddrck: ddrck {
 220                                                 #clock-cells = <0>;
 221                                                 reg = <2>;
 222                                                 clocks = <&mck>;
 223                                         };
 224
 225                                         uhpck: uhpck {
 226                                                 #clock-cells = <0>;
 227                                                 reg = <6>;
 228                                                 clocks = <&usb>;
 229                                         };
 230
 231                                         pck0: pck0 {
 232                                                 #clock-cells = <0>;
 233                                                 reg = <8>;
 234                                                 clocks = <&prog0>;
 235                                         };
 236
 237                                         pck1: pck1 {
 238                                                 #clock-cells = <0>;
 239                                                 reg = <9>;
 240                                                 clocks = <&prog1>;
 241                                         };
 242                                 };
 243
 244                                 periphck {
 245                                         compatible = "atmel,at91rm9200-clk-peripheral";
 246                                         #address-cells = <1>;
 247                                         #size-cells = <0>;
 248                                         clocks = <&mck>;
 249
 250                                         pioA_clk: pioA_clk {
 251                                                 #clock-cells = <0>;
 252                                                 reg = <2>;
 253                                         };
 254
 255                                         pioB_clk: pioB_clk {
 256                                                 #clock-cells = <0>;
 257                                                 reg = <3>;
 258                                         };
 259
 260                                         pioC_clk: pioC_clk {
 261                                                 #clock-cells = <0>;
 262                                                 reg = <4>;
 263                                         };
 264
 265                                         pioDE_clk: pioDE_clk {
 266                                                 #clock-cells = <0>;
 267                                                 reg = <5>;
 268                                         };
 269
 270                                         trng_clk: trng_clk {
 271                                                 #clock-cells = <0>;
 272                                                 reg = <6>;
 273                                         };
 274
 275                                         usart0_clk: usart0_clk {
 276                                                 #clock-cells = <0>;
 277                                                 reg = <7>;
 278                                         };
 279
 280                                         usart1_clk: usart1_clk {
 281                                                 #clock-cells = <0>;
 282                                                 reg = <8>;
 283                                         };
 284
 285                                         usart2_clk: usart2_clk {
 286                                                 #clock-cells = <0>;
 287                                                 reg = <9>;
 288                                         };
 289
 290                                         usart3_clk: usart3_clk {
 291                                                 #clock-cells = <0>;
 292                                                 reg = <10>;
 293                                         };
 294
 295                                         mci0_clk: mci0_clk {
 296                                                 #clock-cells = <0>;
 297                                                 reg = <11>;
 298                                         };
 299
 300                                         twi0_clk: twi0_clk {
 301                                                 #clock-cells = <0>;
 302                                                 reg = <12>;
 303                                         };
 304
 305                                         twi1_clk: twi1_clk {
 306                                                 #clock-cells = <0>;
 307                                                 reg = <13>;
 308                                         };
 309
 310                                         spi0_clk: spi0_clk {
 311                                                 #clock-cells = <0>;
 312                                                 reg = <14>;
 313                                         };
 314
 315                                         spi1_clk: spi1_clk {
 316                                                 #clock-cells = <0>;
 317                                                 reg = <15>;
 318                                         };
 319
 320                                         ssc0_clk: ssc0_clk {
 321                                                 #clock-cells = <0>;
 322                                                 reg = <16>;
 323                                         };
 324
 325                                         ssc1_clk: ssc1_clk {
 326                                                 #clock-cells = <0>;
 327                                                 reg = <17>;
 328                                         };
 329
 330                                         tcb0_clk: tcb0_clk {
 331                                                 #clock-cells = <0>;
 332                                                 reg = <18>;
 333                                         };
 334
 335                                         pwm_clk: pwm_clk {
 336                                                 #clock-cells = <0>;
 337                                                 reg = <19>;
 338                                         };
 339
 340                                         adc_clk: adc_clk {
 341                                                 #clock-cells = <0>;
 342                                                 reg = <20>;
 343                                         };
 344
 345                                         dma0_clk: dma0_clk {
 346                                                 #clock-cells = <0>;
 347                                                 reg = <21>;
 348                                         };
 349
 350                                         uhphs_clk: uhphs_clk {
 351                                                 #clock-cells = <0>;
 352                                                 reg = <22>;
 353                                         };
 354
 355                                         lcd_clk: lcd_clk {
 356                                                 #clock-cells = <0>;
 357                                                 reg = <23>;
 358                                         };
 359
 360                                         ac97_clk: ac97_clk {
 361                                                 #clock-cells = <0>;
 362                                                 reg = <24>;
 363                                         };
 364
 365                                         macb0_clk: macb0_clk {
 366                                                 #clock-cells = <0>;
 367                                                 reg = <25>;
 368                                         };
 369
 370                                         isi_clk: isi_clk {
 371                                                 #clock-cells = <0>;
 372                                                 reg = <26>;
 373                                         };
 374
 375                                         udphs_clk: udphs_clk {
 376                                                 #clock-cells = <0>;
 377                                                 reg = <27>;
 378                                         };
 379
 380                                         aestdessha_clk: aestdessha_clk {
 381                                                 #clock-cells = <0>;
 382                                                 reg = <28>;
 383                                         };
 384
 385                                         mci1_clk: mci1_clk {
 386                                                 #clock-cells = <0>;
 387                                                 reg = <29>;
 388                                         };
 389
 390                                         vdec_clk: vdec_clk {
 391                                                 #clock-cells = <0>;
 392                                                 reg = <30>;
 393                                         };
 394                                 };
 395                         };
 396
 397                         rstc@fffffd00 {
 398                                 compatible = "atmel,at91sam9g45-rstc";
 399                                 reg = <0xfffffd00 0x10>;
 400                                 clocks = <&clk32k>;
 401                         };
 402
 403                         pit: timer@fffffd30 {
 404                                 compatible = "atmel,at91sam9260-pit";
 405                                 reg = <0xfffffd30 0xf>;
 406                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 407                                 clocks = <&mck>;
 408                         };
 409
 410
 411                         shdwc@fffffd10 {
 412                                 compatible = "atmel,at91sam9rl-shdwc";
 413                                 reg = <0xfffffd10 0x10>;
 414                                 clocks = <&clk32k>;
 415                         };
 416
 417                         tcb0: timer@fff7c000 {
 418                                 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
 419                                 #address-cells = <1>;
 420                                 #size-cells = <0>;
 421                                 reg = <0xfff7c000 0x100>;
 422                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
 423                                 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
 424                                 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 425                         };
 426
 427                         tcb1: timer@fffd4000 {
 428                                 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
 429                                 #address-cells = <1>;
 430                                 #size-cells = <0>;
 431                                 reg = <0xfffd4000 0x100>;
 432                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
 433                                 clocks = <&tcb0_clk>, <&tcb0_clk>, <&tcb0_clk>, <&clk32k>;
 434                                 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 435                         };
 436
 437                         dma: dma-controller@ffffec00 {
 438                                 compatible = "atmel,at91sam9g45-dma";
 439                                 reg = <0xffffec00 0x200>;
 440                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
 441                                 #dma-cells = <2>;
 442                                 clocks = <&dma0_clk>;
 443                                 clock-names = "dma_clk";
 444                         };
 445
 446                         pinctrl@fffff200 {
 447                                 #address-cells = <1>;
 448                                 #size-cells = <1>;
 449                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 450                                 ranges = <0xfffff200 0xfffff200 0xa00>;
 451
 452                                 atmel,mux-mask = <
 453                                       /*    A         B     */
 454                                        0xffffffff 0xffc003ff  /* pioA */
 455                                        0xffffffff 0x800f8f00  /* pioB */
 456                                        0xffffffff 0x00000e00  /* pioC */
 457                                        0xffffffff 0xff0c1381  /* pioD */
 458                                        0xffffffff 0x81ffff81  /* pioE */
 459                                       >;
 460
 461                                 /* shared pinctrl settings */
 462                                 ac97 {
 463                                         pinctrl_ac97: ac97-0 {
 464                                                 atmel,pins =
 465                                                         <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* AC97RX */
 466                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* AC97TX */
 467                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* AC97FS */
 468                                                          AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* AC97CK */
 469                                         };
 470                                 };
 471
 472                                 adc0 {
 473                                         pinctrl_adc0_adtrg: adc0_adtrg {
 474                                                 atmel,pins = <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 475                                         };
 476                                         pinctrl_adc0_ad0: adc0_ad0 {
 477                                                 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 478                                         };
 479                                         pinctrl_adc0_ad1: adc0_ad1 {
 480                                                 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 481                                         };
 482                                         pinctrl_adc0_ad2: adc0_ad2 {
 483                                                 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 484                                         };
 485                                         pinctrl_adc0_ad3: adc0_ad3 {
 486                                                 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 487                                         };
 488                                         pinctrl_adc0_ad4: adc0_ad4 {
 489                                                 atmel,pins = <AT91_PIOD 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 490                                         };
 491                                         pinctrl_adc0_ad5: adc0_ad5 {
 492                                                 atmel,pins = <AT91_PIOD 25 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 493                                         };
 494                                         pinctrl_adc0_ad6: adc0_ad6 {
 495                                                 atmel,pins = <AT91_PIOD 26 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 496                                         };
 497                                         pinctrl_adc0_ad7: adc0_ad7 {
 498                                                 atmel,pins = <AT91_PIOD 27 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
 499                                         };
 500                                 };
 501
 502                                 dbgu {
 503                                         pinctrl_dbgu: dbgu-0 {
 504                                                 atmel,pins =
 505                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
 506                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 507                                         };
 508                                 };
 509
 510                                 i2c0 {
 511                                         pinctrl_i2c0: i2c0-0 {
 512                                                 atmel,pins =
 513                                                         <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA21 periph A TWCK0 */
 514                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A TWD0 */
 515                                         };
 516                                 };
 517
 518                                 i2c1 {
 519                                         pinctrl_i2c1: i2c1-0 {
 520                                                 atmel,pins =
 521                                                         <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB11 periph A TWCK1 */
 522                                                          AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A TWD1 */
 523                                         };
 524                                 };
 525
 526                                 isi {
 527                                         pinctrl_isi_data_0_7: isi-0-data-0-7 {
 528                                                 atmel,pins =
 529                                                         <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* D0 */
 530                                                         AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* D1 */
 531                                                         AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* D2 */
 532                                                         AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* D3 */
 533                                                         AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* D4 */
 534                                                         AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* D5 */
 535                                                         AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* D6 */
 536                                                         AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* D7 */
 537                                                         AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PCK */
 538                                                         AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
 539                                                         AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* HSYNC */
 540                                         };
 541
 542                                         pinctrl_isi_data_8_9: isi-0-data-8-9 {
 543                                                 atmel,pins =
 544                                                         <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* D8 */
 545                                                         AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D9 */
 546                                         };
 547
 548                                         pinctrl_isi_data_10_11: isi-0-data-10-11 {
 549                                                 atmel,pins =
 550                                                         <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* D10 */
 551                                                         AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* D11 */
 552                                         };
 553                                 };
 554
 555                                 usart0 {
 556                                         pinctrl_usart0: usart0-0 {
 557                                                 atmel,pins =
 558                                                         <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
 559                                                          AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 560                                         };
 561
 562                                         pinctrl_usart0_rts: usart0_rts-0 {
 563                                                 atmel,pins =
 564                                                         <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
 565                                         };
 566
 567                                         pinctrl_usart0_cts: usart0_cts-0 {
 568                                                 atmel,pins =
 569                                                         <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
 570                                         };
 571                                 };
 572
 573                                 usart1 {
 574                                         pinctrl_usart1: usart1-0 {
 575                                                 atmel,pins =
 576                                                         <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
 577                                                          AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 578                                         };
 579
 580                                         pinctrl_usart1_rts: usart1_rts-0 {
 581                                                 atmel,pins =
 582                                                         <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
 583                                         };
 584
 585                                         pinctrl_usart1_cts: usart1_cts-0 {
 586                                                 atmel,pins =
 587                                                         <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
 588                                         };
 589                                 };
 590
 591                                 usart2 {
 592                                         pinctrl_usart2: usart2-0 {
 593                                                 atmel,pins =
 594                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
 595                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 596                                         };
 597
 598                                         pinctrl_usart2_rts: usart2_rts-0 {
 599                                                 atmel,pins =
 600                                                         <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PC9 periph B */
 601                                         };
 602
 603                                         pinctrl_usart2_cts: usart2_cts-0 {
 604                                                 atmel,pins =
 605                                                         <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
 606                                         };
 607                                 };
 608
 609                                 usart3 {
 610                                         pinctrl_usart3: usart3-0 {
 611                                                 atmel,pins =
 612                                                         <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
 613                                                          AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
 614                                         };
 615
 616                                         pinctrl_usart3_rts: usart3_rts-0 {
 617                                                 atmel,pins =
 618                                                         <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
 619                                         };
 620
 621                                         pinctrl_usart3_cts: usart3_cts-0 {
 622                                                 atmel,pins =
 623                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
 624                                         };
 625                                 };
 626
 627                                 nand {
 628                                         pinctrl_nand_rb: nand-rb-0 {
 629                                                 atmel,pins =
 630                                                         <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 631                                         };
 632
 633                                         pinctrl_nand_cs: nand-cs-0 {
 634                                                 atmel,pins =
 635                                                          <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
 636                                         };
 637                                 };
 638
 639                                 macb {
 640                                         pinctrl_macb_rmii: macb_rmii-0 {
 641                                                 atmel,pins =
 642                                                         <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA10 periph A */
 643                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A */
 644                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A */
 645                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA13 periph A */
 646                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA14 periph A */
 647                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA15 periph A */
 648                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA16 periph A */
 649                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 650                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA18 periph A */
 651                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
 652                                         };
 653
 654                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 655                                                 atmel,pins =
 656                                                         <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA6 periph B */
 657                                                          AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA7 periph B */
 658                                                          AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA8 periph B */
 659                                                          AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA9 periph B */
 660                                                          AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 661                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 662                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA29 periph B */
 663                                                          AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
 664                                         };
 665                                 };
 666
 667                                 mmc0 {
 668                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 669                                                 atmel,pins =
 670                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A */
 671                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
 672                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA2 periph A with pullup */
 673                                         };
 674
 675                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 676                                                 atmel,pins =
 677                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
 678                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
 679                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA5 periph A with pullup */
 680                                         };
 681
 682                                         pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
 683                                                 atmel,pins =
 684                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
 685                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
 686                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
 687                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA9 periph A with pullup */
 688                                         };
 689                                 };
 690
 691                                 mmc1 {
 692                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 693                                                 atmel,pins =
 694                                                         <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA31 periph A */
 695                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA22 periph A with pullup */
 696                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA23 periph A with pullup */
 697                                         };
 698
 699                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 700                                                 atmel,pins =
 701                                                         <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA24 periph A with pullup */
 702                                                          AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA25 periph A with pullup */
 703                                                          AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA26 periph A with pullup */
 704                                         };
 705
 706                                         pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
 707                                                 atmel,pins =
 708                                                         <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA27 periph A with pullup */
 709                                                          AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA28 periph A with pullup */
 710                                                          AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA29 periph A with pullup */
 711                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA30 periph A with pullup */
 712                                         };
 713                                 };
 714
 715                                 ssc0 {
 716                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 717                                                 atmel,pins =
 718                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD0 periph A */
 719                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD1 periph A */
 720                                                          AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD2 periph A */
 721                                         };
 722
 723                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 724                                                 atmel,pins =
 725                                                         <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD3 periph A */
 726                                                          AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD4 periph A */
 727                                                          AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD5 periph A */
 728                                         };
 729                                 };
 730
 731                                 ssc1 {
 732                                         pinctrl_ssc1_tx: ssc1_tx-0 {
 733                                                 atmel,pins =
 734                                                         <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A */
 735                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A */
 736                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
 737                                         };
 738
 739                                         pinctrl_ssc1_rx: ssc1_rx-0 {
 740                                                 atmel,pins =
 741                                                         <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD13 periph A */
 742                                                          AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD14 periph A */
 743                                                          AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
 744                                         };
 745                                 };
 746
 747                                 spi0 {
 748                                         pinctrl_spi0: spi0-0 {
 749                                                 atmel,pins =
 750                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A SPI0_MISO pin */
 751                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A SPI0_MOSI pin */
 752                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB2 periph A SPI0_SPCK pin */
 753                                         };
 754                                 };
 755
 756                                 spi1 {
 757                                         pinctrl_spi1: spi1-0 {
 758                                                 atmel,pins =
 759                                                         <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB14 periph A SPI1_MISO pin */
 760                                                          AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB15 periph A SPI1_MOSI pin */
 761                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
 762                                         };
 763                                 };
 764
 765                                 tcb0 {
 766                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 767                                                 atmel,pins = <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 768                                         };
 769
 770                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 771                                                 atmel,pins = <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 772                                         };
 773
 774                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 775                                                 atmel,pins = <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 776                                         };
 777
 778                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 779                                                 atmel,pins = <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 780                                         };
 781
 782                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 783                                                 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 784                                         };
 785
 786                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 787                                                 atmel,pins = <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 788                                         };
 789
 790                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 791                                                 atmel,pins = <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 792                                         };
 793
 794                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 795                                                 atmel,pins = <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 796                                         };
 797
 798                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 799                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 800                                         };
 801                                 };
 802
 803                                 tcb1 {
 804                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 805                                                 atmel,pins = <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 806                                         };
 807
 808                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 809                                                 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 810                                         };
 811
 812                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 813                                                 atmel,pins = <AT91_PIOD 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 814                                         };
 815
 816                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 817                                                 atmel,pins = <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 818                                         };
 819
 820                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 821                                                 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 822                                         };
 823
 824                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 825                                                 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 826                                         };
 827
 828                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 829                                                 atmel,pins = <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 830                                         };
 831
 832                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 833                                                 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 834                                         };
 835
 836                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 837                                                 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 838                                         };
 839                                 };
 840
 841                                 fb {
 842                                         pinctrl_fb: fb-0 {
 843                                                 atmel,pins =
 844                                                         <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE0 periph A */
 845                                                          AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE2 periph A */
 846                                                          AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE3 periph A */
 847                                                          AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE4 periph A */
 848                                                          AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE5 periph A */
 849                                                          AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE6 periph A */
 850                                                          AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE7 periph A */
 851                                                          AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE8 periph A */
 852                                                          AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PE9 periph A */
 853                                                          AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE10 periph A */
 854                                                          AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE11 periph A */
 855                                                          AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE12 periph A */
 856                                                          AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE13 periph A */
 857                                                          AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE14 periph A */
 858                                                          AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE15 periph A */
 859                                                          AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE16 periph A */
 860                                                          AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE17 periph A */
 861                                                          AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE18 periph A */
 862                                                          AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE19 periph A */
 863                                                          AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE20 periph A */
 864                                                          AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE21 periph A */
 865                                                          AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE22 periph A */
 866                                                          AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE23 periph A */
 867                                                          AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE24 periph A */
 868                                                          AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE25 periph A */
 869                                                          AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE26 periph A */
 870                                                          AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE27 periph A */
 871                                                          AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE28 periph A */
 872                                                          AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE29 periph A */
 873                                                          AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
 874                                         };
 875                                 };
 876
 877                                 pioA: gpio@fffff200 {
 878                                         compatible = "atmel,at91rm9200-gpio";
 879                                         reg = <0xfffff200 0x200>;
 880                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 881                                         #gpio-cells = <2>;
 882                                         gpio-controller;
 883                                         interrupt-controller;
 884                                         #interrupt-cells = <2>;
 885                                         clocks = <&pioA_clk>;
 886                                 };
 887
 888                                 pioB: gpio@fffff400 {
 889                                         compatible = "atmel,at91rm9200-gpio";
 890                                         reg = <0xfffff400 0x200>;
 891                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 892                                         #gpio-cells = <2>;
 893                                         gpio-controller;
 894                                         interrupt-controller;
 895                                         #interrupt-cells = <2>;
 896                                         clocks = <&pioB_clk>;
 897                                 };
 898
 899                                 pioC: gpio@fffff600 {
 900                                         compatible = "atmel,at91rm9200-gpio";
 901                                         reg = <0xfffff600 0x200>;
 902                                         interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 903                                         #gpio-cells = <2>;
 904                                         gpio-controller;
 905                                         interrupt-controller;
 906                                         #interrupt-cells = <2>;
 907                                         clocks = <&pioC_clk>;
 908                                 };
 909
 910                                 pioD: gpio@fffff800 {
 911                                         compatible = "atmel,at91rm9200-gpio";
 912                                         reg = <0xfffff800 0x200>;
 913                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
 914                                         #gpio-cells = <2>;
 915                                         gpio-controller;
 916                                         interrupt-controller;
 917                                         #interrupt-cells = <2>;
 918                                         clocks = <&pioDE_clk>;
 919                                 };
 920
 921                                 pioE: gpio@fffffa00 {
 922                                         compatible = "atmel,at91rm9200-gpio";
 923                                         reg = <0xfffffa00 0x200>;
 924                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
 925                                         #gpio-cells = <2>;
 926                                         gpio-controller;
 927                                         interrupt-controller;
 928                                         #interrupt-cells = <2>;
 929                                         clocks = <&pioDE_clk>;
 930                                 };
 931                         };
 932
 933                         dbgu: serial@ffffee00 {
 934                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 935                                 reg = <0xffffee00 0x200>;
 936                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 937                                 pinctrl-names = "default";
 938                                 pinctrl-0 = <&pinctrl_dbgu>;
 939                                 clocks = <&mck>;
 940                                 clock-names = "usart";
 941                                 status = "disabled";
 942                         };
 943
 944                         usart0: serial@fff8c000 {
 945                                 compatible = "atmel,at91sam9260-usart";
 946                                 reg = <0xfff8c000 0x200>;
 947                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 948                                 atmel,use-dma-rx;
 949                                 atmel,use-dma-tx;
 950                                 pinctrl-names = "default";
 951                                 pinctrl-0 = <&pinctrl_usart0>;
 952                                 clocks = <&usart0_clk>;
 953                                 clock-names = "usart";
 954                                 status = "disabled";
 955                         };
 956
 957                         usart1: serial@fff90000 {
 958                                 compatible = "atmel,at91sam9260-usart";
 959                                 reg = <0xfff90000 0x200>;
 960                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 961                                 atmel,use-dma-rx;
 962                                 atmel,use-dma-tx;
 963                                 pinctrl-names = "default";
 964                                 pinctrl-0 = <&pinctrl_usart1>;
 965                                 clocks = <&usart1_clk>;
 966                                 clock-names = "usart";
 967                                 status = "disabled";
 968                         };
 969
 970                         usart2: serial@fff94000 {
 971                                 compatible = "atmel,at91sam9260-usart";
 972                                 reg = <0xfff94000 0x200>;
 973                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
 974                                 atmel,use-dma-rx;
 975                                 atmel,use-dma-tx;
 976                                 pinctrl-names = "default";
 977                                 pinctrl-0 = <&pinctrl_usart2>;
 978                                 clocks = <&usart2_clk>;
 979                                 clock-names = "usart";
 980                                 status = "disabled";
 981                         };
 982
 983                         usart3: serial@fff98000 {
 984                                 compatible = "atmel,at91sam9260-usart";
 985                                 reg = <0xfff98000 0x200>;
 986                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
 987                                 atmel,use-dma-rx;
 988                                 atmel,use-dma-tx;
 989                                 pinctrl-names = "default";
 990                                 pinctrl-0 = <&pinctrl_usart3>;
 991                                 clocks = <&usart3_clk>;
 992                                 clock-names = "usart";
 993                                 status = "disabled";
 994                         };
 995
 996                         macb0: ethernet@fffbc000 {
 997                                 compatible = "cdns,at91sam9260-macb", "cdns,macb";
 998                                 reg = <0xfffbc000 0x100>;
 999                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
1000                                 pinctrl-names = "default";
1001                                 pinctrl-0 = <&pinctrl_macb_rmii>;
1002                                 clocks = <&macb0_clk>, <&macb0_clk>;
1003                                 clock-names = "hclk", "pclk";
1004                                 status = "disabled";
1005                         };
1006
1007                         trng@fffcc000 {
1008                                 compatible = "atmel,at91sam9g45-trng";
1009                                 reg = <0xfffcc000 0x100>;
1010                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
1011                                 clocks = <&trng_clk>;
1012                         };
1013
1014                         i2c0: i2c@fff84000 {
1015                                 compatible = "atmel,at91sam9g10-i2c";
1016                                 reg = <0xfff84000 0x100>;
1017                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
1018                                 pinctrl-names = "default";
1019                                 pinctrl-0 = <&pinctrl_i2c0>;
1020                                 #address-cells = <1>;
1021                                 #size-cells = <0>;
1022                                 clocks = <&twi0_clk>;
1023                                 status = "disabled";
1024                         };
1025
1026                         i2c1: i2c@fff88000 {
1027                                 compatible = "atmel,at91sam9g10-i2c";
1028                                 reg = <0xfff88000 0x100>;
1029                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
1030                                 pinctrl-names = "default";
1031                                 pinctrl-0 = <&pinctrl_i2c1>;
1032                                 #address-cells = <1>;
1033                                 #size-cells = <0>;
1034                                 clocks = <&twi1_clk>;
1035                                 status = "disabled";
1036                         };
1037
1038                         ssc0: ssc@fff9c000 {
1039                                 compatible = "atmel,at91sam9g45-ssc";
1040                                 reg = <0xfff9c000 0x4000>;
1041                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
1042                                 pinctrl-names = "default";
1043                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
1044                                 clocks = <&ssc0_clk>;
1045                                 clock-names = "pclk";
1046                                 status = "disabled";
1047                         };
1048
1049                         ssc1: ssc@fffa0000 {
1050                                 compatible = "atmel,at91sam9g45-ssc";
1051                                 reg = <0xfffa0000 0x4000>;
1052                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
1053                                 pinctrl-names = "default";
1054                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
1055                                 clocks = <&ssc1_clk>;
1056                                 clock-names = "pclk";
1057                                 status = "disabled";
1058                         };
1059
1060                         ac97: sound@fffac000 {
1061                                 compatible = "atmel,at91sam9263-ac97c";
1062                                 reg = <0xfffac000 0x4000>;
1063                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 4>;
1064                                 pinctrl-names = "default";
1065                                 pinctrl-0 = <&pinctrl_ac97>;
1066                                 clocks = <&ac97_clk>;
1067                                 clock-names = "ac97_clk";
1068                                 status = "disabled";
1069                         };
1070
1071                         adc0: adc@fffb0000 {
1072                                 #address-cells = <1>;
1073                                 #size-cells = <0>;
1074                                 compatible = "atmel,at91sam9g45-adc";
1075                                 reg = <0xfffb0000 0x100>;
1076                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
1077                                 clocks = <&adc_clk>, <&adc_op_clk>;
1078                                 clock-names = "adc_clk", "adc_op_clk";
1079                                 atmel,adc-channels-used = <0xff>;
1080                                 atmel,adc-vref = <3300>;
1081                                 atmel,adc-startup-time = <40>;
1082                                 atmel,adc-res = <8 10>;
1083                                 atmel,adc-res-names = "lowres", "highres";
1084                                 atmel,adc-use-res = "highres";
1085
1086                                 trigger0 {
1087                                         trigger-name = "external-rising";
1088                                         trigger-value = <0x1>;
1089                                         trigger-external;
1090                                 };
1091                                 trigger1 {
1092                                         trigger-name = "external-falling";
1093                                         trigger-value = <0x2>;
1094                                         trigger-external;
1095                                 };
1096
1097                                 trigger2 {
1098                                         trigger-name = "external-any";
1099                                         trigger-value = <0x3>;
1100                                         trigger-external;
1101                                 };
1102
1103                                 trigger3 {
1104                                         trigger-name = "continuous";
1105                                         trigger-value = <0x6>;
1106                                 };
1107                         };
1108
1109                         isi@fffb4000 {
1110                                 compatible = "atmel,at91sam9g45-isi";
1111                                 reg = <0xfffb4000 0x4000>;
1112                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 5>;
1113                                 clocks = <&isi_clk>;
1114                                 clock-names = "isi_clk";
1115                                 status = "disabled";
1116                                 port {
1117                                         #address-cells = <1>;
1118                                         #size-cells = <0>;
1119                                 };
1120                         };
1121
1122                         pwm0: pwm@fffb8000 {
1123                                 compatible = "atmel,at91sam9rl-pwm";
1124                                 reg = <0xfffb8000 0x300>;
1125                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
1126                                 #pwm-cells = <3>;
1127                                 clocks = <&pwm_clk>;
1128                                 status = "disabled";
1129                         };
1130
1131                         mmc0: mmc@fff80000 {
1132                                 compatible = "atmel,hsmci";
1133                                 reg = <0xfff80000 0x600>;
1134                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
1135                                 pinctrl-names = "default";
1136                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
1137                                 dma-names = "rxtx";
1138                                 #address-cells = <1>;
1139                                 #size-cells = <0>;
1140                                 clocks = <&mci0_clk>;
1141                                 clock-names = "mci_clk";
1142                                 status = "disabled";
1143                         };
1144
1145                         mmc1: mmc@fffd0000 {
1146                                 compatible = "atmel,hsmci";
1147                                 reg = <0xfffd0000 0x600>;
1148                                 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
1149                                 pinctrl-names = "default";
1150                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>;
1151                                 dma-names = "rxtx";
1152                                 #address-cells = <1>;
1153                                 #size-cells = <0>;
1154                                 clocks = <&mci1_clk>;
1155                                 clock-names = "mci_clk";
1156                                 status = "disabled";
1157                         };
1158
1159                         watchdog@fffffd40 {
1160                                 compatible = "atmel,at91sam9260-wdt";
1161                                 reg = <0xfffffd40 0x10>;
1162                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1163                                 clocks = <&clk32k>;
1164                                 atmel,watchdog-type = "hardware";
1165                                 atmel,reset-type = "all";
1166                                 atmel,dbg-halt;
1167                                 status = "disabled";
1168                         };
1169
1170                         spi0: spi@fffa4000 {
1171                                 #address-cells = <1>;
1172                                 #size-cells = <0>;
1173                                 compatible = "atmel,at91rm9200-spi";
1174                                 reg = <0xfffa4000 0x200>;
1175                                 interrupts = <14 4 3>;
1176                                 pinctrl-names = "default";
1177                                 pinctrl-0 = <&pinctrl_spi0>;
1178                                 clocks = <&spi0_clk>;
1179                                 clock-names = "spi_clk";
1180                                 status = "disabled";
1181                         };
1182
1183                         spi1: spi@fffa8000 {
1184                                 #address-cells = <1>;
1185                                 #size-cells = <0>;
1186                                 compatible = "atmel,at91rm9200-spi";
1187                                 reg = <0xfffa8000 0x200>;
1188                                 interrupts = <15 4 3>;
1189                                 pinctrl-names = "default";
1190                                 pinctrl-0 = <&pinctrl_spi1>;
1191                                 clocks = <&spi1_clk>;
1192                                 clock-names = "spi_clk";
1193                                 status = "disabled";
1194                         };
1195
1196                         usb2: gadget@fff78000 {
1197                                 #address-cells = <1>;
1198                                 #size-cells = <0>;
1199                                 compatible = "atmel,at91sam9g45-udc";
1200                                 reg = <0x00600000 0x80000
1201                                        0xfff78000 0x400>;
1202                                 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
1203                                 clocks = <&udphs_clk>, <&utmi>;
1204                                 clock-names = "pclk", "hclk";
1205                                 status = "disabled";
1206
1207                                 ep@0 {
1208                                         reg = <0>;
1209                                         atmel,fifo-size = <64>;
1210                                         atmel,nb-banks = <1>;
1211                                 };
1212
1213                                 ep@1 {
1214                                         reg = <1>;
1215                                         atmel,fifo-size = <1024>;
1216                                         atmel,nb-banks = <2>;
1217                                         atmel,can-dma;
1218                                         atmel,can-isoc;
1219                                 };
1220
1221                                 ep@2 {
1222                                         reg = <2>;
1223                                         atmel,fifo-size = <1024>;
1224                                         atmel,nb-banks = <2>;
1225                                         atmel,can-dma;
1226                                         atmel,can-isoc;
1227                                 };
1228
1229                                 ep@3 {
1230                                         reg = <3>;
1231                                         atmel,fifo-size = <1024>;
1232                                         atmel,nb-banks = <3>;
1233                                         atmel,can-dma;
1234                                 };
1235
1236                                 ep@4 {
1237                                         reg = <4>;
1238                                         atmel,fifo-size = <1024>;
1239                                         atmel,nb-banks = <3>;
1240                                         atmel,can-dma;
1241                                 };
1242
1243                                 ep@5 {
1244                                         reg = <5>;
1245                                         atmel,fifo-size = <1024>;
1246                                         atmel,nb-banks = <3>;
1247                                         atmel,can-dma;
1248                                         atmel,can-isoc;
1249                                 };
1250
1251                                 ep@6 {
1252                                         reg = <6>;
1253                                         atmel,fifo-size = <1024>;
1254                                         atmel,nb-banks = <3>;
1255                                         atmel,can-dma;
1256                                         atmel,can-isoc;
1257                                 };
1258                         };
1259
1260                         sckc@fffffd50 {
1261                                 compatible = "atmel,at91sam9x5-sckc";
1262                                 reg = <0xfffffd50 0x4>;
1263
1264                                 slow_osc: slow_osc {
1265                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
1266                                         #clock-cells = <0>;
1267                                         atmel,startup-time-usec = <1200000>;
1268                                         clocks = <&slow_xtal>;
1269                                 };
1270
1271                                 slow_rc_osc: slow_rc_osc {
1272                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1273                                         #clock-cells = <0>;
1274                                         atmel,startup-time-usec = <75>;
1275                                         clock-frequency = <32768>;
1276                                         clock-accuracy = <50000000>;
1277                                 };
1278
1279                                 clk32k: slck {
1280                                         compatible = "atmel,at91sam9x5-clk-slow";
1281                                         #clock-cells = <0>;
1282                                         clocks = <&slow_rc_osc &slow_osc>;
1283                                 };
1284                         };
1285
1286                         rtc@fffffd20 {
1287                                 compatible = "atmel,at91sam9260-rtt";
1288                                 reg = <0xfffffd20 0x10>;
1289                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1290                                 clocks = <&clk32k>;
1291                                 status = "disabled";
1292                         };
1293
1294                         rtc@fffffdb0 {
1295                                 compatible = "atmel,at91rm9200-rtc";
1296                                 reg = <0xfffffdb0 0x30>;
1297                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1298                                 clocks = <&clk32k>;
1299                                 status = "disabled";
1300                         };
1301
1302                         gpbr: syscon@fffffd60 {
1303                                 compatible = "atmel,at91sam9260-gpbr", "syscon";
1304                                 reg = <0xfffffd60 0x10>;
1305                                 status = "disabled";
1306                         };
1307                 };
1308
1309                 fb0: fb@500000 {
1310                         compatible = "atmel,at91sam9g45-lcdc";
1311                         reg = <0x00500000 0x1000>;
1312                         interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
1313                         pinctrl-names = "default";
1314                         pinctrl-0 = <&pinctrl_fb>;
1315                         clocks = <&lcd_clk>, <&lcd_clk>;
1316                         clock-names = "hclk", "lcdc_clk";
1317                         status = "disabled";
1318                 };
1319
1320                 usb0: ohci@700000 {
1321                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1322                         reg = <0x00700000 0x100000>;
1323                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1324                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1325                         clock-names = "ohci_clk", "hclk", "uhpck";
1326                         status = "disabled";
1327                 };
1328
1329                 usb1: ehci@800000 {
1330                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1331                         reg = <0x00800000 0x100000>;
1332                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1333                         clocks = <&utmi>, <&uhphs_clk>;
1334                         clock-names = "usb_clk", "ehci_clk";
1335                         status = "disabled";
1336                 };
1337
1338                 ebi: ebi@10000000 {
1339                         compatible = "atmel,at91sam9g45-ebi";
1340                         #address-cells = <2>;
1341                         #size-cells = <1>;
1342                         atmel,smc = <&smc>;
1343                         atmel,matrix = <&matrix>;
1344                         reg = <0x10000000 0x80000000>;
1345                         ranges = <0x0 0x0 0x10000000 0x10000000
1346                                   0x1 0x0 0x20000000 0x10000000
1347                                   0x2 0x0 0x30000000 0x10000000
1348                                   0x3 0x0 0x40000000 0x10000000
1349                                   0x4 0x0 0x50000000 0x10000000
1350                                   0x5 0x0 0x60000000 0x10000000>;
1351                         clocks = <&mck>;
1352                         status = "disabled";
1353
1354                         nand_controller: nand-controller {
1355                                 compatible = "atmel,at91sam9g45-nand-controller";
1356                                 #address-cells = <2>;
1357                                 #size-cells = <1>;
1358                                 ranges;
1359                                 status = "disabled";
1360                         };
1361                 };
1362         };
1363
1364         i2c-gpio-0 {
1365                 compatible = "i2c-gpio";
1366                 gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
1367                          &pioA 21 GPIO_ACTIVE_HIGH /* scl */
1368                         >;
1369                 i2c-gpio,sda-open-drain;
1370                 i2c-gpio,scl-open-drain;
1371                 i2c-gpio,delay-us = <5>;        /* ~100 kHz */
1372                 #address-cells = <1>;
1373                 #size-cells = <0>;
1374                 status = "disabled";
1375         };
1376 };