1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // Copyright 2019 IBM Corp.
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
10 compatible = "aspeed,ast2600";
13 interrupt-parent = <&gic>;
45 enable-method = "aspeed,ast2600-smp";
48 compatible = "arm,cortex-a7";
54 compatible = "arm,cortex-a7";
61 compatible = "arm,armv7-timer";
62 interrupt-parent = <&gic>;
63 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
64 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
65 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
66 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
67 clocks = <&syscon ASPEED_CLK_HPLL>;
68 arm,cpu-registers-not-fw-configured;
72 edac: sdram@1e6e0000 {
73 compatible = "aspeed,ast2600-sdram-edac", "syscon";
74 reg = <0x1e6e0000 0x174>;
75 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
79 compatible = "simple-bus";
85 gic: interrupt-controller@40461000 {
86 compatible = "arm,cortex-a7-gic";
87 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
88 #interrupt-cells = <3>;
90 interrupt-parent = <&gic>;
91 reg = <0x40461000 0x1000>,
98 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
101 compatible = "aspeed,ast2600-fmc";
102 clocks = <&syscon ASPEED_CLK_AHB>;
104 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
107 compatible = "jedec,spi-nor";
108 spi-max-frequency = <50000000>;
109 spi-rx-bus-width = <2>;
114 compatible = "jedec,spi-nor";
115 spi-max-frequency = <50000000>;
116 spi-rx-bus-width = <2>;
121 compatible = "jedec,spi-nor";
122 spi-max-frequency = <50000000>;
123 spi-rx-bus-width = <2>;
129 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>;
130 #address-cells = <1>;
132 compatible = "aspeed,ast2600-spi";
133 clocks = <&syscon ASPEED_CLK_AHB>;
137 compatible = "jedec,spi-nor";
138 spi-max-frequency = <50000000>;
139 spi-rx-bus-width = <2>;
144 compatible = "jedec,spi-nor";
145 spi-max-frequency = <50000000>;
146 spi-rx-bus-width = <2>;
152 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>;
153 #address-cells = <1>;
155 compatible = "aspeed,ast2600-spi";
156 clocks = <&syscon ASPEED_CLK_AHB>;
160 compatible = "jedec,spi-nor";
161 spi-max-frequency = <50000000>;
162 spi-rx-bus-width = <2>;
167 compatible = "jedec,spi-nor";
168 spi-max-frequency = <50000000>;
169 spi-rx-bus-width = <2>;
174 compatible = "jedec,spi-nor";
175 spi-max-frequency = <50000000>;
176 spi-rx-bus-width = <2>;
181 mdio0: mdio@1e650000 {
182 compatible = "aspeed,ast2600-mdio";
183 reg = <0x1e650000 0x8>;
184 #address-cells = <1>;
187 pinctrl-names = "default";
188 pinctrl-0 = <&pinctrl_mdio1_default>;
189 resets = <&syscon ASPEED_RESET_MII>;
192 mdio1: mdio@1e650008 {
193 compatible = "aspeed,ast2600-mdio";
194 reg = <0x1e650008 0x8>;
195 #address-cells = <1>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_mdio2_default>;
200 resets = <&syscon ASPEED_RESET_MII>;
203 mdio2: mdio@1e650010 {
204 compatible = "aspeed,ast2600-mdio";
205 reg = <0x1e650010 0x8>;
206 #address-cells = <1>;
209 pinctrl-names = "default";
210 pinctrl-0 = <&pinctrl_mdio3_default>;
211 resets = <&syscon ASPEED_RESET_MII>;
214 mdio3: mdio@1e650018 {
215 compatible = "aspeed,ast2600-mdio";
216 reg = <0x1e650018 0x8>;
217 #address-cells = <1>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_mdio4_default>;
222 resets = <&syscon ASPEED_RESET_MII>;
225 mac0: ftgmac@1e660000 {
226 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
227 reg = <0x1e660000 0x180>;
228 #address-cells = <1>;
230 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
231 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
235 mac1: ftgmac@1e680000 {
236 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
237 reg = <0x1e680000 0x180>;
238 #address-cells = <1>;
240 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
241 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
245 mac2: ftgmac@1e670000 {
246 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
247 reg = <0x1e670000 0x180>;
248 #address-cells = <1>;
250 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
251 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
255 mac3: ftgmac@1e690000 {
256 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
257 reg = <0x1e690000 0x180>;
258 #address-cells = <1>;
260 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
261 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
265 ehci0: usb@1e6a1000 {
266 compatible = "aspeed,ast2600-ehci", "generic-ehci";
267 reg = <0x1e6a1000 0x100>;
268 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
269 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
270 pinctrl-names = "default";
271 pinctrl-0 = <&pinctrl_usb2ah_default>;
275 ehci1: usb@1e6a3000 {
276 compatible = "aspeed,ast2600-ehci", "generic-ehci";
277 reg = <0x1e6a3000 0x100>;
278 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
279 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&pinctrl_usb2bh_default>;
286 compatible = "aspeed,ast2600-uhci", "generic-uhci";
287 reg = <0x1e6b0000 0x100>;
288 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
290 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
293 * No default pinmux, it will follow EHCI, use an
294 * explicit pinmux override if EHCI is not enabled.
298 vhub: usb-vhub@1e6a0000 {
299 compatible = "aspeed,ast2600-usb-vhub";
300 reg = <0x1e6a0000 0x350>;
301 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
302 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
303 aspeed,vhub-downstream-ports = <7>;
304 aspeed,vhub-generic-endpoints = <21>;
305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_usb2ad_default>;
311 compatible = "aspeed,ast2600-udc";
312 reg = <0x1e6a2000 0x300>;
313 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
314 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&pinctrl_usb2bd_default>;
321 compatible = "simple-bus";
322 #address-cells = <1>;
326 syscon: syscon@1e6e2000 {
327 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
328 reg = <0x1e6e2000 0x1000>;
329 ranges = <0 0x1e6e2000 0x1000>;
330 #address-cells = <1>;
336 compatible = "aspeed,ast2600-pinctrl";
340 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id";
341 reg = <0x14 0x4 0x5b0 0x8>;
345 compatible = "aspeed,ast2600-smpmem";
349 scu_ic0: interrupt-controller@560 {
350 #interrupt-cells = <1>;
351 compatible = "aspeed,ast2600-scu-ic0";
353 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
354 interrupt-controller;
357 scu_ic1: interrupt-controller@570 {
358 #interrupt-cells = <1>;
359 compatible = "aspeed,ast2600-scu-ic1";
361 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
362 interrupt-controller;
366 rng: hwrng@1e6e2524 {
367 compatible = "timeriomem_rng";
368 reg = <0x1e6e2524 0x4>;
373 gfx: display@1e6e6000 {
374 compatible = "aspeed,ast2600-gfx", "syscon";
375 reg = <0x1e6e6000 0x1000>;
377 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
378 resets = <&syscon ASPEED_RESET_GRAPHICS>;
381 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
384 xdma: xdma@1e6e7000 {
385 compatible = "aspeed,ast2600-xdma";
386 reg = <0x1e6e7000 0x100>;
387 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
388 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
389 reset-names = "device", "root-complex";
390 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
391 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
392 aspeed,pcie-device = "bmc";
393 aspeed,scu = <&syscon>;
398 compatible = "aspeed,ast2600-adc0";
399 reg = <0x1e6e9000 0x100>;
400 clocks = <&syscon ASPEED_CLK_APB2>;
401 resets = <&syscon ASPEED_RESET_ADC>;
402 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
403 #io-channel-cells = <1>;
408 compatible = "aspeed,ast2600-adc1";
409 reg = <0x1e6e9100 0x100>;
410 clocks = <&syscon ASPEED_CLK_APB2>;
411 resets = <&syscon ASPEED_RESET_ADC>;
412 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
413 #io-channel-cells = <1>;
417 sbc: secure-boot-controller@1e6f2000 {
418 compatible = "aspeed,ast2600-sbc";
419 reg = <0x1e6f2000 0x1000>;
422 video: video@1e700000 {
423 compatible = "aspeed,ast2600-video-engine";
424 reg = <0x1e700000 0x1000>;
425 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
426 <&syscon ASPEED_CLK_GATE_ECLK>;
427 clock-names = "vclk", "eclk";
428 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
432 gpio0: gpio@1e780000 {
435 compatible = "aspeed,ast2600-gpio";
436 reg = <0x1e780000 0x400>;
437 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
438 gpio-ranges = <&pinctrl 0 0 208>;
440 clocks = <&syscon ASPEED_CLK_APB2>;
441 interrupt-controller;
442 #interrupt-cells = <2>;
445 sgpiom0: sgpiom@1e780500 {
448 compatible = "aspeed,ast2600-sgpiom";
449 reg = <0x1e780500 0x100>;
450 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
451 clocks = <&syscon ASPEED_CLK_APB2>;
452 interrupt-controller;
453 bus-frequency = <12000000>;
454 pinctrl-names = "default";
455 pinctrl-0 = <&pinctrl_sgpm1_default>;
459 sgpiom1: sgpiom@1e780600 {
462 compatible = "aspeed,ast2600-sgpiom";
463 reg = <0x1e780600 0x100>;
464 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
465 clocks = <&syscon ASPEED_CLK_APB2>;
466 interrupt-controller;
467 bus-frequency = <12000000>;
468 pinctrl-names = "default";
469 pinctrl-0 = <&pinctrl_sgpm2_default>;
473 gpio1: gpio@1e780800 {
476 compatible = "aspeed,ast2600-gpio";
477 reg = <0x1e780800 0x800>;
478 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
479 gpio-ranges = <&pinctrl 0 208 36>;
481 clocks = <&syscon ASPEED_CLK_APB1>;
482 interrupt-controller;
483 #interrupt-cells = <2>;
487 compatible = "aspeed,ast2600-rtc";
488 reg = <0x1e781000 0x18>;
489 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
493 timer: timer@1e782000 {
494 compatible = "aspeed,ast2600-timer";
495 reg = <0x1e782000 0x90>;
496 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
497 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
498 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
499 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
500 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
501 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
502 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
503 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
504 clocks = <&syscon ASPEED_CLK_APB1>;
505 clock-names = "PCLK";
509 uart1: serial@1e783000 {
510 compatible = "ns16550a";
511 reg = <0x1e783000 0x20>;
514 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
515 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
516 resets = <&lpc_reset 4>;
518 pinctrl-names = "default";
519 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
523 uart5: serial@1e784000 {
524 compatible = "ns16550a";
525 reg = <0x1e784000 0x1000>;
527 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
528 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
532 wdt1: watchdog@1e785000 {
533 compatible = "aspeed,ast2600-wdt";
534 reg = <0x1e785000 0x40>;
537 wdt2: watchdog@1e785040 {
538 compatible = "aspeed,ast2600-wdt";
539 reg = <0x1e785040 0x40>;
543 wdt3: watchdog@1e785080 {
544 compatible = "aspeed,ast2600-wdt";
545 reg = <0x1e785080 0x40>;
549 wdt4: watchdog@1e7850c0 {
550 compatible = "aspeed,ast2600-wdt";
551 reg = <0x1e7850C0 0x40>;
555 peci0: peci-controller@1e78b000 {
556 compatible = "aspeed,ast2600-peci";
557 reg = <0x1e78b000 0x100>;
558 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
559 clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>;
560 resets = <&syscon ASPEED_RESET_PECI>;
561 cmd-timeout-ms = <1000>;
562 clock-frequency = <1000000>;
567 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon";
568 reg = <0x1e789000 0x1000>;
571 #address-cells = <1>;
573 ranges = <0x0 0x1e789000 0x1000>;
576 compatible = "aspeed,ast2500-kcs-bmc-v2";
577 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
578 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
579 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
585 compatible = "aspeed,ast2500-kcs-bmc-v2";
586 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
587 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
588 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
593 compatible = "aspeed,ast2500-kcs-bmc-v2";
594 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
595 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
596 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
601 compatible = "aspeed,ast2500-kcs-bmc-v2";
602 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>;
603 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
604 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
608 lpc_ctrl: lpc-ctrl@80 {
609 compatible = "aspeed,ast2600-lpc-ctrl";
611 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
615 lpc_snoop: lpc-snoop@80 {
616 compatible = "aspeed,ast2600-lpc-snoop";
618 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
624 compatible = "aspeed,ast2600-lhc";
625 reg = <0xa0 0x24 0xc8 0x8>;
628 lpc_reset: reset-controller@98 {
629 compatible = "aspeed,ast2600-lpc-reset";
634 uart_routing: uart-routing@98 {
635 compatible = "aspeed,ast2600-uart-routing";
641 compatible = "aspeed,ast2600-ibt-bmc";
643 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
644 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
650 compatible = "aspeed,ast2600-sd-controller";
651 reg = <0x1e740000 0x100>;
652 #address-cells = <1>;
654 ranges = <0 0x1e740000 0x10000>;
655 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
658 sdhci0: sdhci@1e740100 {
659 compatible = "aspeed,ast2600-sdhci", "sdhci";
661 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
663 clocks = <&syscon ASPEED_CLK_SDIO>;
667 sdhci1: sdhci@1e740200 {
668 compatible = "aspeed,ast2600-sdhci", "sdhci";
670 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
672 clocks = <&syscon ASPEED_CLK_SDIO>;
677 emmc_controller: sdc@1e750000 {
678 compatible = "aspeed,ast2600-sd-controller";
679 reg = <0x1e750000 0x100>;
680 #address-cells = <1>;
682 ranges = <0 0x1e750000 0x10000>;
683 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
686 emmc: sdhci@1e750100 {
687 compatible = "aspeed,ast2600-sdhci";
690 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
691 clocks = <&syscon ASPEED_CLK_EMMC>;
692 pinctrl-names = "default";
693 pinctrl-0 = <&pinctrl_emmc_default>;
697 vuart1: serial@1e787000 {
698 compatible = "aspeed,ast2500-vuart";
699 reg = <0x1e787000 0x40>;
701 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
702 clocks = <&syscon ASPEED_CLK_APB1>;
707 vuart2: serial@1e788000 {
708 compatible = "aspeed,ast2500-vuart";
709 reg = <0x1e788000 0x40>;
711 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
712 clocks = <&syscon ASPEED_CLK_APB1>;
717 uart2: serial@1e78d000 {
718 compatible = "ns16550a";
719 reg = <0x1e78d000 0x20>;
722 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
723 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
724 resets = <&lpc_reset 5>;
726 pinctrl-names = "default";
727 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
731 uart3: serial@1e78e000 {
732 compatible = "ns16550a";
733 reg = <0x1e78e000 0x20>;
736 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
737 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
738 resets = <&lpc_reset 6>;
740 pinctrl-names = "default";
741 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
745 uart4: serial@1e78f000 {
746 compatible = "ns16550a";
747 reg = <0x1e78f000 0x20>;
750 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
751 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
752 resets = <&lpc_reset 7>;
754 pinctrl-names = "default";
755 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
760 compatible = "simple-bus";
761 #address-cells = <1>;
763 ranges = <0 0x1e78a000 0x1000>;
766 fsim0: fsi@1e79b000 {
767 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
768 reg = <0x1e79b000 0x94>;
769 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
770 pinctrl-names = "default";
771 pinctrl-0 = <&pinctrl_fsi1_default>;
772 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
776 fsim1: fsi@1e79b100 {
777 compatible = "aspeed,ast2600-fsi-master", "fsi-master";
778 reg = <0x1e79b100 0x94>;
779 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
780 pinctrl-names = "default";
781 pinctrl-0 = <&pinctrl_fsi2_default>;
782 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
789 #include "aspeed-g6-pinctrl.dtsi"
793 #address-cells = <1>;
795 #interrupt-cells = <1>;
797 compatible = "aspeed,ast2600-i2c-bus";
798 clocks = <&syscon ASPEED_CLK_APB2>;
799 resets = <&syscon ASPEED_RESET_I2C>;
800 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
801 bus-frequency = <100000>;
802 pinctrl-names = "default";
803 pinctrl-0 = <&pinctrl_i2c1_default>;
808 #address-cells = <1>;
810 #interrupt-cells = <1>;
812 compatible = "aspeed,ast2600-i2c-bus";
813 clocks = <&syscon ASPEED_CLK_APB2>;
814 resets = <&syscon ASPEED_RESET_I2C>;
815 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
816 bus-frequency = <100000>;
817 pinctrl-names = "default";
818 pinctrl-0 = <&pinctrl_i2c2_default>;
823 #address-cells = <1>;
825 #interrupt-cells = <1>;
827 compatible = "aspeed,ast2600-i2c-bus";
828 clocks = <&syscon ASPEED_CLK_APB2>;
829 resets = <&syscon ASPEED_RESET_I2C>;
830 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
831 bus-frequency = <100000>;
832 pinctrl-names = "default";
833 pinctrl-0 = <&pinctrl_i2c3_default>;
838 #address-cells = <1>;
840 #interrupt-cells = <1>;
842 compatible = "aspeed,ast2600-i2c-bus";
843 clocks = <&syscon ASPEED_CLK_APB2>;
844 resets = <&syscon ASPEED_RESET_I2C>;
845 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
846 bus-frequency = <100000>;
847 pinctrl-names = "default";
848 pinctrl-0 = <&pinctrl_i2c4_default>;
853 #address-cells = <1>;
855 #interrupt-cells = <1>;
857 compatible = "aspeed,ast2600-i2c-bus";
858 clocks = <&syscon ASPEED_CLK_APB2>;
859 resets = <&syscon ASPEED_RESET_I2C>;
860 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
861 bus-frequency = <100000>;
862 pinctrl-names = "default";
863 pinctrl-0 = <&pinctrl_i2c5_default>;
868 #address-cells = <1>;
870 #interrupt-cells = <1>;
872 compatible = "aspeed,ast2600-i2c-bus";
873 clocks = <&syscon ASPEED_CLK_APB2>;
874 resets = <&syscon ASPEED_RESET_I2C>;
875 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
876 bus-frequency = <100000>;
877 pinctrl-names = "default";
878 pinctrl-0 = <&pinctrl_i2c6_default>;
883 #address-cells = <1>;
885 #interrupt-cells = <1>;
887 compatible = "aspeed,ast2600-i2c-bus";
888 clocks = <&syscon ASPEED_CLK_APB2>;
889 resets = <&syscon ASPEED_RESET_I2C>;
890 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
891 bus-frequency = <100000>;
892 pinctrl-names = "default";
893 pinctrl-0 = <&pinctrl_i2c7_default>;
898 #address-cells = <1>;
900 #interrupt-cells = <1>;
902 compatible = "aspeed,ast2600-i2c-bus";
903 clocks = <&syscon ASPEED_CLK_APB2>;
904 resets = <&syscon ASPEED_RESET_I2C>;
905 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
906 bus-frequency = <100000>;
907 pinctrl-names = "default";
908 pinctrl-0 = <&pinctrl_i2c8_default>;
913 #address-cells = <1>;
915 #interrupt-cells = <1>;
917 compatible = "aspeed,ast2600-i2c-bus";
918 clocks = <&syscon ASPEED_CLK_APB2>;
919 resets = <&syscon ASPEED_RESET_I2C>;
920 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
921 bus-frequency = <100000>;
922 pinctrl-names = "default";
923 pinctrl-0 = <&pinctrl_i2c9_default>;
928 #address-cells = <1>;
930 #interrupt-cells = <1>;
932 compatible = "aspeed,ast2600-i2c-bus";
933 clocks = <&syscon ASPEED_CLK_APB2>;
934 resets = <&syscon ASPEED_RESET_I2C>;
935 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
936 bus-frequency = <100000>;
937 pinctrl-names = "default";
938 pinctrl-0 = <&pinctrl_i2c10_default>;
943 #address-cells = <1>;
945 #interrupt-cells = <1>;
947 compatible = "aspeed,ast2600-i2c-bus";
948 clocks = <&syscon ASPEED_CLK_APB2>;
949 resets = <&syscon ASPEED_RESET_I2C>;
950 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
951 bus-frequency = <100000>;
952 pinctrl-names = "default";
953 pinctrl-0 = <&pinctrl_i2c11_default>;
958 #address-cells = <1>;
960 #interrupt-cells = <1>;
962 compatible = "aspeed,ast2600-i2c-bus";
963 clocks = <&syscon ASPEED_CLK_APB2>;
964 resets = <&syscon ASPEED_RESET_I2C>;
965 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
966 bus-frequency = <100000>;
967 pinctrl-names = "default";
968 pinctrl-0 = <&pinctrl_i2c12_default>;
973 #address-cells = <1>;
975 #interrupt-cells = <1>;
977 compatible = "aspeed,ast2600-i2c-bus";
978 clocks = <&syscon ASPEED_CLK_APB2>;
979 resets = <&syscon ASPEED_RESET_I2C>;
980 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
981 bus-frequency = <100000>;
982 pinctrl-names = "default";
983 pinctrl-0 = <&pinctrl_i2c13_default>;
988 #address-cells = <1>;
990 #interrupt-cells = <1>;
992 compatible = "aspeed,ast2600-i2c-bus";
993 clocks = <&syscon ASPEED_CLK_APB2>;
994 resets = <&syscon ASPEED_RESET_I2C>;
995 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
996 bus-frequency = <100000>;
997 pinctrl-names = "default";
998 pinctrl-0 = <&pinctrl_i2c14_default>;
1002 i2c14: i2c-bus@780 {
1003 #address-cells = <1>;
1005 #interrupt-cells = <1>;
1007 compatible = "aspeed,ast2600-i2c-bus";
1008 clocks = <&syscon ASPEED_CLK_APB2>;
1009 resets = <&syscon ASPEED_RESET_I2C>;
1010 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
1011 bus-frequency = <100000>;
1012 pinctrl-names = "default";
1013 pinctrl-0 = <&pinctrl_i2c15_default>;
1014 status = "disabled";
1017 i2c15: i2c-bus@800 {
1018 #address-cells = <1>;
1020 #interrupt-cells = <1>;
1022 compatible = "aspeed,ast2600-i2c-bus";
1023 clocks = <&syscon ASPEED_CLK_APB2>;
1024 resets = <&syscon ASPEED_RESET_I2C>;
1025 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1026 bus-frequency = <100000>;
1027 pinctrl-names = "default";
1028 pinctrl-0 = <&pinctrl_i2c16_default>;
1029 status = "disabled";