1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2500";
9 interrupt-parent = <&vic>;
39 compatible = "arm,arm1176jzf-s";
46 device_type = "memory";
50 edac: sdram@1e6e0000 {
51 compatible = "aspeed,ast2500-sdram-edac";
52 reg = <0x1e6e0000 0x174>;
58 compatible = "simple-bus";
64 reg = < 0x1e620000 0xc4
65 0x20000000 0x10000000 >;
68 compatible = "aspeed,ast2500-fmc";
69 clocks = <&syscon ASPEED_CLK_AHB>;
74 compatible = "jedec,spi-nor";
79 compatible = "jedec,spi-nor";
84 compatible = "jedec,spi-nor";
90 reg = < 0x1e630000 0xc4
91 0x30000000 0x08000000 >;
94 compatible = "aspeed,ast2500-spi";
95 clocks = <&syscon ASPEED_CLK_AHB>;
99 compatible = "jedec,spi-nor";
104 compatible = "jedec,spi-nor";
110 reg = < 0x1e631000 0xc4
111 0x38000000 0x08000000 >;
112 #address-cells = <1>;
114 compatible = "aspeed,ast2500-spi";
115 clocks = <&syscon ASPEED_CLK_AHB>;
119 compatible = "jedec,spi-nor";
124 compatible = "jedec,spi-nor";
129 vic: interrupt-controller@1e6c0080 {
130 compatible = "aspeed,ast2400-vic";
131 interrupt-controller;
132 #interrupt-cells = <1>;
133 valid-sources = <0xfefff7ff 0x0807ffff>;
134 reg = <0x1e6c0080 0x80>;
137 cvic: copro-interrupt-controller@1e6c2000 {
138 compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
139 valid-sources = <0xffffffff>;
140 copro-sw-interrupts = <1>;
141 reg = <0x1e6c2000 0x80>;
144 mac0: ethernet@1e660000 {
145 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
146 reg = <0x1e660000 0x180>;
148 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
152 mac1: ethernet@1e680000 {
153 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
154 reg = <0x1e680000 0x180>;
156 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
160 ehci0: usb@1e6a1000 {
161 compatible = "aspeed,ast2500-ehci", "generic-ehci";
162 reg = <0x1e6a1000 0x100>;
164 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_usb2ah_default>;
170 ehci1: usb@1e6a3000 {
171 compatible = "aspeed,ast2500-ehci", "generic-ehci";
172 reg = <0x1e6a3000 0x100>;
174 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&pinctrl_usb2bh_default>;
181 compatible = "aspeed,ast2500-uhci", "generic-uhci";
182 reg = <0x1e6b0000 0x100>;
185 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
188 * No default pinmux, it will follow EHCI, use an explicit pinmux
189 * override if you don't enable EHCI
193 vhub: usb-vhub@1e6a0000 {
194 compatible = "aspeed,ast2500-usb-vhub";
195 reg = <0x1e6a0000 0x300>;
197 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_usb2ad_default>;
204 compatible = "simple-bus";
205 #address-cells = <1>;
209 syscon: syscon@1e6e2000 {
210 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
211 reg = <0x1e6e2000 0x1a8>;
212 #address-cells = <1>;
218 compatible = "aspeed,g5-pinctrl";
219 aspeed,external-nodes = <&gfx &lhc>;
224 compatible = "aspeed,ast2500-p2a-ctrl";
229 rng: hwrng@1e6e2078 {
230 compatible = "timeriomem_rng";
231 reg = <0x1e6e2078 0x4>;
236 gfx: display@1e6e6000 {
237 compatible = "aspeed,ast2500-gfx", "syscon";
238 reg = <0x1e6e6000 0x1000>;
240 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
241 resets = <&syscon ASPEED_RESET_CRT1>;
247 compatible = "aspeed,ast2500-adc";
248 reg = <0x1e6e9000 0xb0>;
249 clocks = <&syscon ASPEED_CLK_APB>;
250 resets = <&syscon ASPEED_RESET_ADC>;
251 #io-channel-cells = <1>;
255 video: video@1e700000 {
256 compatible = "aspeed,ast2500-video-engine";
257 reg = <0x1e700000 0x1000>;
258 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
259 <&syscon ASPEED_CLK_GATE_ECLK>;
260 clock-names = "vclk", "eclk";
265 sram: sram@1e720000 {
266 compatible = "mmio-sram";
267 reg = <0x1e720000 0x9000>; // 36K
270 sdmmc: sd-controller@1e740000 {
271 compatible = "aspeed,ast2500-sd-controller";
272 reg = <0x1e740000 0x100>;
273 #address-cells = <1>;
275 ranges = <0 0x1e740000 0x10000>;
276 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
280 compatible = "aspeed,ast2500-sdhci";
284 clocks = <&syscon ASPEED_CLK_SDIO>;
289 compatible = "aspeed,ast2500-sdhci";
293 clocks = <&syscon ASPEED_CLK_SDIO>;
298 gpio: gpio@1e780000 {
301 compatible = "aspeed,ast2500-gpio";
302 reg = <0x1e780000 0x1000>;
304 gpio-ranges = <&pinctrl 0 0 232>;
305 clocks = <&syscon ASPEED_CLK_APB>;
306 interrupt-controller;
307 #interrupt-cells = <2>;
311 compatible = "aspeed,ast2500-rtc";
312 reg = <0x1e781000 0x18>;
316 timer: timer@1e782000 {
317 /* This timer is a Faraday FTTMR010 derivative */
318 compatible = "aspeed,ast2400-timer";
319 reg = <0x1e782000 0x90>;
320 interrupts = <16 17 18 35 36 37 38 39>;
321 clocks = <&syscon ASPEED_CLK_APB>;
322 clock-names = "PCLK";
325 uart1: serial@1e783000 {
326 compatible = "ns16550a";
327 reg = <0x1e783000 0x20>;
330 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
331 resets = <&lpc_reset 4>;
336 uart5: serial@1e784000 {
337 compatible = "ns16550a";
338 reg = <0x1e784000 0x20>;
341 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
346 wdt1: watchdog@1e785000 {
347 compatible = "aspeed,ast2500-wdt";
348 reg = <0x1e785000 0x20>;
349 clocks = <&syscon ASPEED_CLK_APB>;
352 wdt2: watchdog@1e785020 {
353 compatible = "aspeed,ast2500-wdt";
354 reg = <0x1e785020 0x20>;
355 clocks = <&syscon ASPEED_CLK_APB>;
358 wdt3: watchdog@1e785040 {
359 compatible = "aspeed,ast2500-wdt";
360 reg = <0x1e785040 0x20>;
361 clocks = <&syscon ASPEED_CLK_APB>;
365 pwm_tacho: pwm-tacho-controller@1e786000 {
366 compatible = "aspeed,ast2500-pwm-tacho";
367 #address-cells = <1>;
369 reg = <0x1e786000 0x1000>;
370 clocks = <&syscon ASPEED_CLK_24M>;
371 resets = <&syscon ASPEED_RESET_PWM>;
375 vuart: serial@1e787000 {
376 compatible = "aspeed,ast2500-vuart";
377 reg = <0x1e787000 0x40>;
380 clocks = <&syscon ASPEED_CLK_APB>;
386 compatible = "aspeed,ast2500-lpc", "simple-mfd";
387 reg = <0x1e789000 0x1000>;
389 #address-cells = <1>;
391 ranges = <0x0 0x1e789000 0x1000>;
394 compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
398 #address-cells = <1>;
400 ranges = <0x0 0x0 0x80>;
403 compatible = "aspeed,ast2500-kcs-bmc";
409 compatible = "aspeed,ast2500-kcs-bmc";
415 compatible = "aspeed,ast2500-kcs-bmc";
422 lpc_host: lpc-host@80 {
423 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
427 #address-cells = <1>;
429 ranges = <0x0 0x80 0x1e0>;
432 compatible = "aspeed,ast2500-kcs-bmc";
438 lpc_ctrl: lpc-ctrl@0 {
439 compatible = "aspeed,ast2500-lpc-ctrl";
441 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
445 lpc_snoop: lpc-snoop@0 {
446 compatible = "aspeed,ast2500-lpc-snoop";
453 compatible = "aspeed,ast2500-lhc";
454 reg = <0x20 0x24 0x48 0x8>;
457 lpc_reset: reset-controller@18 {
458 compatible = "aspeed,ast2500-lpc-reset";
464 compatible = "aspeed,ast2500-ibt-bmc";
467 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
473 uart2: serial@1e78d000 {
474 compatible = "ns16550a";
475 reg = <0x1e78d000 0x20>;
478 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
479 resets = <&lpc_reset 5>;
484 uart3: serial@1e78e000 {
485 compatible = "ns16550a";
486 reg = <0x1e78e000 0x20>;
489 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
490 resets = <&lpc_reset 6>;
495 uart4: serial@1e78f000 {
496 compatible = "ns16550a";
497 reg = <0x1e78f000 0x20>;
500 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
501 resets = <&lpc_reset 7>;
507 compatible = "simple-bus";
508 #address-cells = <1>;
510 ranges = <0 0x1e78a000 0x1000>;
517 i2c_ic: interrupt-controller@0 {
518 #interrupt-cells = <1>;
519 compatible = "aspeed,ast2500-i2c-ic";
522 interrupt-controller;
526 #address-cells = <1>;
528 #interrupt-cells = <1>;
531 compatible = "aspeed,ast2500-i2c-bus";
532 clocks = <&syscon ASPEED_CLK_APB>;
533 resets = <&syscon ASPEED_RESET_I2C>;
534 bus-frequency = <100000>;
536 interrupt-parent = <&i2c_ic>;
538 /* Does not need pinctrl properties */
542 #address-cells = <1>;
544 #interrupt-cells = <1>;
547 compatible = "aspeed,ast2500-i2c-bus";
548 clocks = <&syscon ASPEED_CLK_APB>;
549 resets = <&syscon ASPEED_RESET_I2C>;
550 bus-frequency = <100000>;
552 interrupt-parent = <&i2c_ic>;
554 /* Does not need pinctrl properties */
558 #address-cells = <1>;
560 #interrupt-cells = <1>;
563 compatible = "aspeed,ast2500-i2c-bus";
564 clocks = <&syscon ASPEED_CLK_APB>;
565 resets = <&syscon ASPEED_RESET_I2C>;
566 bus-frequency = <100000>;
568 interrupt-parent = <&i2c_ic>;
569 pinctrl-names = "default";
570 pinctrl-0 = <&pinctrl_i2c3_default>;
575 #address-cells = <1>;
577 #interrupt-cells = <1>;
580 compatible = "aspeed,ast2500-i2c-bus";
581 clocks = <&syscon ASPEED_CLK_APB>;
582 resets = <&syscon ASPEED_RESET_I2C>;
583 bus-frequency = <100000>;
585 interrupt-parent = <&i2c_ic>;
586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_i2c4_default>;
592 #address-cells = <1>;
594 #interrupt-cells = <1>;
597 compatible = "aspeed,ast2500-i2c-bus";
598 clocks = <&syscon ASPEED_CLK_APB>;
599 resets = <&syscon ASPEED_RESET_I2C>;
600 bus-frequency = <100000>;
602 interrupt-parent = <&i2c_ic>;
603 pinctrl-names = "default";
604 pinctrl-0 = <&pinctrl_i2c5_default>;
609 #address-cells = <1>;
611 #interrupt-cells = <1>;
614 compatible = "aspeed,ast2500-i2c-bus";
615 clocks = <&syscon ASPEED_CLK_APB>;
616 resets = <&syscon ASPEED_RESET_I2C>;
617 bus-frequency = <100000>;
619 interrupt-parent = <&i2c_ic>;
620 pinctrl-names = "default";
621 pinctrl-0 = <&pinctrl_i2c6_default>;
626 #address-cells = <1>;
628 #interrupt-cells = <1>;
631 compatible = "aspeed,ast2500-i2c-bus";
632 clocks = <&syscon ASPEED_CLK_APB>;
633 resets = <&syscon ASPEED_RESET_I2C>;
634 bus-frequency = <100000>;
636 interrupt-parent = <&i2c_ic>;
637 pinctrl-names = "default";
638 pinctrl-0 = <&pinctrl_i2c7_default>;
643 #address-cells = <1>;
645 #interrupt-cells = <1>;
648 compatible = "aspeed,ast2500-i2c-bus";
649 clocks = <&syscon ASPEED_CLK_APB>;
650 resets = <&syscon ASPEED_RESET_I2C>;
651 bus-frequency = <100000>;
653 interrupt-parent = <&i2c_ic>;
654 pinctrl-names = "default";
655 pinctrl-0 = <&pinctrl_i2c8_default>;
660 #address-cells = <1>;
662 #interrupt-cells = <1>;
665 compatible = "aspeed,ast2500-i2c-bus";
666 clocks = <&syscon ASPEED_CLK_APB>;
667 resets = <&syscon ASPEED_RESET_I2C>;
668 bus-frequency = <100000>;
670 interrupt-parent = <&i2c_ic>;
671 pinctrl-names = "default";
672 pinctrl-0 = <&pinctrl_i2c9_default>;
677 #address-cells = <1>;
679 #interrupt-cells = <1>;
682 compatible = "aspeed,ast2500-i2c-bus";
683 clocks = <&syscon ASPEED_CLK_APB>;
684 resets = <&syscon ASPEED_RESET_I2C>;
685 bus-frequency = <100000>;
687 interrupt-parent = <&i2c_ic>;
688 pinctrl-names = "default";
689 pinctrl-0 = <&pinctrl_i2c10_default>;
694 #address-cells = <1>;
696 #interrupt-cells = <1>;
699 compatible = "aspeed,ast2500-i2c-bus";
700 clocks = <&syscon ASPEED_CLK_APB>;
701 resets = <&syscon ASPEED_RESET_I2C>;
702 bus-frequency = <100000>;
704 interrupt-parent = <&i2c_ic>;
705 pinctrl-names = "default";
706 pinctrl-0 = <&pinctrl_i2c11_default>;
711 #address-cells = <1>;
713 #interrupt-cells = <1>;
716 compatible = "aspeed,ast2500-i2c-bus";
717 clocks = <&syscon ASPEED_CLK_APB>;
718 resets = <&syscon ASPEED_RESET_I2C>;
719 bus-frequency = <100000>;
721 interrupt-parent = <&i2c_ic>;
722 pinctrl-names = "default";
723 pinctrl-0 = <&pinctrl_i2c12_default>;
728 #address-cells = <1>;
730 #interrupt-cells = <1>;
733 compatible = "aspeed,ast2500-i2c-bus";
734 clocks = <&syscon ASPEED_CLK_APB>;
735 resets = <&syscon ASPEED_RESET_I2C>;
736 bus-frequency = <100000>;
738 interrupt-parent = <&i2c_ic>;
739 pinctrl-names = "default";
740 pinctrl-0 = <&pinctrl_i2c13_default>;
745 #address-cells = <1>;
747 #interrupt-cells = <1>;
750 compatible = "aspeed,ast2500-i2c-bus";
751 clocks = <&syscon ASPEED_CLK_APB>;
752 resets = <&syscon ASPEED_RESET_I2C>;
753 bus-frequency = <100000>;
755 interrupt-parent = <&i2c_ic>;
756 pinctrl-names = "default";
757 pinctrl-0 = <&pinctrl_i2c14_default>;
763 pinctrl_acpi_default: acpi_default {
768 pinctrl_adc0_default: adc0_default {
773 pinctrl_adc1_default: adc1_default {
778 pinctrl_adc10_default: adc10_default {
783 pinctrl_adc11_default: adc11_default {
788 pinctrl_adc12_default: adc12_default {
793 pinctrl_adc13_default: adc13_default {
798 pinctrl_adc14_default: adc14_default {
803 pinctrl_adc15_default: adc15_default {
808 pinctrl_adc2_default: adc2_default {
813 pinctrl_adc3_default: adc3_default {
818 pinctrl_adc4_default: adc4_default {
823 pinctrl_adc5_default: adc5_default {
828 pinctrl_adc6_default: adc6_default {
833 pinctrl_adc7_default: adc7_default {
838 pinctrl_adc8_default: adc8_default {
843 pinctrl_adc9_default: adc9_default {
848 pinctrl_bmcint_default: bmcint_default {
853 pinctrl_ddcclk_default: ddcclk_default {
858 pinctrl_ddcdat_default: ddcdat_default {
863 pinctrl_espi_default: espi_default {
868 pinctrl_fwspics1_default: fwspics1_default {
869 function = "FWSPICS1";
873 pinctrl_fwspics2_default: fwspics2_default {
874 function = "FWSPICS2";
878 pinctrl_gpid0_default: gpid0_default {
883 pinctrl_gpid2_default: gpid2_default {
888 pinctrl_gpid4_default: gpid4_default {
893 pinctrl_gpid6_default: gpid6_default {
898 pinctrl_gpie0_default: gpie0_default {
903 pinctrl_gpie2_default: gpie2_default {
908 pinctrl_gpie4_default: gpie4_default {
913 pinctrl_gpie6_default: gpie6_default {
918 pinctrl_i2c10_default: i2c10_default {
923 pinctrl_i2c11_default: i2c11_default {
928 pinctrl_i2c12_default: i2c12_default {
933 pinctrl_i2c13_default: i2c13_default {
938 pinctrl_i2c14_default: i2c14_default {
943 pinctrl_i2c3_default: i2c3_default {
948 pinctrl_i2c4_default: i2c4_default {
953 pinctrl_i2c5_default: i2c5_default {
958 pinctrl_i2c6_default: i2c6_default {
963 pinctrl_i2c7_default: i2c7_default {
968 pinctrl_i2c8_default: i2c8_default {
973 pinctrl_i2c9_default: i2c9_default {
978 pinctrl_lad0_default: lad0_default {
983 pinctrl_lad1_default: lad1_default {
988 pinctrl_lad2_default: lad2_default {
993 pinctrl_lad3_default: lad3_default {
998 pinctrl_lclk_default: lclk_default {
1003 pinctrl_lframe_default: lframe_default {
1004 function = "LFRAME";
1008 pinctrl_lpchc_default: lpchc_default {
1013 pinctrl_lpcpd_default: lpcpd_default {
1018 pinctrl_lpcplus_default: lpcplus_default {
1019 function = "LPCPLUS";
1023 pinctrl_lpcpme_default: lpcpme_default {
1024 function = "LPCPME";
1028 pinctrl_lpcrst_default: lpcrst_default {
1029 function = "LPCRST";
1033 pinctrl_lpcsmi_default: lpcsmi_default {
1034 function = "LPCSMI";
1038 pinctrl_lsirq_default: lsirq_default {
1043 pinctrl_mac1link_default: mac1link_default {
1044 function = "MAC1LINK";
1045 groups = "MAC1LINK";
1048 pinctrl_mac2link_default: mac2link_default {
1049 function = "MAC2LINK";
1050 groups = "MAC2LINK";
1053 pinctrl_mdio1_default: mdio1_default {
1058 pinctrl_mdio2_default: mdio2_default {
1063 pinctrl_ncts1_default: ncts1_default {
1068 pinctrl_ncts2_default: ncts2_default {
1073 pinctrl_ncts3_default: ncts3_default {
1078 pinctrl_ncts4_default: ncts4_default {
1083 pinctrl_ndcd1_default: ndcd1_default {
1088 pinctrl_ndcd2_default: ndcd2_default {
1093 pinctrl_ndcd3_default: ndcd3_default {
1098 pinctrl_ndcd4_default: ndcd4_default {
1103 pinctrl_ndsr1_default: ndsr1_default {
1108 pinctrl_ndsr2_default: ndsr2_default {
1113 pinctrl_ndsr3_default: ndsr3_default {
1118 pinctrl_ndsr4_default: ndsr4_default {
1123 pinctrl_ndtr1_default: ndtr1_default {
1128 pinctrl_ndtr2_default: ndtr2_default {
1133 pinctrl_ndtr3_default: ndtr3_default {
1138 pinctrl_ndtr4_default: ndtr4_default {
1143 pinctrl_nri1_default: nri1_default {
1148 pinctrl_nri2_default: nri2_default {
1153 pinctrl_nri3_default: nri3_default {
1158 pinctrl_nri4_default: nri4_default {
1163 pinctrl_nrts1_default: nrts1_default {
1168 pinctrl_nrts2_default: nrts2_default {
1173 pinctrl_nrts3_default: nrts3_default {
1178 pinctrl_nrts4_default: nrts4_default {
1183 pinctrl_oscclk_default: oscclk_default {
1184 function = "OSCCLK";
1188 pinctrl_pewake_default: pewake_default {
1189 function = "PEWAKE";
1193 pinctrl_pnor_default: pnor_default {
1198 pinctrl_pwm0_default: pwm0_default {
1203 pinctrl_pwm1_default: pwm1_default {
1208 pinctrl_pwm2_default: pwm2_default {
1213 pinctrl_pwm3_default: pwm3_default {
1218 pinctrl_pwm4_default: pwm4_default {
1223 pinctrl_pwm5_default: pwm5_default {
1228 pinctrl_pwm6_default: pwm6_default {
1233 pinctrl_pwm7_default: pwm7_default {
1238 pinctrl_rgmii1_default: rgmii1_default {
1239 function = "RGMII1";
1243 pinctrl_rgmii2_default: rgmii2_default {
1244 function = "RGMII2";
1248 pinctrl_rmii1_default: rmii1_default {
1253 pinctrl_rmii2_default: rmii2_default {
1258 pinctrl_rxd1_default: rxd1_default {
1263 pinctrl_rxd2_default: rxd2_default {
1268 pinctrl_rxd3_default: rxd3_default {
1273 pinctrl_rxd4_default: rxd4_default {
1278 pinctrl_salt1_default: salt1_default {
1283 pinctrl_salt10_default: salt10_default {
1284 function = "SALT10";
1288 pinctrl_salt11_default: salt11_default {
1289 function = "SALT11";
1293 pinctrl_salt12_default: salt12_default {
1294 function = "SALT12";
1298 pinctrl_salt13_default: salt13_default {
1299 function = "SALT13";
1303 pinctrl_salt14_default: salt14_default {
1304 function = "SALT14";
1308 pinctrl_salt2_default: salt2_default {
1313 pinctrl_salt3_default: salt3_default {
1318 pinctrl_salt4_default: salt4_default {
1323 pinctrl_salt5_default: salt5_default {
1328 pinctrl_salt6_default: salt6_default {
1333 pinctrl_salt7_default: salt7_default {
1338 pinctrl_salt8_default: salt8_default {
1343 pinctrl_salt9_default: salt9_default {
1348 pinctrl_scl1_default: scl1_default {
1353 pinctrl_scl2_default: scl2_default {
1358 pinctrl_sd1_default: sd1_default {
1363 pinctrl_sd2_default: sd2_default {
1368 pinctrl_sda1_default: sda1_default {
1373 pinctrl_sda2_default: sda2_default {
1378 pinctrl_sgpm_default: sgpm_default {
1383 pinctrl_sgps1_default: sgps1_default {
1388 pinctrl_sgps2_default: sgps2_default {
1393 pinctrl_sioonctrl_default: sioonctrl_default {
1394 function = "SIOONCTRL";
1395 groups = "SIOONCTRL";
1398 pinctrl_siopbi_default: siopbi_default {
1399 function = "SIOPBI";
1403 pinctrl_siopbo_default: siopbo_default {
1404 function = "SIOPBO";
1408 pinctrl_siopwreq_default: siopwreq_default {
1409 function = "SIOPWREQ";
1410 groups = "SIOPWREQ";
1413 pinctrl_siopwrgd_default: siopwrgd_default {
1414 function = "SIOPWRGD";
1415 groups = "SIOPWRGD";
1418 pinctrl_sios3_default: sios3_default {
1423 pinctrl_sios5_default: sios5_default {
1428 pinctrl_siosci_default: siosci_default {
1429 function = "SIOSCI";
1433 pinctrl_spi1_default: spi1_default {
1438 pinctrl_spi1cs1_default: spi1cs1_default {
1439 function = "SPI1CS1";
1443 pinctrl_spi1debug_default: spi1debug_default {
1444 function = "SPI1DEBUG";
1445 groups = "SPI1DEBUG";
1448 pinctrl_spi1passthru_default: spi1passthru_default {
1449 function = "SPI1PASSTHRU";
1450 groups = "SPI1PASSTHRU";
1453 pinctrl_spi2ck_default: spi2ck_default {
1454 function = "SPI2CK";
1458 pinctrl_spi2cs0_default: spi2cs0_default {
1459 function = "SPI2CS0";
1463 pinctrl_spi2cs1_default: spi2cs1_default {
1464 function = "SPI2CS1";
1468 pinctrl_spi2miso_default: spi2miso_default {
1469 function = "SPI2MISO";
1470 groups = "SPI2MISO";
1473 pinctrl_spi2mosi_default: spi2mosi_default {
1474 function = "SPI2MOSI";
1475 groups = "SPI2MOSI";
1478 pinctrl_timer3_default: timer3_default {
1479 function = "TIMER3";
1483 pinctrl_timer4_default: timer4_default {
1484 function = "TIMER4";
1488 pinctrl_timer5_default: timer5_default {
1489 function = "TIMER5";
1493 pinctrl_timer6_default: timer6_default {
1494 function = "TIMER6";
1498 pinctrl_timer7_default: timer7_default {
1499 function = "TIMER7";
1503 pinctrl_timer8_default: timer8_default {
1504 function = "TIMER8";
1508 pinctrl_txd1_default: txd1_default {
1513 pinctrl_txd2_default: txd2_default {
1518 pinctrl_txd3_default: txd3_default {
1523 pinctrl_txd4_default: txd4_default {
1528 pinctrl_uart6_default: uart6_default {
1533 pinctrl_usbcki_default: usbcki_default {
1534 function = "USBCKI";
1538 pinctrl_usb2ah_default: usb2ah_default {
1539 function = "USB2AH";
1543 pinctrl_usb2ad_default: usb2ad_default {
1544 function = "USB2AD";
1548 pinctrl_usb11bhid_default: usb11bhid_default {
1549 function = "USB11BHID";
1550 groups = "USB11BHID";
1553 pinctrl_usb2bh_default: usb2bh_default {
1554 function = "USB2BH";
1558 pinctrl_vgabiosrom_default: vgabiosrom_default {
1559 function = "VGABIOSROM";
1560 groups = "VGABIOSROM";
1563 pinctrl_vgahs_default: vgahs_default {
1568 pinctrl_vgavs_default: vgavs_default {
1573 pinctrl_vpi24_default: vpi24_default {
1578 pinctrl_vpo_default: vpo_default {
1583 pinctrl_wdtrst1_default: wdtrst1_default {
1584 function = "WDTRST1";
1588 pinctrl_wdtrst2_default: wdtrst2_default {
1589 function = "WDTRST2";