1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2500";
9 interrupt-parent = <&vic>;
39 compatible = "arm,arm1176jzf-s";
46 device_type = "memory";
51 compatible = "simple-bus";
56 fmc: flash-controller@1e620000 {
57 reg = < 0x1e620000 0xc4
58 0x20000000 0x10000000 >;
61 compatible = "aspeed,ast2500-fmc";
62 clocks = <&syscon ASPEED_CLK_AHB>;
67 compatible = "jedec,spi-nor";
72 compatible = "jedec,spi-nor";
77 compatible = "jedec,spi-nor";
82 spi1: flash-controller@1e630000 {
83 reg = < 0x1e630000 0xc4
84 0x30000000 0x08000000 >;
87 compatible = "aspeed,ast2500-spi";
88 clocks = <&syscon ASPEED_CLK_AHB>;
92 compatible = "jedec,spi-nor";
97 compatible = "jedec,spi-nor";
102 spi2: flash-controller@1e631000 {
103 reg = < 0x1e631000 0xc4
104 0x38000000 0x08000000 >;
105 #address-cells = <1>;
107 compatible = "aspeed,ast2500-spi";
108 clocks = <&syscon ASPEED_CLK_AHB>;
112 compatible = "jedec,spi-nor";
117 compatible = "jedec,spi-nor";
122 vic: interrupt-controller@1e6c0080 {
123 compatible = "aspeed,ast2400-vic";
124 interrupt-controller;
125 #interrupt-cells = <1>;
126 valid-sources = <0xfefff7ff 0x0807ffff>;
127 reg = <0x1e6c0080 0x80>;
130 cvic: copro-interrupt-controller@1e6c2000 {
131 compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
132 valid-sources = <0xffffffff>;
133 copro-sw-interrupts = <1>;
134 reg = <0x1e6c2000 0x80>;
137 mac0: ethernet@1e660000 {
138 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
139 reg = <0x1e660000 0x180>;
141 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
145 mac1: ethernet@1e680000 {
146 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
147 reg = <0x1e680000 0x180>;
149 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
153 ehci0: usb@1e6a1000 {
154 compatible = "aspeed,ast2500-ehci", "generic-ehci";
155 reg = <0x1e6a1000 0x100>;
157 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pinctrl_usb2ah_default>;
163 ehci1: usb@1e6a3000 {
164 compatible = "aspeed,ast2500-ehci", "generic-ehci";
165 reg = <0x1e6a3000 0x100>;
167 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_usb2bh_default>;
174 compatible = "aspeed,ast2500-uhci", "generic-uhci";
175 reg = <0x1e6b0000 0x100>;
178 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
181 * No default pinmux, it will follow EHCI, use an explicit pinmux
182 * override if you don't enable EHCI
186 vhub: usb-vhub@1e6a0000 {
187 compatible = "aspeed,ast2500-usb-vhub";
188 reg = <0x1e6a0000 0x300>;
190 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
191 pinctrl-names = "default";
192 pinctrl-0 = <&pinctrl_usb2ad_default>;
197 compatible = "simple-bus";
198 #address-cells = <1>;
202 syscon: syscon@1e6e2000 {
203 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
204 reg = <0x1e6e2000 0x1a8>;
205 #address-cells = <1>;
211 compatible = "aspeed,g5-pinctrl";
212 aspeed,external-nodes = <&gfx &lhc>;
217 rng: hwrng@1e6e2078 {
218 compatible = "timeriomem_rng";
219 reg = <0x1e6e2078 0x4>;
224 gfx: display@1e6e6000 {
225 compatible = "aspeed,ast2500-gfx", "syscon";
226 reg = <0x1e6e6000 0x1000>;
231 compatible = "aspeed,ast2500-adc";
232 reg = <0x1e6e9000 0xb0>;
233 clocks = <&syscon ASPEED_CLK_APB>;
234 resets = <&syscon ASPEED_RESET_ADC>;
235 #io-channel-cells = <1>;
239 sram: sram@1e720000 {
240 compatible = "mmio-sram";
241 reg = <0x1e720000 0x9000>; // 36K
244 gpio: gpio@1e780000 {
247 compatible = "aspeed,ast2500-gpio";
248 reg = <0x1e780000 0x1000>;
250 gpio-ranges = <&pinctrl 0 0 232>;
251 clocks = <&syscon ASPEED_CLK_APB>;
252 interrupt-controller;
255 timer: timer@1e782000 {
256 /* This timer is a Faraday FTTMR010 derivative */
257 compatible = "aspeed,ast2400-timer";
258 reg = <0x1e782000 0x90>;
259 interrupts = <16 17 18 35 36 37 38 39>;
260 clocks = <&syscon ASPEED_CLK_APB>;
261 clock-names = "PCLK";
264 uart1: serial@1e783000 {
265 compatible = "ns16550a";
266 reg = <0x1e783000 0x20>;
269 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
270 resets = <&lpc_reset 4>;
275 uart5: serial@1e784000 {
276 compatible = "ns16550a";
277 reg = <0x1e784000 0x20>;
280 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
285 wdt1: watchdog@1e785000 {
286 compatible = "aspeed,ast2500-wdt";
287 reg = <0x1e785000 0x20>;
288 clocks = <&syscon ASPEED_CLK_APB>;
291 wdt2: watchdog@1e785020 {
292 compatible = "aspeed,ast2500-wdt";
293 reg = <0x1e785020 0x20>;
294 clocks = <&syscon ASPEED_CLK_APB>;
297 wdt3: watchdog@1e785040 {
298 compatible = "aspeed,ast2500-wdt";
299 reg = <0x1e785040 0x20>;
300 clocks = <&syscon ASPEED_CLK_APB>;
304 pwm_tacho: pwm-tacho-controller@1e786000 {
305 compatible = "aspeed,ast2500-pwm-tacho";
306 #address-cells = <1>;
308 reg = <0x1e786000 0x1000>;
309 clocks = <&syscon ASPEED_CLK_24M>;
310 resets = <&syscon ASPEED_RESET_PWM>;
314 vuart: serial@1e787000 {
315 compatible = "aspeed,ast2500-vuart";
316 reg = <0x1e787000 0x40>;
319 clocks = <&syscon ASPEED_CLK_APB>;
325 compatible = "aspeed,ast2500-lpc", "simple-mfd";
326 reg = <0x1e789000 0x1000>;
328 #address-cells = <1>;
330 ranges = <0x0 0x1e789000 0x1000>;
333 compatible = "aspeed,ast2500-lpc-bmc";
337 lpc_host: lpc-host@80 {
338 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
342 #address-cells = <1>;
344 ranges = <0x0 0x80 0x1e0>;
346 lpc_ctrl: lpc-ctrl@0 {
347 compatible = "aspeed,ast2500-lpc-ctrl";
349 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
353 lpc_snoop: lpc-snoop@0 {
354 compatible = "aspeed,ast2500-lpc-snoop";
361 compatible = "aspeed,ast2500-lhc";
362 reg = <0x20 0x24 0x48 0x8>;
365 lpc_reset: reset-controller@18 {
366 compatible = "aspeed,ast2500-lpc-reset";
372 compatible = "aspeed,ast2500-ibt-bmc";
375 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
381 uart2: serial@1e78d000 {
382 compatible = "ns16550a";
383 reg = <0x1e78d000 0x20>;
386 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
387 resets = <&lpc_reset 5>;
392 uart3: serial@1e78e000 {
393 compatible = "ns16550a";
394 reg = <0x1e78e000 0x20>;
397 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
398 resets = <&lpc_reset 6>;
403 uart4: serial@1e78f000 {
404 compatible = "ns16550a";
405 reg = <0x1e78f000 0x20>;
408 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
409 resets = <&lpc_reset 7>;
415 compatible = "simple-bus";
416 #address-cells = <1>;
418 ranges = <0 0x1e78a000 0x1000>;
425 i2c_ic: interrupt-controller@0 {
426 #interrupt-cells = <1>;
427 compatible = "aspeed,ast2500-i2c-ic";
430 interrupt-controller;
434 #address-cells = <1>;
436 #interrupt-cells = <1>;
439 compatible = "aspeed,ast2500-i2c-bus";
440 clocks = <&syscon ASPEED_CLK_APB>;
441 resets = <&syscon ASPEED_RESET_I2C>;
442 bus-frequency = <100000>;
444 interrupt-parent = <&i2c_ic>;
446 /* Does not need pinctrl properties */
450 #address-cells = <1>;
452 #interrupt-cells = <1>;
455 compatible = "aspeed,ast2500-i2c-bus";
456 clocks = <&syscon ASPEED_CLK_APB>;
457 resets = <&syscon ASPEED_RESET_I2C>;
458 bus-frequency = <100000>;
460 interrupt-parent = <&i2c_ic>;
462 /* Does not need pinctrl properties */
466 #address-cells = <1>;
468 #interrupt-cells = <1>;
471 compatible = "aspeed,ast2500-i2c-bus";
472 clocks = <&syscon ASPEED_CLK_APB>;
473 resets = <&syscon ASPEED_RESET_I2C>;
474 bus-frequency = <100000>;
476 interrupt-parent = <&i2c_ic>;
477 pinctrl-names = "default";
478 pinctrl-0 = <&pinctrl_i2c3_default>;
483 #address-cells = <1>;
485 #interrupt-cells = <1>;
488 compatible = "aspeed,ast2500-i2c-bus";
489 clocks = <&syscon ASPEED_CLK_APB>;
490 resets = <&syscon ASPEED_RESET_I2C>;
491 bus-frequency = <100000>;
493 interrupt-parent = <&i2c_ic>;
494 pinctrl-names = "default";
495 pinctrl-0 = <&pinctrl_i2c4_default>;
500 #address-cells = <1>;
502 #interrupt-cells = <1>;
505 compatible = "aspeed,ast2500-i2c-bus";
506 clocks = <&syscon ASPEED_CLK_APB>;
507 resets = <&syscon ASPEED_RESET_I2C>;
508 bus-frequency = <100000>;
510 interrupt-parent = <&i2c_ic>;
511 pinctrl-names = "default";
512 pinctrl-0 = <&pinctrl_i2c5_default>;
517 #address-cells = <1>;
519 #interrupt-cells = <1>;
522 compatible = "aspeed,ast2500-i2c-bus";
523 clocks = <&syscon ASPEED_CLK_APB>;
524 resets = <&syscon ASPEED_RESET_I2C>;
525 bus-frequency = <100000>;
527 interrupt-parent = <&i2c_ic>;
528 pinctrl-names = "default";
529 pinctrl-0 = <&pinctrl_i2c6_default>;
534 #address-cells = <1>;
536 #interrupt-cells = <1>;
539 compatible = "aspeed,ast2500-i2c-bus";
540 clocks = <&syscon ASPEED_CLK_APB>;
541 resets = <&syscon ASPEED_RESET_I2C>;
542 bus-frequency = <100000>;
544 interrupt-parent = <&i2c_ic>;
545 pinctrl-names = "default";
546 pinctrl-0 = <&pinctrl_i2c7_default>;
551 #address-cells = <1>;
553 #interrupt-cells = <1>;
556 compatible = "aspeed,ast2500-i2c-bus";
557 clocks = <&syscon ASPEED_CLK_APB>;
558 resets = <&syscon ASPEED_RESET_I2C>;
559 bus-frequency = <100000>;
561 interrupt-parent = <&i2c_ic>;
562 pinctrl-names = "default";
563 pinctrl-0 = <&pinctrl_i2c8_default>;
568 #address-cells = <1>;
570 #interrupt-cells = <1>;
573 compatible = "aspeed,ast2500-i2c-bus";
574 clocks = <&syscon ASPEED_CLK_APB>;
575 resets = <&syscon ASPEED_RESET_I2C>;
576 bus-frequency = <100000>;
578 interrupt-parent = <&i2c_ic>;
579 pinctrl-names = "default";
580 pinctrl-0 = <&pinctrl_i2c9_default>;
585 #address-cells = <1>;
587 #interrupt-cells = <1>;
590 compatible = "aspeed,ast2500-i2c-bus";
591 clocks = <&syscon ASPEED_CLK_APB>;
592 resets = <&syscon ASPEED_RESET_I2C>;
593 bus-frequency = <100000>;
595 interrupt-parent = <&i2c_ic>;
596 pinctrl-names = "default";
597 pinctrl-0 = <&pinctrl_i2c10_default>;
602 #address-cells = <1>;
604 #interrupt-cells = <1>;
607 compatible = "aspeed,ast2500-i2c-bus";
608 clocks = <&syscon ASPEED_CLK_APB>;
609 resets = <&syscon ASPEED_RESET_I2C>;
610 bus-frequency = <100000>;
612 interrupt-parent = <&i2c_ic>;
613 pinctrl-names = "default";
614 pinctrl-0 = <&pinctrl_i2c11_default>;
619 #address-cells = <1>;
621 #interrupt-cells = <1>;
624 compatible = "aspeed,ast2500-i2c-bus";
625 clocks = <&syscon ASPEED_CLK_APB>;
626 resets = <&syscon ASPEED_RESET_I2C>;
627 bus-frequency = <100000>;
629 interrupt-parent = <&i2c_ic>;
630 pinctrl-names = "default";
631 pinctrl-0 = <&pinctrl_i2c12_default>;
636 #address-cells = <1>;
638 #interrupt-cells = <1>;
641 compatible = "aspeed,ast2500-i2c-bus";
642 clocks = <&syscon ASPEED_CLK_APB>;
643 resets = <&syscon ASPEED_RESET_I2C>;
644 bus-frequency = <100000>;
646 interrupt-parent = <&i2c_ic>;
647 pinctrl-names = "default";
648 pinctrl-0 = <&pinctrl_i2c13_default>;
653 #address-cells = <1>;
655 #interrupt-cells = <1>;
658 compatible = "aspeed,ast2500-i2c-bus";
659 clocks = <&syscon ASPEED_CLK_APB>;
660 resets = <&syscon ASPEED_RESET_I2C>;
661 bus-frequency = <100000>;
663 interrupt-parent = <&i2c_ic>;
664 pinctrl-names = "default";
665 pinctrl-0 = <&pinctrl_i2c14_default>;
671 pinctrl_acpi_default: acpi_default {
676 pinctrl_adc0_default: adc0_default {
681 pinctrl_adc1_default: adc1_default {
686 pinctrl_adc10_default: adc10_default {
691 pinctrl_adc11_default: adc11_default {
696 pinctrl_adc12_default: adc12_default {
701 pinctrl_adc13_default: adc13_default {
706 pinctrl_adc14_default: adc14_default {
711 pinctrl_adc15_default: adc15_default {
716 pinctrl_adc2_default: adc2_default {
721 pinctrl_adc3_default: adc3_default {
726 pinctrl_adc4_default: adc4_default {
731 pinctrl_adc5_default: adc5_default {
736 pinctrl_adc6_default: adc6_default {
741 pinctrl_adc7_default: adc7_default {
746 pinctrl_adc8_default: adc8_default {
751 pinctrl_adc9_default: adc9_default {
756 pinctrl_bmcint_default: bmcint_default {
761 pinctrl_ddcclk_default: ddcclk_default {
766 pinctrl_ddcdat_default: ddcdat_default {
771 pinctrl_espi_default: espi_default {
776 pinctrl_fwspics1_default: fwspics1_default {
777 function = "FWSPICS1";
781 pinctrl_fwspics2_default: fwspics2_default {
782 function = "FWSPICS2";
786 pinctrl_gpid0_default: gpid0_default {
791 pinctrl_gpid2_default: gpid2_default {
796 pinctrl_gpid4_default: gpid4_default {
801 pinctrl_gpid6_default: gpid6_default {
806 pinctrl_gpie0_default: gpie0_default {
811 pinctrl_gpie2_default: gpie2_default {
816 pinctrl_gpie4_default: gpie4_default {
821 pinctrl_gpie6_default: gpie6_default {
826 pinctrl_i2c10_default: i2c10_default {
831 pinctrl_i2c11_default: i2c11_default {
836 pinctrl_i2c12_default: i2c12_default {
841 pinctrl_i2c13_default: i2c13_default {
846 pinctrl_i2c14_default: i2c14_default {
851 pinctrl_i2c3_default: i2c3_default {
856 pinctrl_i2c4_default: i2c4_default {
861 pinctrl_i2c5_default: i2c5_default {
866 pinctrl_i2c6_default: i2c6_default {
871 pinctrl_i2c7_default: i2c7_default {
876 pinctrl_i2c8_default: i2c8_default {
881 pinctrl_i2c9_default: i2c9_default {
886 pinctrl_lad0_default: lad0_default {
891 pinctrl_lad1_default: lad1_default {
896 pinctrl_lad2_default: lad2_default {
901 pinctrl_lad3_default: lad3_default {
906 pinctrl_lclk_default: lclk_default {
911 pinctrl_lframe_default: lframe_default {
916 pinctrl_lpchc_default: lpchc_default {
921 pinctrl_lpcpd_default: lpcpd_default {
926 pinctrl_lpcplus_default: lpcplus_default {
927 function = "LPCPLUS";
931 pinctrl_lpcpme_default: lpcpme_default {
936 pinctrl_lpcrst_default: lpcrst_default {
941 pinctrl_lpcsmi_default: lpcsmi_default {
946 pinctrl_lsirq_default: lsirq_default {
951 pinctrl_mac1link_default: mac1link_default {
952 function = "MAC1LINK";
956 pinctrl_mac2link_default: mac2link_default {
957 function = "MAC2LINK";
961 pinctrl_mdio1_default: mdio1_default {
966 pinctrl_mdio2_default: mdio2_default {
971 pinctrl_ncts1_default: ncts1_default {
976 pinctrl_ncts2_default: ncts2_default {
981 pinctrl_ncts3_default: ncts3_default {
986 pinctrl_ncts4_default: ncts4_default {
991 pinctrl_ndcd1_default: ndcd1_default {
996 pinctrl_ndcd2_default: ndcd2_default {
1001 pinctrl_ndcd3_default: ndcd3_default {
1006 pinctrl_ndcd4_default: ndcd4_default {
1011 pinctrl_ndsr1_default: ndsr1_default {
1016 pinctrl_ndsr2_default: ndsr2_default {
1021 pinctrl_ndsr3_default: ndsr3_default {
1026 pinctrl_ndsr4_default: ndsr4_default {
1031 pinctrl_ndtr1_default: ndtr1_default {
1036 pinctrl_ndtr2_default: ndtr2_default {
1041 pinctrl_ndtr3_default: ndtr3_default {
1046 pinctrl_ndtr4_default: ndtr4_default {
1051 pinctrl_nri1_default: nri1_default {
1056 pinctrl_nri2_default: nri2_default {
1061 pinctrl_nri3_default: nri3_default {
1066 pinctrl_nri4_default: nri4_default {
1071 pinctrl_nrts1_default: nrts1_default {
1076 pinctrl_nrts2_default: nrts2_default {
1081 pinctrl_nrts3_default: nrts3_default {
1086 pinctrl_nrts4_default: nrts4_default {
1091 pinctrl_oscclk_default: oscclk_default {
1092 function = "OSCCLK";
1096 pinctrl_pewake_default: pewake_default {
1097 function = "PEWAKE";
1101 pinctrl_pnor_default: pnor_default {
1106 pinctrl_pwm0_default: pwm0_default {
1111 pinctrl_pwm1_default: pwm1_default {
1116 pinctrl_pwm2_default: pwm2_default {
1121 pinctrl_pwm3_default: pwm3_default {
1126 pinctrl_pwm4_default: pwm4_default {
1131 pinctrl_pwm5_default: pwm5_default {
1136 pinctrl_pwm6_default: pwm6_default {
1141 pinctrl_pwm7_default: pwm7_default {
1146 pinctrl_rgmii1_default: rgmii1_default {
1147 function = "RGMII1";
1151 pinctrl_rgmii2_default: rgmii2_default {
1152 function = "RGMII2";
1156 pinctrl_rmii1_default: rmii1_default {
1161 pinctrl_rmii2_default: rmii2_default {
1166 pinctrl_rxd1_default: rxd1_default {
1171 pinctrl_rxd2_default: rxd2_default {
1176 pinctrl_rxd3_default: rxd3_default {
1181 pinctrl_rxd4_default: rxd4_default {
1186 pinctrl_salt1_default: salt1_default {
1191 pinctrl_salt10_default: salt10_default {
1192 function = "SALT10";
1196 pinctrl_salt11_default: salt11_default {
1197 function = "SALT11";
1201 pinctrl_salt12_default: salt12_default {
1202 function = "SALT12";
1206 pinctrl_salt13_default: salt13_default {
1207 function = "SALT13";
1211 pinctrl_salt14_default: salt14_default {
1212 function = "SALT14";
1216 pinctrl_salt2_default: salt2_default {
1221 pinctrl_salt3_default: salt3_default {
1226 pinctrl_salt4_default: salt4_default {
1231 pinctrl_salt5_default: salt5_default {
1236 pinctrl_salt6_default: salt6_default {
1241 pinctrl_salt7_default: salt7_default {
1246 pinctrl_salt8_default: salt8_default {
1251 pinctrl_salt9_default: salt9_default {
1256 pinctrl_scl1_default: scl1_default {
1261 pinctrl_scl2_default: scl2_default {
1266 pinctrl_sd1_default: sd1_default {
1271 pinctrl_sd2_default: sd2_default {
1276 pinctrl_sda1_default: sda1_default {
1281 pinctrl_sda2_default: sda2_default {
1286 pinctrl_sgps1_default: sgps1_default {
1291 pinctrl_sgps2_default: sgps2_default {
1296 pinctrl_sioonctrl_default: sioonctrl_default {
1297 function = "SIOONCTRL";
1298 groups = "SIOONCTRL";
1301 pinctrl_siopbi_default: siopbi_default {
1302 function = "SIOPBI";
1306 pinctrl_siopbo_default: siopbo_default {
1307 function = "SIOPBO";
1311 pinctrl_siopwreq_default: siopwreq_default {
1312 function = "SIOPWREQ";
1313 groups = "SIOPWREQ";
1316 pinctrl_siopwrgd_default: siopwrgd_default {
1317 function = "SIOPWRGD";
1318 groups = "SIOPWRGD";
1321 pinctrl_sios3_default: sios3_default {
1326 pinctrl_sios5_default: sios5_default {
1331 pinctrl_siosci_default: siosci_default {
1332 function = "SIOSCI";
1336 pinctrl_spi1_default: spi1_default {
1341 pinctrl_spi1cs1_default: spi1cs1_default {
1342 function = "SPI1CS1";
1346 pinctrl_spi1debug_default: spi1debug_default {
1347 function = "SPI1DEBUG";
1348 groups = "SPI1DEBUG";
1351 pinctrl_spi1passthru_default: spi1passthru_default {
1352 function = "SPI1PASSTHRU";
1353 groups = "SPI1PASSTHRU";
1356 pinctrl_spi2ck_default: spi2ck_default {
1357 function = "SPI2CK";
1361 pinctrl_spi2cs0_default: spi2cs0_default {
1362 function = "SPI2CS0";
1366 pinctrl_spi2cs1_default: spi2cs1_default {
1367 function = "SPI2CS1";
1371 pinctrl_spi2miso_default: spi2miso_default {
1372 function = "SPI2MISO";
1373 groups = "SPI2MISO";
1376 pinctrl_spi2mosi_default: spi2mosi_default {
1377 function = "SPI2MOSI";
1378 groups = "SPI2MOSI";
1381 pinctrl_timer3_default: timer3_default {
1382 function = "TIMER3";
1386 pinctrl_timer4_default: timer4_default {
1387 function = "TIMER4";
1391 pinctrl_timer5_default: timer5_default {
1392 function = "TIMER5";
1396 pinctrl_timer6_default: timer6_default {
1397 function = "TIMER6";
1401 pinctrl_timer7_default: timer7_default {
1402 function = "TIMER7";
1406 pinctrl_timer8_default: timer8_default {
1407 function = "TIMER8";
1411 pinctrl_txd1_default: txd1_default {
1416 pinctrl_txd2_default: txd2_default {
1421 pinctrl_txd3_default: txd3_default {
1426 pinctrl_txd4_default: txd4_default {
1431 pinctrl_uart6_default: uart6_default {
1436 pinctrl_usbcki_default: usbcki_default {
1437 function = "USBCKI";
1441 pinctrl_usb2ah_default: usb2ah_default {
1442 function = "USB2AH";
1446 pinctrl_usb2ad_default: usb2ad_default {
1447 function = "USB2AD";
1451 pinctrl_usb11bhid_default: usb11bhid_default {
1452 function = "USB11BHID";
1453 groups = "USB11BHID";
1456 pinctrl_usb2bh_default: usb2bh_default {
1457 function = "USB2BH";
1461 pinctrl_vgabiosrom_default: vgabiosrom_default {
1462 function = "VGABIOSROM";
1463 groups = "VGABIOSROM";
1466 pinctrl_vgahs_default: vgahs_default {
1471 pinctrl_vgavs_default: vgavs_default {
1476 pinctrl_vpi24_default: vpi24_default {
1481 pinctrl_vpo_default: vpo_default {
1486 pinctrl_wdtrst1_default: wdtrst1_default {
1487 function = "WDTRST1";
1491 pinctrl_wdtrst2_default: wdtrst2_default {
1492 function = "WDTRST2";