arch/arm/boot/dts/aspeed-g5.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 #include <dt-bindings/clock/aspeed-clock.h>
   3
   4 / {
   5         model = "Aspeed BMC";
   6         compatible = "aspeed,ast2500";
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         interrupt-parent = <&vic>;
  10
  11         aliases {
  12                 i2c0 = &i2c0;
  13                 i2c1 = &i2c1;
  14                 i2c2 = &i2c2;
  15                 i2c3 = &i2c3;
  16                 i2c4 = &i2c4;
  17                 i2c5 = &i2c5;
  18                 i2c6 = &i2c6;
  19                 i2c7 = &i2c7;
  20                 i2c8 = &i2c8;
  21                 i2c9 = &i2c9;
  22                 i2c10 = &i2c10;
  23                 i2c11 = &i2c11;
  24                 i2c12 = &i2c12;
  25                 i2c13 = &i2c13;
  26                 serial0 = &uart1;
  27                 serial1 = &uart2;
  28                 serial2 = &uart3;
  29                 serial3 = &uart4;
  30                 serial4 = &uart5;
  31                 serial5 = &vuart;
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 cpu@0 {
  39                         compatible = "arm,arm1176jzf-s";
  40                         device_type = "cpu";
  41                         reg = <0>;
  42                 };
  43         };
  44
  45         memory@80000000 {
  46                 device_type = "memory";
  47                 reg = <0x80000000 0>;
  48         };
  49
  50         edac: sdram@1e6e0000 {
  51                 compatible = "aspeed,ast2500-sdram-edac";
  52                 reg = <0x1e6e0000 0x174>;
  53                 interrupts = <0>;
  54                 status = "disabled";
  55         };
  56
  57         ahb {
  58                 compatible = "simple-bus";
  59                 #address-cells = <1>;
  60                 #size-cells = <1>;
  61                 ranges;
  62
  63                 fmc: spi@1e620000 {
  64                         reg = < 0x1e620000 0xc4
  65                                 0x20000000 0x10000000 >;
  66                         #address-cells = <1>;
  67                         #size-cells = <0>;
  68                         compatible = "aspeed,ast2500-fmc";
  69                         clocks = <&syscon ASPEED_CLK_AHB>;
  70                         status = "disabled";
  71                         interrupts = <19>;
  72                         flash@0 {
  73                                 reg = < 0 >;
  74                                 compatible = "jedec,spi-nor";
  75                                 status = "disabled";
  76                         };
  77                         flash@1 {
  78                                 reg = < 1 >;
  79                                 compatible = "jedec,spi-nor";
  80                                 status = "disabled";
  81                         };
  82                         flash@2 {
  83                                 reg = < 2 >;
  84                                 compatible = "jedec,spi-nor";
  85                                 status = "disabled";
  86                         };
  87                 };
  88
  89                 spi1: spi@1e630000 {
  90                         reg = < 0x1e630000 0xc4
  91                                 0x30000000 0x08000000 >;
  92                         #address-cells = <1>;
  93                         #size-cells = <0>;
  94                         compatible = "aspeed,ast2500-spi";
  95                         clocks = <&syscon ASPEED_CLK_AHB>;
  96                         status = "disabled";
  97                         flash@0 {
  98                                 reg = < 0 >;
  99                                 compatible = "jedec,spi-nor";
 100                                 status = "disabled";
 101                         };
 102                         flash@1 {
 103                                 reg = < 1 >;
 104                                 compatible = "jedec,spi-nor";
 105                                 status = "disabled";
 106                         };
 107                 };
 108
 109                 spi2: spi@1e631000 {
 110                         reg = < 0x1e631000 0xc4
 111                                 0x38000000 0x08000000 >;
 112                         #address-cells = <1>;
 113                         #size-cells = <0>;
 114                         compatible = "aspeed,ast2500-spi";
 115                         clocks = <&syscon ASPEED_CLK_AHB>;
 116                         status = "disabled";
 117                         flash@0 {
 118                                 reg = < 0 >;
 119                                 compatible = "jedec,spi-nor";
 120                                 status = "disabled";
 121                         };
 122                         flash@1 {
 123                                 reg = < 1 >;
 124                                 compatible = "jedec,spi-nor";
 125                                 status = "disabled";
 126                         };
 127                 };
 128
 129                 vic: interrupt-controller@1e6c0080 {
 130                         compatible = "aspeed,ast2400-vic";
 131                         interrupt-controller;
 132                         #interrupt-cells = <1>;
 133                         valid-sources = <0xfefff7ff 0x0807ffff>;
 134                         reg = <0x1e6c0080 0x80>;
 135                 };
 136
 137                 cvic: copro-interrupt-controller@1e6c2000 {
 138                         compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
 139                         valid-sources = <0xffffffff>;
 140                         copro-sw-interrupts = <1>;
 141                         reg = <0x1e6c2000 0x80>;
 142                 };
 143
 144                 mac0: ethernet@1e660000 {
 145                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 146                         reg = <0x1e660000 0x180>;
 147                         interrupts = <2>;
 148                         clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
 149                         status = "disabled";
 150                 };
 151
 152                 mac1: ethernet@1e680000 {
 153                         compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
 154                         reg = <0x1e680000 0x180>;
 155                         interrupts = <3>;
 156                         clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
 157                         status = "disabled";
 158                 };
 159
 160                 ehci0: usb@1e6a1000 {
 161                         compatible = "aspeed,ast2500-ehci", "generic-ehci";
 162                         reg = <0x1e6a1000 0x100>;
 163                         interrupts = <5>;
 164                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
 165                         pinctrl-names = "default";
 166                         pinctrl-0 = <&pinctrl_usb2ah_default>;
 167                         status = "disabled";
 168                 };
 169
 170                 ehci1: usb@1e6a3000 {
 171                         compatible = "aspeed,ast2500-ehci", "generic-ehci";
 172                         reg = <0x1e6a3000 0x100>;
 173                         interrupts = <13>;
 174                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
 175                         pinctrl-names = "default";
 176                         pinctrl-0 = <&pinctrl_usb2bh_default>;
 177                         status = "disabled";
 178                 };
 179
 180                 uhci: usb@1e6b0000 {
 181                         compatible = "aspeed,ast2500-uhci", "generic-uhci";
 182                         reg = <0x1e6b0000 0x100>;
 183                         interrupts = <14>;
 184                         #ports = <2>;
 185                         clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
 186                         status = "disabled";
 187                         /*
 188                          * No default pinmux, it will follow EHCI, use an explicit pinmux
 189                          * override if you don't enable EHCI
 190                          */
 191                 };
 192
 193                 vhub: usb-vhub@1e6a0000 {
 194                         compatible = "aspeed,ast2500-usb-vhub";
 195                         reg = <0x1e6a0000 0x300>;
 196                         interrupts = <5>;
 197                         clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
 198                         pinctrl-names = "default";
 199                         pinctrl-0 = <&pinctrl_usb2ad_default>;
 200                         status = "disabled";
 201                 };
 202
 203                 apb {
 204                         compatible = "simple-bus";
 205                         #address-cells = <1>;
 206                         #size-cells = <1>;
 207                         ranges;
 208
 209                         syscon: syscon@1e6e2000 {
 210                                 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
 211                                 reg = <0x1e6e2000 0x1a8>;
 212                                 #address-cells = <1>;
 213                                 #size-cells = <0>;
 214                                 #clock-cells = <1>;
 215                                 #reset-cells = <1>;
 216
 217                                 pinctrl: pinctrl {
 218                                         compatible = "aspeed,g5-pinctrl";
 219                                         aspeed,external-nodes = <&gfx &lhc>;
 220
 221                                 };
 222
 223                                 p2a: p2a-control {
 224                                         compatible = "aspeed,ast2500-p2a-ctrl";
 225                                         status = "disabled";
 226                                 };
 227                         };
 228
 229                         rng: hwrng@1e6e2078 {
 230                                 compatible = "timeriomem_rng";
 231                                 reg = <0x1e6e2078 0x4>;
 232                                 period = <1>;
 233                                 quality = <100>;
 234                         };
 235
 236                         gfx: display@1e6e6000 {
 237                                 compatible = "aspeed,ast2500-gfx", "syscon";
 238                                 reg = <0x1e6e6000 0x1000>;
 239                                 reg-io-width = <4>;
 240                                 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
 241                                 resets = <&syscon ASPEED_RESET_CRT1>;
 242                                 status = "disabled";
 243                                 interrupts = <0x19>;
 244                         };
 245
 246                         adc: adc@1e6e9000 {
 247                                 compatible = "aspeed,ast2500-adc";
 248                                 reg = <0x1e6e9000 0xb0>;
 249                                 clocks = <&syscon ASPEED_CLK_APB>;
 250                                 resets = <&syscon ASPEED_RESET_ADC>;
 251                                 #io-channel-cells = <1>;
 252                                 status = "disabled";
 253                         };
 254
 255                         video: video@1e700000 {
 256                                 compatible = "aspeed,ast2500-video-engine";
 257                                 reg = <0x1e700000 0x1000>;
 258                                 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
 259                                          <&syscon ASPEED_CLK_GATE_ECLK>;
 260                                 clock-names = "vclk", "eclk";
 261                                 interrupts = <7>;
 262                                 status = "disabled";
 263                         };
 264
 265                         sram: sram@1e720000 {
 266                                 compatible = "mmio-sram";
 267                                 reg = <0x1e720000 0x9000>;      // 36K
 268                         };
 269
 270                         sdmmc: sd-controller@1e740000 {
 271                                 compatible = "aspeed,ast2500-sd-controller";
 272                                 reg = <0x1e740000 0x100>;
 273                                 #address-cells = <1>;
 274                                 #size-cells = <1>;
 275                                 ranges = <0 0x1e740000 0x10000>;
 276                                 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
 277                                 status = "disabled";
 278
 279                                 sdhci0: sdhci@100 {
 280                                         compatible = "aspeed,ast2500-sdhci";
 281                                         reg = <0x100 0x100>;
 282                                         interrupts = <26>;
 283                                         sdhci,auto-cmd12;
 284                                         clocks = <&syscon ASPEED_CLK_SDIO>;
 285                                         status = "disabled";
 286                                 };
 287
 288                                 sdhci1: sdhci@200 {
 289                                         compatible = "aspeed,ast2500-sdhci";
 290                                         reg = <0x200 0x100>;
 291                                         interrupts = <26>;
 292                                         sdhci,auto-cmd12;
 293                                         clocks = <&syscon ASPEED_CLK_SDIO>;
 294                                         status = "disabled";
 295                                 };
 296                         };
 297
 298                         gpio: gpio@1e780000 {
 299                                 #gpio-cells = <2>;
 300                                 gpio-controller;
 301                                 compatible = "aspeed,ast2500-gpio";
 302                                 reg = <0x1e780000 0x1000>;
 303                                 interrupts = <20>;
 304                                 gpio-ranges = <&pinctrl 0 0 232>;
 305                                 clocks = <&syscon ASPEED_CLK_APB>;
 306                                 interrupt-controller;
 307                                 #interrupt-cells = <2>;
 308                         };
 309
 310                         rtc: rtc@1e781000 {
 311                                 compatible = "aspeed,ast2500-rtc";
 312                                 reg = <0x1e781000 0x18>;
 313                                 status = "disabled";
 314                         };
 315
 316                         timer: timer@1e782000 {
 317                                 /* This timer is a Faraday FTTMR010 derivative */
 318                                 compatible = "aspeed,ast2400-timer";
 319                                 reg = <0x1e782000 0x90>;
 320                                 interrupts = <16 17 18 35 36 37 38 39>;
 321                                 clocks = <&syscon ASPEED_CLK_APB>;
 322                                 clock-names = "PCLK";
 323                         };
 324
 325                         uart1: serial@1e783000 {
 326                                 compatible = "ns16550a";
 327                                 reg = <0x1e783000 0x20>;
 328                                 reg-shift = <2>;
 329                                 interrupts = <9>;
 330                                 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
 331                                 resets = <&lpc_reset 4>;
 332                                 no-loopback-test;
 333                                 status = "disabled";
 334                         };
 335
 336                         uart5: serial@1e784000 {
 337                                 compatible = "ns16550a";
 338                                 reg = <0x1e784000 0x20>;
 339                                 reg-shift = <2>;
 340                                 interrupts = <10>;
 341                                 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
 342                                 no-loopback-test;
 343                                 status = "disabled";
 344                         };
 345
 346                         wdt1: watchdog@1e785000 {
 347                                 compatible = "aspeed,ast2500-wdt";
 348                                 reg = <0x1e785000 0x20>;
 349                                 clocks = <&syscon ASPEED_CLK_APB>;
 350                         };
 351
 352                         wdt2: watchdog@1e785020 {
 353                                 compatible = "aspeed,ast2500-wdt";
 354                                 reg = <0x1e785020 0x20>;
 355                                 clocks = <&syscon ASPEED_CLK_APB>;
 356                         };
 357
 358                         wdt3: watchdog@1e785040 {
 359                                 compatible = "aspeed,ast2500-wdt";
 360                                 reg = <0x1e785040 0x20>;
 361                                 clocks = <&syscon ASPEED_CLK_APB>;
 362                                 status = "disabled";
 363                         };
 364
 365                         pwm_tacho: pwm-tacho-controller@1e786000 {
 366                                 compatible = "aspeed,ast2500-pwm-tacho";
 367                                 #address-cells = <1>;
 368                                 #size-cells = <0>;
 369                                 reg = <0x1e786000 0x1000>;
 370                                 clocks = <&syscon ASPEED_CLK_24M>;
 371                                 resets = <&syscon ASPEED_RESET_PWM>;
 372                                 status = "disabled";
 373                         };
 374
 375                         vuart: serial@1e787000 {
 376                                 compatible = "aspeed,ast2500-vuart";
 377                                 reg = <0x1e787000 0x40>;
 378                                 reg-shift = <2>;
 379                                 interrupts = <8>;
 380                                 clocks = <&syscon ASPEED_CLK_APB>;
 381                                 no-loopback-test;
 382                                 status = "disabled";
 383                         };
 384
 385                         lpc: lpc@1e789000 {
 386                                 compatible = "aspeed,ast2500-lpc", "simple-mfd";
 387                                 reg = <0x1e789000 0x1000>;
 388
 389                                 #address-cells = <1>;
 390                                 #size-cells = <1>;
 391                                 ranges = <0x0 0x1e789000 0x1000>;
 392
 393                                 lpc_bmc: lpc-bmc@0 {
 394                                         compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
 395                                         reg = <0x0 0x80>;
 396                                         reg-io-width = <4>;
 397
 398                                         #address-cells = <1>;
 399                                         #size-cells = <1>;
 400                                         ranges = <0x0 0x0 0x80>;
 401
 402                                         kcs1: kcs1@0 {
 403                                                 compatible = "aspeed,ast2500-kcs-bmc";
 404                                                 interrupts = <8>;
 405                                                 kcs_chan = <1>;
 406                                                 status = "disabled";
 407                                         };
 408                                         kcs2: kcs2@0 {
 409                                                 compatible = "aspeed,ast2500-kcs-bmc";
 410                                                 interrupts = <8>;
 411                                                 kcs_chan = <2>;
 412                                                 status = "disabled";
 413                                         };
 414                                         kcs3: kcs3@0 {
 415                                                 compatible = "aspeed,ast2500-kcs-bmc";
 416                                                 interrupts = <8>;
 417                                                 kcs_chan = <3>;
 418                                                 status = "disabled";
 419                                         };
 420                                 };
 421
 422                                 lpc_host: lpc-host@80 {
 423                                         compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
 424                                         reg = <0x80 0x1e0>;
 425                                         reg-io-width = <4>;
 426
 427                                         #address-cells = <1>;
 428                                         #size-cells = <1>;
 429                                         ranges = <0x0 0x80 0x1e0>;
 430
 431                                         kcs4: kcs4@0 {
 432                                                 compatible = "aspeed,ast2500-kcs-bmc";
 433                                                 interrupts = <8>;
 434                                                 kcs_chan = <4>;
 435                                                 status = "disabled";
 436                                         };
 437
 438                                         lpc_ctrl: lpc-ctrl@0 {
 439                                                 compatible = "aspeed,ast2500-lpc-ctrl";
 440                                                 reg = <0x0 0x80>;
 441                                                 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
 442                                                 status = "disabled";
 443                                         };
 444
 445                                         lpc_snoop: lpc-snoop@0 {
 446                                                 compatible = "aspeed,ast2500-lpc-snoop";
 447                                                 reg = <0x0 0x80>;
 448                                                 interrupts = <8>;
 449                                                 status = "disabled";
 450                                         };
 451
 452                                         lhc: lhc@20 {
 453                                                 compatible = "aspeed,ast2500-lhc";
 454                                                 reg = <0x20 0x24 0x48 0x8>;
 455                                         };
 456
 457                                         lpc_reset: reset-controller@18 {
 458                                                 compatible = "aspeed,ast2500-lpc-reset";
 459                                                 reg = <0x18 0x4>;
 460                                                 #reset-cells = <1>;
 461                                         };
 462
 463                                         ibt: ibt@c0 {
 464                                                 compatible = "aspeed,ast2500-ibt-bmc";
 465                                                 reg = <0xc0 0x18>;
 466                                                 interrupts = <8>;
 467                                                 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
 468                                                 status = "disabled";
 469                                         };
 470                                 };
 471                         };
 472
 473                         uart2: serial@1e78d000 {
 474                                 compatible = "ns16550a";
 475                                 reg = <0x1e78d000 0x20>;
 476                                 reg-shift = <2>;
 477                                 interrupts = <32>;
 478                                 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
 479                                 resets = <&lpc_reset 5>;
 480                                 no-loopback-test;
 481                                 status = "disabled";
 482                         };
 483
 484                         uart3: serial@1e78e000 {
 485                                 compatible = "ns16550a";
 486                                 reg = <0x1e78e000 0x20>;
 487                                 reg-shift = <2>;
 488                                 interrupts = <33>;
 489                                 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
 490                                 resets = <&lpc_reset 6>;
 491                                 no-loopback-test;
 492                                 status = "disabled";
 493                         };
 494
 495                         uart4: serial@1e78f000 {
 496                                 compatible = "ns16550a";
 497                                 reg = <0x1e78f000 0x20>;
 498                                 reg-shift = <2>;
 499                                 interrupts = <34>;
 500                                 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
 501                                 resets = <&lpc_reset 7>;
 502                                 no-loopback-test;
 503                                 status = "disabled";
 504                         };
 505
 506                         i2c: bus@1e78a000 {
 507                                 compatible = "simple-bus";
 508                                 #address-cells = <1>;
 509                                 #size-cells = <1>;
 510                                 ranges = <0 0x1e78a000 0x1000>;
 511                         };
 512                 };
 513         };
 514 };
 515
 516 &i2c {
 517         i2c_ic: interrupt-controller@0 {
 518                 #interrupt-cells = <1>;
 519                 compatible = "aspeed,ast2500-i2c-ic";
 520                 reg = <0x0 0x40>;
 521                 interrupts = <12>;
 522                 interrupt-controller;
 523         };
 524
 525         i2c0: i2c-bus@40 {
 526                 #address-cells = <1>;
 527                 #size-cells = <0>;
 528                 #interrupt-cells = <1>;
 529
 530                 reg = <0x40 0x40>;
 531                 compatible = "aspeed,ast2500-i2c-bus";
 532                 clocks = <&syscon ASPEED_CLK_APB>;
 533                 resets = <&syscon ASPEED_RESET_I2C>;
 534                 bus-frequency = <100000>;
 535                 interrupts = <0>;
 536                 interrupt-parent = <&i2c_ic>;
 537                 status = "disabled";
 538                 /* Does not need pinctrl properties */
 539         };
 540
 541         i2c1: i2c-bus@80 {
 542                 #address-cells = <1>;
 543                 #size-cells = <0>;
 544                 #interrupt-cells = <1>;
 545
 546                 reg = <0x80 0x40>;
 547                 compatible = "aspeed,ast2500-i2c-bus";
 548                 clocks = <&syscon ASPEED_CLK_APB>;
 549                 resets = <&syscon ASPEED_RESET_I2C>;
 550                 bus-frequency = <100000>;
 551                 interrupts = <1>;
 552                 interrupt-parent = <&i2c_ic>;
 553                 status = "disabled";
 554                 /* Does not need pinctrl properties */
 555         };
 556
 557         i2c2: i2c-bus@c0 {
 558                 #address-cells = <1>;
 559                 #size-cells = <0>;
 560                 #interrupt-cells = <1>;
 561
 562                 reg = <0xc0 0x40>;
 563                 compatible = "aspeed,ast2500-i2c-bus";
 564                 clocks = <&syscon ASPEED_CLK_APB>;
 565                 resets = <&syscon ASPEED_RESET_I2C>;
 566                 bus-frequency = <100000>;
 567                 interrupts = <2>;
 568                 interrupt-parent = <&i2c_ic>;
 569                 pinctrl-names = "default";
 570                 pinctrl-0 = <&pinctrl_i2c3_default>;
 571                 status = "disabled";
 572         };
 573
 574         i2c3: i2c-bus@100 {
 575                 #address-cells = <1>;
 576                 #size-cells = <0>;
 577                 #interrupt-cells = <1>;
 578
 579                 reg = <0x100 0x40>;
 580                 compatible = "aspeed,ast2500-i2c-bus";
 581                 clocks = <&syscon ASPEED_CLK_APB>;
 582                 resets = <&syscon ASPEED_RESET_I2C>;
 583                 bus-frequency = <100000>;
 584                 interrupts = <3>;
 585                 interrupt-parent = <&i2c_ic>;
 586                 pinctrl-names = "default";
 587                 pinctrl-0 = <&pinctrl_i2c4_default>;
 588                 status = "disabled";
 589         };
 590
 591         i2c4: i2c-bus@140 {
 592                 #address-cells = <1>;
 593                 #size-cells = <0>;
 594                 #interrupt-cells = <1>;
 595
 596                 reg = <0x140 0x40>;
 597                 compatible = "aspeed,ast2500-i2c-bus";
 598                 clocks = <&syscon ASPEED_CLK_APB>;
 599                 resets = <&syscon ASPEED_RESET_I2C>;
 600                 bus-frequency = <100000>;
 601                 interrupts = <4>;
 602                 interrupt-parent = <&i2c_ic>;
 603                 pinctrl-names = "default";
 604                 pinctrl-0 = <&pinctrl_i2c5_default>;
 605                 status = "disabled";
 606         };
 607
 608         i2c5: i2c-bus@180 {
 609                 #address-cells = <1>;
 610                 #size-cells = <0>;
 611                 #interrupt-cells = <1>;
 612
 613                 reg = <0x180 0x40>;
 614                 compatible = "aspeed,ast2500-i2c-bus";
 615                 clocks = <&syscon ASPEED_CLK_APB>;
 616                 resets = <&syscon ASPEED_RESET_I2C>;
 617                 bus-frequency = <100000>;
 618                 interrupts = <5>;
 619                 interrupt-parent = <&i2c_ic>;
 620                 pinctrl-names = "default";
 621                 pinctrl-0 = <&pinctrl_i2c6_default>;
 622                 status = "disabled";
 623         };
 624
 625         i2c6: i2c-bus@1c0 {
 626                 #address-cells = <1>;
 627                 #size-cells = <0>;
 628                 #interrupt-cells = <1>;
 629
 630                 reg = <0x1c0 0x40>;
 631                 compatible = "aspeed,ast2500-i2c-bus";
 632                 clocks = <&syscon ASPEED_CLK_APB>;
 633                 resets = <&syscon ASPEED_RESET_I2C>;
 634                 bus-frequency = <100000>;
 635                 interrupts = <6>;
 636                 interrupt-parent = <&i2c_ic>;
 637                 pinctrl-names = "default";
 638                 pinctrl-0 = <&pinctrl_i2c7_default>;
 639                 status = "disabled";
 640         };
 641
 642         i2c7: i2c-bus@300 {
 643                 #address-cells = <1>;
 644                 #size-cells = <0>;
 645                 #interrupt-cells = <1>;
 646
 647                 reg = <0x300 0x40>;
 648                 compatible = "aspeed,ast2500-i2c-bus";
 649                 clocks = <&syscon ASPEED_CLK_APB>;
 650                 resets = <&syscon ASPEED_RESET_I2C>;
 651                 bus-frequency = <100000>;
 652                 interrupts = <7>;
 653                 interrupt-parent = <&i2c_ic>;
 654                 pinctrl-names = "default";
 655                 pinctrl-0 = <&pinctrl_i2c8_default>;
 656                 status = "disabled";
 657         };
 658
 659         i2c8: i2c-bus@340 {
 660                 #address-cells = <1>;
 661                 #size-cells = <0>;
 662                 #interrupt-cells = <1>;
 663
 664                 reg = <0x340 0x40>;
 665                 compatible = "aspeed,ast2500-i2c-bus";
 666                 clocks = <&syscon ASPEED_CLK_APB>;
 667                 resets = <&syscon ASPEED_RESET_I2C>;
 668                 bus-frequency = <100000>;
 669                 interrupts = <8>;
 670                 interrupt-parent = <&i2c_ic>;
 671                 pinctrl-names = "default";
 672                 pinctrl-0 = <&pinctrl_i2c9_default>;
 673                 status = "disabled";
 674         };
 675
 676         i2c9: i2c-bus@380 {
 677                 #address-cells = <1>;
 678                 #size-cells = <0>;
 679                 #interrupt-cells = <1>;
 680
 681                 reg = <0x380 0x40>;
 682                 compatible = "aspeed,ast2500-i2c-bus";
 683                 clocks = <&syscon ASPEED_CLK_APB>;
 684                 resets = <&syscon ASPEED_RESET_I2C>;
 685                 bus-frequency = <100000>;
 686                 interrupts = <9>;
 687                 interrupt-parent = <&i2c_ic>;
 688                 pinctrl-names = "default";
 689                 pinctrl-0 = <&pinctrl_i2c10_default>;
 690                 status = "disabled";
 691         };
 692
 693         i2c10: i2c-bus@3c0 {
 694                 #address-cells = <1>;
 695                 #size-cells = <0>;
 696                 #interrupt-cells = <1>;
 697
 698                 reg = <0x3c0 0x40>;
 699                 compatible = "aspeed,ast2500-i2c-bus";
 700                 clocks = <&syscon ASPEED_CLK_APB>;
 701                 resets = <&syscon ASPEED_RESET_I2C>;
 702                 bus-frequency = <100000>;
 703                 interrupts = <10>;
 704                 interrupt-parent = <&i2c_ic>;
 705                 pinctrl-names = "default";
 706                 pinctrl-0 = <&pinctrl_i2c11_default>;
 707                 status = "disabled";
 708         };
 709
 710         i2c11: i2c-bus@400 {
 711                 #address-cells = <1>;
 712                 #size-cells = <0>;
 713                 #interrupt-cells = <1>;
 714
 715                 reg = <0x400 0x40>;
 716                 compatible = "aspeed,ast2500-i2c-bus";
 717                 clocks = <&syscon ASPEED_CLK_APB>;
 718                 resets = <&syscon ASPEED_RESET_I2C>;
 719                 bus-frequency = <100000>;
 720                 interrupts = <11>;
 721                 interrupt-parent = <&i2c_ic>;
 722                 pinctrl-names = "default";
 723                 pinctrl-0 = <&pinctrl_i2c12_default>;
 724                 status = "disabled";
 725         };
 726
 727         i2c12: i2c-bus@440 {
 728                 #address-cells = <1>;
 729                 #size-cells = <0>;
 730                 #interrupt-cells = <1>;
 731
 732                 reg = <0x440 0x40>;
 733                 compatible = "aspeed,ast2500-i2c-bus";
 734                 clocks = <&syscon ASPEED_CLK_APB>;
 735                 resets = <&syscon ASPEED_RESET_I2C>;
 736                 bus-frequency = <100000>;
 737                 interrupts = <12>;
 738                 interrupt-parent = <&i2c_ic>;
 739                 pinctrl-names = "default";
 740                 pinctrl-0 = <&pinctrl_i2c13_default>;
 741                 status = "disabled";
 742         };
 743
 744         i2c13: i2c-bus@480 {
 745                 #address-cells = <1>;
 746                 #size-cells = <0>;
 747                 #interrupt-cells = <1>;
 748
 749                 reg = <0x480 0x40>;
 750                 compatible = "aspeed,ast2500-i2c-bus";
 751                 clocks = <&syscon ASPEED_CLK_APB>;
 752                 resets = <&syscon ASPEED_RESET_I2C>;
 753                 bus-frequency = <100000>;
 754                 interrupts = <13>;
 755                 interrupt-parent = <&i2c_ic>;
 756                 pinctrl-names = "default";
 757                 pinctrl-0 = <&pinctrl_i2c14_default>;
 758                 status = "disabled";
 759         };
 760 };
 761
 762 &pinctrl {
 763         pinctrl_acpi_default: acpi_default {
 764                 function = "ACPI";
 765                 groups = "ACPI";
 766         };
 767
 768         pinctrl_adc0_default: adc0_default {
 769                 function = "ADC0";
 770                 groups = "ADC0";
 771         };
 772
 773         pinctrl_adc1_default: adc1_default {
 774                 function = "ADC1";
 775                 groups = "ADC1";
 776         };
 777
 778         pinctrl_adc10_default: adc10_default {
 779                 function = "ADC10";
 780                 groups = "ADC10";
 781         };
 782
 783         pinctrl_adc11_default: adc11_default {
 784                 function = "ADC11";
 785                 groups = "ADC11";
 786         };
 787
 788         pinctrl_adc12_default: adc12_default {
 789                 function = "ADC12";
 790                 groups = "ADC12";
 791         };
 792
 793         pinctrl_adc13_default: adc13_default {
 794                 function = "ADC13";
 795                 groups = "ADC13";
 796         };
 797
 798         pinctrl_adc14_default: adc14_default {
 799                 function = "ADC14";
 800                 groups = "ADC14";
 801         };
 802
 803         pinctrl_adc15_default: adc15_default {
 804                 function = "ADC15";
 805                 groups = "ADC15";
 806         };
 807
 808         pinctrl_adc2_default: adc2_default {
 809                 function = "ADC2";
 810                 groups = "ADC2";
 811         };
 812
 813         pinctrl_adc3_default: adc3_default {
 814                 function = "ADC3";
 815                 groups = "ADC3";
 816         };
 817
 818         pinctrl_adc4_default: adc4_default {
 819                 function = "ADC4";
 820                 groups = "ADC4";
 821         };
 822
 823         pinctrl_adc5_default: adc5_default {
 824                 function = "ADC5";
 825                 groups = "ADC5";
 826         };
 827
 828         pinctrl_adc6_default: adc6_default {
 829                 function = "ADC6";
 830                 groups = "ADC6";
 831         };
 832
 833         pinctrl_adc7_default: adc7_default {
 834                 function = "ADC7";
 835                 groups = "ADC7";
 836         };
 837
 838         pinctrl_adc8_default: adc8_default {
 839                 function = "ADC8";
 840                 groups = "ADC8";
 841         };
 842
 843         pinctrl_adc9_default: adc9_default {
 844                 function = "ADC9";
 845                 groups = "ADC9";
 846         };
 847
 848         pinctrl_bmcint_default: bmcint_default {
 849                 function = "BMCINT";
 850                 groups = "BMCINT";
 851         };
 852
 853         pinctrl_ddcclk_default: ddcclk_default {
 854                 function = "DDCCLK";
 855                 groups = "DDCCLK";
 856         };
 857
 858         pinctrl_ddcdat_default: ddcdat_default {
 859                 function = "DDCDAT";
 860                 groups = "DDCDAT";
 861         };
 862
 863         pinctrl_espi_default: espi_default {
 864                 function = "ESPI";
 865                 groups = "ESPI";
 866         };
 867
 868         pinctrl_fwspics1_default: fwspics1_default {
 869                 function = "FWSPICS1";
 870                 groups = "FWSPICS1";
 871         };
 872
 873         pinctrl_fwspics2_default: fwspics2_default {
 874                 function = "FWSPICS2";
 875                 groups = "FWSPICS2";
 876         };
 877
 878         pinctrl_gpid0_default: gpid0_default {
 879                 function = "GPID0";
 880                 groups = "GPID0";
 881         };
 882
 883         pinctrl_gpid2_default: gpid2_default {
 884                 function = "GPID2";
 885                 groups = "GPID2";
 886         };
 887
 888         pinctrl_gpid4_default: gpid4_default {
 889                 function = "GPID4";
 890                 groups = "GPID4";
 891         };
 892
 893         pinctrl_gpid6_default: gpid6_default {
 894                 function = "GPID6";
 895                 groups = "GPID6";
 896         };
 897
 898         pinctrl_gpie0_default: gpie0_default {
 899                 function = "GPIE0";
 900                 groups = "GPIE0";
 901         };
 902
 903         pinctrl_gpie2_default: gpie2_default {
 904                 function = "GPIE2";
 905                 groups = "GPIE2";
 906         };
 907
 908         pinctrl_gpie4_default: gpie4_default {
 909                 function = "GPIE4";
 910                 groups = "GPIE4";
 911         };
 912
 913         pinctrl_gpie6_default: gpie6_default {
 914                 function = "GPIE6";
 915                 groups = "GPIE6";
 916         };
 917
 918         pinctrl_i2c10_default: i2c10_default {
 919                 function = "I2C10";
 920                 groups = "I2C10";
 921         };
 922
 923         pinctrl_i2c11_default: i2c11_default {
 924                 function = "I2C11";
 925                 groups = "I2C11";
 926         };
 927
 928         pinctrl_i2c12_default: i2c12_default {
 929                 function = "I2C12";
 930                 groups = "I2C12";
 931         };
 932
 933         pinctrl_i2c13_default: i2c13_default {
 934                 function = "I2C13";
 935                 groups = "I2C13";
 936         };
 937
 938         pinctrl_i2c14_default: i2c14_default {
 939                 function = "I2C14";
 940                 groups = "I2C14";
 941         };
 942
 943         pinctrl_i2c3_default: i2c3_default {
 944                 function = "I2C3";
 945                 groups = "I2C3";
 946         };
 947
 948         pinctrl_i2c4_default: i2c4_default {
 949                 function = "I2C4";
 950                 groups = "I2C4";
 951         };
 952
 953         pinctrl_i2c5_default: i2c5_default {
 954                 function = "I2C5";
 955                 groups = "I2C5";
 956         };
 957
 958         pinctrl_i2c6_default: i2c6_default {
 959                 function = "I2C6";
 960                 groups = "I2C6";
 961         };
 962
 963         pinctrl_i2c7_default: i2c7_default {
 964                 function = "I2C7";
 965                 groups = "I2C7";
 966         };
 967
 968         pinctrl_i2c8_default: i2c8_default {
 969                 function = "I2C8";
 970                 groups = "I2C8";
 971         };
 972
 973         pinctrl_i2c9_default: i2c9_default {
 974                 function = "I2C9";
 975                 groups = "I2C9";
 976         };
 977
 978         pinctrl_lad0_default: lad0_default {
 979                 function = "LAD0";
 980                 groups = "LAD0";
 981         };
 982
 983         pinctrl_lad1_default: lad1_default {
 984                 function = "LAD1";
 985                 groups = "LAD1";
 986         };
 987
 988         pinctrl_lad2_default: lad2_default {
 989                 function = "LAD2";
 990                 groups = "LAD2";
 991         };
 992
 993         pinctrl_lad3_default: lad3_default {
 994                 function = "LAD3";
 995                 groups = "LAD3";
 996         };
 997
 998         pinctrl_lclk_default: lclk_default {
 999                 function = "LCLK";
1000                 groups = "LCLK";
1001         };
1002
1003         pinctrl_lframe_default: lframe_default {
1004                 function = "LFRAME";
1005                 groups = "LFRAME";
1006         };
1007
1008         pinctrl_lpchc_default: lpchc_default {
1009                 function = "LPCHC";
1010                 groups = "LPCHC";
1011         };
1012
1013         pinctrl_lpcpd_default: lpcpd_default {
1014                 function = "LPCPD";
1015                 groups = "LPCPD";
1016         };
1017
1018         pinctrl_lpcplus_default: lpcplus_default {
1019                 function = "LPCPLUS";
1020                 groups = "LPCPLUS";
1021         };
1022
1023         pinctrl_lpcpme_default: lpcpme_default {
1024                 function = "LPCPME";
1025                 groups = "LPCPME";
1026         };
1027
1028         pinctrl_lpcrst_default: lpcrst_default {
1029                 function = "LPCRST";
1030                 groups = "LPCRST";
1031         };
1032
1033         pinctrl_lpcsmi_default: lpcsmi_default {
1034                 function = "LPCSMI";
1035                 groups = "LPCSMI";
1036         };
1037
1038         pinctrl_lsirq_default: lsirq_default {
1039                 function = "LSIRQ";
1040                 groups = "LSIRQ";
1041         };
1042
1043         pinctrl_mac1link_default: mac1link_default {
1044                 function = "MAC1LINK";
1045                 groups = "MAC1LINK";
1046         };
1047
1048         pinctrl_mac2link_default: mac2link_default {
1049                 function = "MAC2LINK";
1050                 groups = "MAC2LINK";
1051         };
1052
1053         pinctrl_mdio1_default: mdio1_default {
1054                 function = "MDIO1";
1055                 groups = "MDIO1";
1056         };
1057
1058         pinctrl_mdio2_default: mdio2_default {
1059                 function = "MDIO2";
1060                 groups = "MDIO2";
1061         };
1062
1063         pinctrl_ncts1_default: ncts1_default {
1064                 function = "NCTS1";
1065                 groups = "NCTS1";
1066         };
1067
1068         pinctrl_ncts2_default: ncts2_default {
1069                 function = "NCTS2";
1070                 groups = "NCTS2";
1071         };
1072
1073         pinctrl_ncts3_default: ncts3_default {
1074                 function = "NCTS3";
1075                 groups = "NCTS3";
1076         };
1077
1078         pinctrl_ncts4_default: ncts4_default {
1079                 function = "NCTS4";
1080                 groups = "NCTS4";
1081         };
1082
1083         pinctrl_ndcd1_default: ndcd1_default {
1084                 function = "NDCD1";
1085                 groups = "NDCD1";
1086         };
1087
1088         pinctrl_ndcd2_default: ndcd2_default {
1089                 function = "NDCD2";
1090                 groups = "NDCD2";
1091         };
1092
1093         pinctrl_ndcd3_default: ndcd3_default {
1094                 function = "NDCD3";
1095                 groups = "NDCD3";
1096         };
1097
1098         pinctrl_ndcd4_default: ndcd4_default {
1099                 function = "NDCD4";
1100                 groups = "NDCD4";
1101         };
1102
1103         pinctrl_ndsr1_default: ndsr1_default {
1104                 function = "NDSR1";
1105                 groups = "NDSR1";
1106         };
1107
1108         pinctrl_ndsr2_default: ndsr2_default {
1109                 function = "NDSR2";
1110                 groups = "NDSR2";
1111         };
1112
1113         pinctrl_ndsr3_default: ndsr3_default {
1114                 function = "NDSR3";
1115                 groups = "NDSR3";
1116         };
1117
1118         pinctrl_ndsr4_default: ndsr4_default {
1119                 function = "NDSR4";
1120                 groups = "NDSR4";
1121         };
1122
1123         pinctrl_ndtr1_default: ndtr1_default {
1124                 function = "NDTR1";
1125                 groups = "NDTR1";
1126         };
1127
1128         pinctrl_ndtr2_default: ndtr2_default {
1129                 function = "NDTR2";
1130                 groups = "NDTR2";
1131         };
1132
1133         pinctrl_ndtr3_default: ndtr3_default {
1134                 function = "NDTR3";
1135                 groups = "NDTR3";
1136         };
1137
1138         pinctrl_ndtr4_default: ndtr4_default {
1139                 function = "NDTR4";
1140                 groups = "NDTR4";
1141         };
1142
1143         pinctrl_nri1_default: nri1_default {
1144                 function = "NRI1";
1145                 groups = "NRI1";
1146         };
1147
1148         pinctrl_nri2_default: nri2_default {
1149                 function = "NRI2";
1150                 groups = "NRI2";
1151         };
1152
1153         pinctrl_nri3_default: nri3_default {
1154                 function = "NRI3";
1155                 groups = "NRI3";
1156         };
1157
1158         pinctrl_nri4_default: nri4_default {
1159                 function = "NRI4";
1160                 groups = "NRI4";
1161         };
1162
1163         pinctrl_nrts1_default: nrts1_default {
1164                 function = "NRTS1";
1165                 groups = "NRTS1";
1166         };
1167
1168         pinctrl_nrts2_default: nrts2_default {
1169                 function = "NRTS2";
1170                 groups = "NRTS2";
1171         };
1172
1173         pinctrl_nrts3_default: nrts3_default {
1174                 function = "NRTS3";
1175                 groups = "NRTS3";
1176         };
1177
1178         pinctrl_nrts4_default: nrts4_default {
1179                 function = "NRTS4";
1180                 groups = "NRTS4";
1181         };
1182
1183         pinctrl_oscclk_default: oscclk_default {
1184                 function = "OSCCLK";
1185                 groups = "OSCCLK";
1186         };
1187
1188         pinctrl_pewake_default: pewake_default {
1189                 function = "PEWAKE";
1190                 groups = "PEWAKE";
1191         };
1192
1193         pinctrl_pnor_default: pnor_default {
1194                 function = "PNOR";
1195                 groups = "PNOR";
1196         };
1197
1198         pinctrl_pwm0_default: pwm0_default {
1199                 function = "PWM0";
1200                 groups = "PWM0";
1201         };
1202
1203         pinctrl_pwm1_default: pwm1_default {
1204                 function = "PWM1";
1205                 groups = "PWM1";
1206         };
1207
1208         pinctrl_pwm2_default: pwm2_default {
1209                 function = "PWM2";
1210                 groups = "PWM2";
1211         };
1212
1213         pinctrl_pwm3_default: pwm3_default {
1214                 function = "PWM3";
1215                 groups = "PWM3";
1216         };
1217
1218         pinctrl_pwm4_default: pwm4_default {
1219                 function = "PWM4";
1220                 groups = "PWM4";
1221         };
1222
1223         pinctrl_pwm5_default: pwm5_default {
1224                 function = "PWM5";
1225                 groups = "PWM5";
1226         };
1227
1228         pinctrl_pwm6_default: pwm6_default {
1229                 function = "PWM6";
1230                 groups = "PWM6";
1231         };
1232
1233         pinctrl_pwm7_default: pwm7_default {
1234                 function = "PWM7";
1235                 groups = "PWM7";
1236         };
1237
1238         pinctrl_rgmii1_default: rgmii1_default {
1239                 function = "RGMII1";
1240                 groups = "RGMII1";
1241         };
1242
1243         pinctrl_rgmii2_default: rgmii2_default {
1244                 function = "RGMII2";
1245                 groups = "RGMII2";
1246         };
1247
1248         pinctrl_rmii1_default: rmii1_default {
1249                 function = "RMII1";
1250                 groups = "RMII1";
1251         };
1252
1253         pinctrl_rmii2_default: rmii2_default {
1254                 function = "RMII2";
1255                 groups = "RMII2";
1256         };
1257
1258         pinctrl_rxd1_default: rxd1_default {
1259                 function = "RXD1";
1260                 groups = "RXD1";
1261         };
1262
1263         pinctrl_rxd2_default: rxd2_default {
1264                 function = "RXD2";
1265                 groups = "RXD2";
1266         };
1267
1268         pinctrl_rxd3_default: rxd3_default {
1269                 function = "RXD3";
1270                 groups = "RXD3";
1271         };
1272
1273         pinctrl_rxd4_default: rxd4_default {
1274                 function = "RXD4";
1275                 groups = "RXD4";
1276         };
1277
1278         pinctrl_salt1_default: salt1_default {
1279                 function = "SALT1";
1280                 groups = "SALT1";
1281         };
1282
1283         pinctrl_salt10_default: salt10_default {
1284                 function = "SALT10";
1285                 groups = "SALT10";
1286         };
1287
1288         pinctrl_salt11_default: salt11_default {
1289                 function = "SALT11";
1290                 groups = "SALT11";
1291         };
1292
1293         pinctrl_salt12_default: salt12_default {
1294                 function = "SALT12";
1295                 groups = "SALT12";
1296         };
1297
1298         pinctrl_salt13_default: salt13_default {
1299                 function = "SALT13";
1300                 groups = "SALT13";
1301         };
1302
1303         pinctrl_salt14_default: salt14_default {
1304                 function = "SALT14";
1305                 groups = "SALT14";
1306         };
1307
1308         pinctrl_salt2_default: salt2_default {
1309                 function = "SALT2";
1310                 groups = "SALT2";
1311         };
1312
1313         pinctrl_salt3_default: salt3_default {
1314                 function = "SALT3";
1315                 groups = "SALT3";
1316         };
1317
1318         pinctrl_salt4_default: salt4_default {
1319                 function = "SALT4";
1320                 groups = "SALT4";
1321         };
1322
1323         pinctrl_salt5_default: salt5_default {
1324                 function = "SALT5";
1325                 groups = "SALT5";
1326         };
1327
1328         pinctrl_salt6_default: salt6_default {
1329                 function = "SALT6";
1330                 groups = "SALT6";
1331         };
1332
1333         pinctrl_salt7_default: salt7_default {
1334                 function = "SALT7";
1335                 groups = "SALT7";
1336         };
1337
1338         pinctrl_salt8_default: salt8_default {
1339                 function = "SALT8";
1340                 groups = "SALT8";
1341         };
1342
1343         pinctrl_salt9_default: salt9_default {
1344                 function = "SALT9";
1345                 groups = "SALT9";
1346         };
1347
1348         pinctrl_scl1_default: scl1_default {
1349                 function = "SCL1";
1350                 groups = "SCL1";
1351         };
1352
1353         pinctrl_scl2_default: scl2_default {
1354                 function = "SCL2";
1355                 groups = "SCL2";
1356         };
1357
1358         pinctrl_sd1_default: sd1_default {
1359                 function = "SD1";
1360                 groups = "SD1";
1361         };
1362
1363         pinctrl_sd2_default: sd2_default {
1364                 function = "SD2";
1365                 groups = "SD2";
1366         };
1367
1368         pinctrl_sda1_default: sda1_default {
1369                 function = "SDA1";
1370                 groups = "SDA1";
1371         };
1372
1373         pinctrl_sda2_default: sda2_default {
1374                 function = "SDA2";
1375                 groups = "SDA2";
1376         };
1377
1378         pinctrl_sgpm_default: sgpm_default {
1379                 function = "SGPM";
1380                 groups = "SGPM";
1381         };
1382
1383         pinctrl_sgps1_default: sgps1_default {
1384                 function = "SGPS1";
1385                 groups = "SGPS1";
1386         };
1387
1388         pinctrl_sgps2_default: sgps2_default {
1389                 function = "SGPS2";
1390                 groups = "SGPS2";
1391         };
1392
1393         pinctrl_sioonctrl_default: sioonctrl_default {
1394                 function = "SIOONCTRL";
1395                 groups = "SIOONCTRL";
1396         };
1397
1398         pinctrl_siopbi_default: siopbi_default {
1399                 function = "SIOPBI";
1400                 groups = "SIOPBI";
1401         };
1402
1403         pinctrl_siopbo_default: siopbo_default {
1404                 function = "SIOPBO";
1405                 groups = "SIOPBO";
1406         };
1407
1408         pinctrl_siopwreq_default: siopwreq_default {
1409                 function = "SIOPWREQ";
1410                 groups = "SIOPWREQ";
1411         };
1412
1413         pinctrl_siopwrgd_default: siopwrgd_default {
1414                 function = "SIOPWRGD";
1415                 groups = "SIOPWRGD";
1416         };
1417
1418         pinctrl_sios3_default: sios3_default {
1419                 function = "SIOS3";
1420                 groups = "SIOS3";
1421         };
1422
1423         pinctrl_sios5_default: sios5_default {
1424                 function = "SIOS5";
1425                 groups = "SIOS5";
1426         };
1427
1428         pinctrl_siosci_default: siosci_default {
1429                 function = "SIOSCI";
1430                 groups = "SIOSCI";
1431         };
1432
1433         pinctrl_spi1_default: spi1_default {
1434                 function = "SPI1";
1435                 groups = "SPI1";
1436         };
1437
1438         pinctrl_spi1cs1_default: spi1cs1_default {
1439                 function = "SPI1CS1";
1440                 groups = "SPI1CS1";
1441         };
1442
1443         pinctrl_spi1debug_default: spi1debug_default {
1444                 function = "SPI1DEBUG";
1445                 groups = "SPI1DEBUG";
1446         };
1447
1448         pinctrl_spi1passthru_default: spi1passthru_default {
1449                 function = "SPI1PASSTHRU";
1450                 groups = "SPI1PASSTHRU";
1451         };
1452
1453         pinctrl_spi2ck_default: spi2ck_default {
1454                 function = "SPI2CK";
1455                 groups = "SPI2CK";
1456         };
1457
1458         pinctrl_spi2cs0_default: spi2cs0_default {
1459                 function = "SPI2CS0";
1460                 groups = "SPI2CS0";
1461         };
1462
1463         pinctrl_spi2cs1_default: spi2cs1_default {
1464                 function = "SPI2CS1";
1465                 groups = "SPI2CS1";
1466         };
1467
1468         pinctrl_spi2miso_default: spi2miso_default {
1469                 function = "SPI2MISO";
1470                 groups = "SPI2MISO";
1471         };
1472
1473         pinctrl_spi2mosi_default: spi2mosi_default {
1474                 function = "SPI2MOSI";
1475                 groups = "SPI2MOSI";
1476         };
1477
1478         pinctrl_timer3_default: timer3_default {
1479                 function = "TIMER3";
1480                 groups = "TIMER3";
1481         };
1482
1483         pinctrl_timer4_default: timer4_default {
1484                 function = "TIMER4";
1485                 groups = "TIMER4";
1486         };
1487
1488         pinctrl_timer5_default: timer5_default {
1489                 function = "TIMER5";
1490                 groups = "TIMER5";
1491         };
1492
1493         pinctrl_timer6_default: timer6_default {
1494                 function = "TIMER6";
1495                 groups = "TIMER6";
1496         };
1497
1498         pinctrl_timer7_default: timer7_default {
1499                 function = "TIMER7";
1500                 groups = "TIMER7";
1501         };
1502
1503         pinctrl_timer8_default: timer8_default {
1504                 function = "TIMER8";
1505                 groups = "TIMER8";
1506         };
1507
1508         pinctrl_txd1_default: txd1_default {
1509                 function = "TXD1";
1510                 groups = "TXD1";
1511         };
1512
1513         pinctrl_txd2_default: txd2_default {
1514                 function = "TXD2";
1515                 groups = "TXD2";
1516         };
1517
1518         pinctrl_txd3_default: txd3_default {
1519                 function = "TXD3";
1520                 groups = "TXD3";
1521         };
1522
1523         pinctrl_txd4_default: txd4_default {
1524                 function = "TXD4";
1525                 groups = "TXD4";
1526         };
1527
1528         pinctrl_uart6_default: uart6_default {
1529                 function = "UART6";
1530                 groups = "UART6";
1531         };
1532
1533         pinctrl_usbcki_default: usbcki_default {
1534                 function = "USBCKI";
1535                 groups = "USBCKI";
1536         };
1537
1538         pinctrl_usb2ah_default: usb2ah_default {
1539                 function = "USB2AH";
1540                 groups = "USB2AH";
1541         };
1542
1543         pinctrl_usb2ad_default: usb2ad_default {
1544                 function = "USB2AD";
1545                 groups = "USB2AD";
1546         };
1547
1548         pinctrl_usb11bhid_default: usb11bhid_default {
1549                 function = "USB11BHID";
1550                 groups = "USB11BHID";
1551         };
1552
1553         pinctrl_usb2bh_default: usb2bh_default {
1554                 function = "USB2BH";
1555                 groups = "USB2BH";
1556         };
1557
1558         pinctrl_vgabiosrom_default: vgabiosrom_default {
1559                 function = "VGABIOSROM";
1560                 groups = "VGABIOSROM";
1561         };
1562
1563         pinctrl_vgahs_default: vgahs_default {
1564                 function = "VGAHS";
1565                 groups = "VGAHS";
1566         };
1567
1568         pinctrl_vgavs_default: vgavs_default {
1569                 function = "VGAVS";
1570                 groups = "VGAVS";
1571         };
1572
1573         pinctrl_vpi24_default: vpi24_default {
1574                 function = "VPI24";
1575                 groups = "VPI24";
1576         };
1577
1578         pinctrl_vpo_default: vpo_default {
1579                 function = "VPO";
1580                 groups = "VPO";
1581         };
1582
1583         pinctrl_wdtrst1_default: wdtrst1_default {
1584                 function = "WDTRST1";
1585                 groups = "WDTRST1";
1586         };
1587
1588         pinctrl_wdtrst2_default: wdtrst2_default {
1589                 function = "WDTRST2";
1590                 groups = "WDTRST2";
1591         };
1592 };