1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
6 compatible = "aspeed,ast2400";
9 interrupt-parent = <&vic>;
39 compatible = "arm,arm926ej-s";
46 device_type = "memory";
51 compatible = "simple-bus";
57 reg = < 0x1e620000 0x94
58 0x20000000 0x10000000 >;
61 compatible = "aspeed,ast2400-fmc";
62 clocks = <&syscon ASPEED_CLK_AHB>;
67 compatible = "jedec,spi-nor";
72 compatible = "jedec,spi-nor";
77 compatible = "jedec,spi-nor";
82 compatible = "jedec,spi-nor";
87 compatible = "jedec,spi-nor";
93 reg = < 0x1e630000 0x18
94 0x30000000 0x10000000 >;
97 compatible = "aspeed,ast2400-spi";
98 clocks = <&syscon ASPEED_CLK_AHB>;
102 compatible = "jedec,spi-nor";
107 vic: interrupt-controller@1e6c0080 {
108 compatible = "aspeed,ast2400-vic";
109 interrupt-controller;
110 #interrupt-cells = <1>;
111 valid-sources = <0xffffffff 0x0007ffff>;
112 reg = <0x1e6c0080 0x80>;
115 cvic: copro-interrupt-controller@1e6c2000 {
116 compatible = "aspeed,ast2400-cvic", "aspeed-cvic";
117 valid-sources = <0x7fffffff>;
118 reg = <0x1e6c2000 0x80>;
121 mac0: ethernet@1e660000 {
122 compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
123 reg = <0x1e660000 0x180>;
125 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
129 mac1: ethernet@1e680000 {
130 compatible = "aspeed,ast2400-mac", "faraday,ftgmac100";
131 reg = <0x1e680000 0x180>;
133 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
137 ehci0: usb@1e6a1000 {
138 compatible = "aspeed,ast2400-ehci", "generic-ehci";
139 reg = <0x1e6a1000 0x100>;
141 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_usb2h_default>;
148 compatible = "aspeed,ast2400-uhci", "generic-uhci";
149 reg = <0x1e6b0000 0x100>;
152 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
155 * No default pinmux, it will follow EHCI, use an explicit pinmux
156 * override if you don't enable EHCI
160 vhub: usb-vhub@1e6a0000 {
161 compatible = "aspeed,ast2400-usb-vhub";
162 reg = <0x1e6a0000 0x300>;
164 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_usb2d_default>;
171 compatible = "simple-bus";
172 #address-cells = <1>;
176 syscon: syscon@1e6e2000 {
177 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
178 reg = <0x1e6e2000 0x1a8>;
179 #address-cells = <1>;
185 compatible = "aspeed,g4-pinctrl";
189 compatible = "aspeed,ast2400-p2a-ctrl";
194 rng: hwrng@1e6e2078 {
195 compatible = "timeriomem_rng";
196 reg = <0x1e6e2078 0x4>;
202 compatible = "aspeed,ast2400-adc";
203 reg = <0x1e6e9000 0xb0>;
204 clocks = <&syscon ASPEED_CLK_APB>;
205 resets = <&syscon ASPEED_RESET_ADC>;
206 #io-channel-cells = <1>;
210 sram: sram@1e720000 {
211 compatible = "mmio-sram";
212 reg = <0x1e720000 0x8000>; // 32K
215 sdmmc: sd-controller@1e740000 {
216 compatible = "aspeed,ast2400-sd-controller";
217 reg = <0x1e740000 0x100>;
218 #address-cells = <1>;
220 ranges = <0 0x1e740000 0x10000>;
221 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
225 compatible = "aspeed,ast2400-sdhci";
229 clocks = <&syscon ASPEED_CLK_SDIO>;
234 compatible = "aspeed,ast2400-sdhci";
238 clocks = <&syscon ASPEED_CLK_SDIO>;
243 gpio: gpio@1e780000 {
246 compatible = "aspeed,ast2400-gpio";
247 reg = <0x1e780000 0x1000>;
249 gpio-ranges = <&pinctrl 0 0 220>;
250 clocks = <&syscon ASPEED_CLK_APB>;
251 interrupt-controller;
252 #interrupt-cells = <2>;
255 timer: timer@1e782000 {
256 /* This timer is a Faraday FTTMR010 derivative */
257 compatible = "aspeed,ast2400-timer";
258 reg = <0x1e782000 0x90>;
259 interrupts = <16 17 18 35 36 37 38 39>;
260 clocks = <&syscon ASPEED_CLK_APB>;
261 clock-names = "PCLK";
265 compatible = "aspeed,ast2400-rtc";
266 reg = <0x1e781000 0x18>;
270 uart1: serial@1e783000 {
271 compatible = "ns16550a";
272 reg = <0x1e783000 0x20>;
275 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
276 resets = <&lpc_reset 4>;
281 uart5: serial@1e784000 {
282 compatible = "ns16550a";
283 reg = <0x1e784000 0x20>;
286 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
291 wdt1: watchdog@1e785000 {
292 compatible = "aspeed,ast2400-wdt";
293 reg = <0x1e785000 0x1c>;
294 clocks = <&syscon ASPEED_CLK_APB>;
297 wdt2: watchdog@1e785020 {
298 compatible = "aspeed,ast2400-wdt";
299 reg = <0x1e785020 0x1c>;
300 clocks = <&syscon ASPEED_CLK_APB>;
303 pwm_tacho: pwm-tacho-controller@1e786000 {
304 compatible = "aspeed,ast2400-pwm-tacho";
305 #address-cells = <1>;
307 reg = <0x1e786000 0x1000>;
308 clocks = <&syscon ASPEED_CLK_24M>;
309 resets = <&syscon ASPEED_RESET_PWM>;
313 vuart: serial@1e787000 {
314 compatible = "aspeed,ast2400-vuart";
315 reg = <0x1e787000 0x40>;
318 clocks = <&syscon ASPEED_CLK_APB>;
324 compatible = "aspeed,ast2400-lpc", "simple-mfd";
325 reg = <0x1e789000 0x1000>;
327 #address-cells = <1>;
329 ranges = <0x0 0x1e789000 0x1000>;
332 compatible = "aspeed,ast2400-lpc-bmc";
336 lpc_host: lpc-host@80 {
337 compatible = "aspeed,ast2400-lpc-host", "simple-mfd", "syscon";
341 #address-cells = <1>;
343 ranges = <0x0 0x80 0x1e0>;
345 lpc_ctrl: lpc-ctrl@0 {
346 compatible = "aspeed,ast2400-lpc-ctrl";
348 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
352 lpc_snoop: lpc-snoop@0 {
353 compatible = "aspeed,ast2400-lpc-snoop";
360 compatible = "aspeed,ast2400-lhc";
361 reg = <0x20 0x24 0x48 0x8>;
364 lpc_reset: reset-controller@18 {
365 compatible = "aspeed,ast2400-lpc-reset";
371 compatible = "aspeed,ast2400-ibt-bmc";
374 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
380 uart2: serial@1e78d000 {
381 compatible = "ns16550a";
382 reg = <0x1e78d000 0x20>;
385 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
386 resets = <&lpc_reset 5>;
391 uart3: serial@1e78e000 {
392 compatible = "ns16550a";
393 reg = <0x1e78e000 0x20>;
396 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
397 resets = <&lpc_reset 6>;
402 uart4: serial@1e78f000 {
403 compatible = "ns16550a";
404 reg = <0x1e78f000 0x20>;
407 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
408 resets = <&lpc_reset 7>;
414 compatible = "simple-bus";
415 #address-cells = <1>;
417 ranges = <0 0x1e78a000 0x1000>;
424 i2c_ic: interrupt-controller@0 {
425 #interrupt-cells = <1>;
426 compatible = "aspeed,ast2400-i2c-ic";
429 interrupt-controller;
433 #address-cells = <1>;
435 #interrupt-cells = <1>;
438 compatible = "aspeed,ast2400-i2c-bus";
439 clocks = <&syscon ASPEED_CLK_APB>;
440 resets = <&syscon ASPEED_RESET_I2C>;
441 bus-frequency = <100000>;
443 interrupt-parent = <&i2c_ic>;
445 /* Does not need pinctrl properties */
449 #address-cells = <1>;
451 #interrupt-cells = <1>;
454 compatible = "aspeed,ast2400-i2c-bus";
455 clocks = <&syscon ASPEED_CLK_APB>;
456 resets = <&syscon ASPEED_RESET_I2C>;
457 bus-frequency = <100000>;
459 interrupt-parent = <&i2c_ic>;
461 /* Does not need pinctrl properties */
465 #address-cells = <1>;
467 #interrupt-cells = <1>;
470 compatible = "aspeed,ast2400-i2c-bus";
471 clocks = <&syscon ASPEED_CLK_APB>;
472 resets = <&syscon ASPEED_RESET_I2C>;
473 bus-frequency = <100000>;
475 interrupt-parent = <&i2c_ic>;
476 pinctrl-names = "default";
477 pinctrl-0 = <&pinctrl_i2c3_default>;
482 #address-cells = <1>;
484 #interrupt-cells = <1>;
487 compatible = "aspeed,ast2400-i2c-bus";
488 clocks = <&syscon ASPEED_CLK_APB>;
489 resets = <&syscon ASPEED_RESET_I2C>;
490 bus-frequency = <100000>;
492 interrupt-parent = <&i2c_ic>;
493 pinctrl-names = "default";
494 pinctrl-0 = <&pinctrl_i2c4_default>;
499 #address-cells = <1>;
501 #interrupt-cells = <1>;
504 compatible = "aspeed,ast2400-i2c-bus";
505 clocks = <&syscon ASPEED_CLK_APB>;
506 resets = <&syscon ASPEED_RESET_I2C>;
507 bus-frequency = <100000>;
509 interrupt-parent = <&i2c_ic>;
510 pinctrl-names = "default";
511 pinctrl-0 = <&pinctrl_i2c5_default>;
516 #address-cells = <1>;
518 #interrupt-cells = <1>;
521 compatible = "aspeed,ast2400-i2c-bus";
522 clocks = <&syscon ASPEED_CLK_APB>;
523 resets = <&syscon ASPEED_RESET_I2C>;
524 bus-frequency = <100000>;
526 interrupt-parent = <&i2c_ic>;
527 pinctrl-names = "default";
528 pinctrl-0 = <&pinctrl_i2c6_default>;
533 #address-cells = <1>;
535 #interrupt-cells = <1>;
538 compatible = "aspeed,ast2400-i2c-bus";
539 clocks = <&syscon ASPEED_CLK_APB>;
540 resets = <&syscon ASPEED_RESET_I2C>;
541 bus-frequency = <100000>;
543 interrupt-parent = <&i2c_ic>;
544 pinctrl-names = "default";
545 pinctrl-0 = <&pinctrl_i2c7_default>;
550 #address-cells = <1>;
552 #interrupt-cells = <1>;
555 compatible = "aspeed,ast2400-i2c-bus";
556 clocks = <&syscon ASPEED_CLK_APB>;
557 resets = <&syscon ASPEED_RESET_I2C>;
558 bus-frequency = <100000>;
560 interrupt-parent = <&i2c_ic>;
561 pinctrl-names = "default";
562 pinctrl-0 = <&pinctrl_i2c8_default>;
567 #address-cells = <1>;
569 #interrupt-cells = <1>;
572 compatible = "aspeed,ast2400-i2c-bus";
573 clocks = <&syscon ASPEED_CLK_APB>;
574 resets = <&syscon ASPEED_RESET_I2C>;
575 bus-frequency = <100000>;
577 interrupt-parent = <&i2c_ic>;
578 pinctrl-names = "default";
579 pinctrl-0 = <&pinctrl_i2c9_default>;
584 #address-cells = <1>;
586 #interrupt-cells = <1>;
589 compatible = "aspeed,ast2400-i2c-bus";
590 clocks = <&syscon ASPEED_CLK_APB>;
591 resets = <&syscon ASPEED_RESET_I2C>;
592 bus-frequency = <100000>;
594 interrupt-parent = <&i2c_ic>;
595 pinctrl-names = "default";
596 pinctrl-0 = <&pinctrl_i2c10_default>;
601 #address-cells = <1>;
603 #interrupt-cells = <1>;
606 compatible = "aspeed,ast2400-i2c-bus";
607 clocks = <&syscon ASPEED_CLK_APB>;
608 resets = <&syscon ASPEED_RESET_I2C>;
609 bus-frequency = <100000>;
611 interrupt-parent = <&i2c_ic>;
612 pinctrl-names = "default";
613 pinctrl-0 = <&pinctrl_i2c11_default>;
618 #address-cells = <1>;
620 #interrupt-cells = <1>;
623 compatible = "aspeed,ast2400-i2c-bus";
624 clocks = <&syscon ASPEED_CLK_APB>;
625 resets = <&syscon ASPEED_RESET_I2C>;
626 bus-frequency = <100000>;
628 interrupt-parent = <&i2c_ic>;
629 pinctrl-names = "default";
630 pinctrl-0 = <&pinctrl_i2c12_default>;
635 #address-cells = <1>;
637 #interrupt-cells = <1>;
640 compatible = "aspeed,ast2400-i2c-bus";
641 clocks = <&syscon ASPEED_CLK_APB>;
642 resets = <&syscon ASPEED_RESET_I2C>;
643 bus-frequency = <100000>;
645 interrupt-parent = <&i2c_ic>;
646 pinctrl-names = "default";
647 pinctrl-0 = <&pinctrl_i2c13_default>;
652 #address-cells = <1>;
654 #interrupt-cells = <1>;
657 compatible = "aspeed,ast2400-i2c-bus";
658 clocks = <&syscon ASPEED_CLK_APB>;
659 resets = <&syscon ASPEED_RESET_I2C>;
660 bus-frequency = <100000>;
662 interrupt-parent = <&i2c_ic>;
663 pinctrl-names = "default";
664 pinctrl-0 = <&pinctrl_i2c14_default>;
670 pinctrl_acpi_default: acpi_default {
675 pinctrl_adc0_default: adc0_default {
680 pinctrl_adc1_default: adc1_default {
685 pinctrl_adc10_default: adc10_default {
690 pinctrl_adc11_default: adc11_default {
695 pinctrl_adc12_default: adc12_default {
700 pinctrl_adc13_default: adc13_default {
705 pinctrl_adc14_default: adc14_default {
710 pinctrl_adc15_default: adc15_default {
715 pinctrl_adc2_default: adc2_default {
720 pinctrl_adc3_default: adc3_default {
725 pinctrl_adc4_default: adc4_default {
730 pinctrl_adc5_default: adc5_default {
735 pinctrl_adc6_default: adc6_default {
740 pinctrl_adc7_default: adc7_default {
745 pinctrl_adc8_default: adc8_default {
750 pinctrl_adc9_default: adc9_default {
755 pinctrl_bmcint_default: bmcint_default {
760 pinctrl_ddcclk_default: ddcclk_default {
765 pinctrl_ddcdat_default: ddcdat_default {
770 pinctrl_extrst_default: extrst_default {
775 pinctrl_flack_default: flack_default {
780 pinctrl_flbusy_default: flbusy_default {
785 pinctrl_flwp_default: flwp_default {
790 pinctrl_gpid_default: gpid_default {
795 pinctrl_gpid0_default: gpid0_default {
800 pinctrl_gpid2_default: gpid2_default {
805 pinctrl_gpid4_default: gpid4_default {
810 pinctrl_gpid6_default: gpid6_default {
815 pinctrl_gpie0_default: gpie0_default {
820 pinctrl_gpie2_default: gpie2_default {
825 pinctrl_gpie4_default: gpie4_default {
830 pinctrl_gpie6_default: gpie6_default {
835 pinctrl_i2c10_default: i2c10_default {
840 pinctrl_i2c11_default: i2c11_default {
845 pinctrl_i2c12_default: i2c12_default {
850 pinctrl_i2c13_default: i2c13_default {
855 pinctrl_i2c14_default: i2c14_default {
860 pinctrl_i2c3_default: i2c3_default {
865 pinctrl_i2c4_default: i2c4_default {
870 pinctrl_i2c5_default: i2c5_default {
875 pinctrl_i2c6_default: i2c6_default {
880 pinctrl_i2c7_default: i2c7_default {
885 pinctrl_i2c8_default: i2c8_default {
890 pinctrl_i2c9_default: i2c9_default {
895 pinctrl_lpcpd_default: lpcpd_default {
900 pinctrl_lpcpme_default: lpcpme_default {
905 pinctrl_lpcrst_default: lpcrst_default {
910 pinctrl_lpcsmi_default: lpcsmi_default {
915 pinctrl_mac1link_default: mac1link_default {
916 function = "MAC1LINK";
920 pinctrl_mac2link_default: mac2link_default {
921 function = "MAC2LINK";
925 pinctrl_mdio1_default: mdio1_default {
930 pinctrl_mdio2_default: mdio2_default {
935 pinctrl_ncts1_default: ncts1_default {
940 pinctrl_ncts2_default: ncts2_default {
945 pinctrl_ncts3_default: ncts3_default {
950 pinctrl_ncts4_default: ncts4_default {
955 pinctrl_ndcd1_default: ndcd1_default {
960 pinctrl_ndcd2_default: ndcd2_default {
965 pinctrl_ndcd3_default: ndcd3_default {
970 pinctrl_ndcd4_default: ndcd4_default {
975 pinctrl_ndsr1_default: ndsr1_default {
980 pinctrl_ndsr2_default: ndsr2_default {
985 pinctrl_ndsr3_default: ndsr3_default {
990 pinctrl_ndsr4_default: ndsr4_default {
995 pinctrl_ndtr1_default: ndtr1_default {
1000 pinctrl_ndtr2_default: ndtr2_default {
1005 pinctrl_ndtr3_default: ndtr3_default {
1010 pinctrl_ndtr4_default: ndtr4_default {
1015 pinctrl_ndts4_default: ndts4_default {
1020 pinctrl_nri1_default: nri1_default {
1025 pinctrl_nri2_default: nri2_default {
1030 pinctrl_nri3_default: nri3_default {
1035 pinctrl_nri4_default: nri4_default {
1040 pinctrl_nrts1_default: nrts1_default {
1045 pinctrl_nrts2_default: nrts2_default {
1050 pinctrl_nrts3_default: nrts3_default {
1055 pinctrl_oscclk_default: oscclk_default {
1056 function = "OSCCLK";
1060 pinctrl_pwm0_default: pwm0_default {
1065 pinctrl_pwm1_default: pwm1_default {
1070 pinctrl_pwm2_default: pwm2_default {
1075 pinctrl_pwm3_default: pwm3_default {
1080 pinctrl_pwm4_default: pwm4_default {
1085 pinctrl_pwm5_default: pwm5_default {
1090 pinctrl_pwm6_default: pwm6_default {
1095 pinctrl_pwm7_default: pwm7_default {
1100 pinctrl_rgmii1_default: rgmii1_default {
1101 function = "RGMII1";
1105 pinctrl_rgmii2_default: rgmii2_default {
1106 function = "RGMII2";
1110 pinctrl_rmii1_default: rmii1_default {
1115 pinctrl_rmii2_default: rmii2_default {
1120 pinctrl_rom16_default: rom16_default {
1125 pinctrl_rom8_default: rom8_default {
1130 pinctrl_romcs1_default: romcs1_default {
1131 function = "ROMCS1";
1135 pinctrl_romcs2_default: romcs2_default {
1136 function = "ROMCS2";
1140 pinctrl_romcs3_default: romcs3_default {
1141 function = "ROMCS3";
1145 pinctrl_romcs4_default: romcs4_default {
1146 function = "ROMCS4";
1150 pinctrl_rxd1_default: rxd1_default {
1155 pinctrl_rxd2_default: rxd2_default {
1160 pinctrl_rxd3_default: rxd3_default {
1165 pinctrl_rxd4_default: rxd4_default {
1170 pinctrl_salt1_default: salt1_default {
1175 pinctrl_salt2_default: salt2_default {
1180 pinctrl_salt3_default: salt3_default {
1185 pinctrl_salt4_default: salt4_default {
1190 pinctrl_sd1_default: sd1_default {
1195 pinctrl_sd2_default: sd2_default {
1200 pinctrl_sgpmck_default: sgpmck_default {
1201 function = "SGPMCK";
1205 pinctrl_sgpmi_default: sgpmi_default {
1210 pinctrl_sgpmld_default: sgpmld_default {
1211 function = "SGPMLD";
1215 pinctrl_sgpmo_default: sgpmo_default {
1220 pinctrl_sgpsck_default: sgpsck_default {
1221 function = "SGPSCK";
1225 pinctrl_sgpsi0_default: sgpsi0_default {
1226 function = "SGPSI0";
1230 pinctrl_sgpsi1_default: sgpsi1_default {
1231 function = "SGPSI1";
1235 pinctrl_sgpsld_default: sgpsld_default {
1236 function = "SGPSLD";
1240 pinctrl_sioonctrl_default: sioonctrl_default {
1241 function = "SIOONCTRL";
1242 groups = "SIOONCTRL";
1245 pinctrl_siopbi_default: siopbi_default {
1246 function = "SIOPBI";
1250 pinctrl_siopbo_default: siopbo_default {
1251 function = "SIOPBO";
1255 pinctrl_siopwreq_default: siopwreq_default {
1256 function = "SIOPWREQ";
1257 groups = "SIOPWREQ";
1260 pinctrl_siopwrgd_default: siopwrgd_default {
1261 function = "SIOPWRGD";
1262 groups = "SIOPWRGD";
1265 pinctrl_sios3_default: sios3_default {
1270 pinctrl_sios5_default: sios5_default {
1275 pinctrl_siosci_default: siosci_default {
1276 function = "SIOSCI";
1280 pinctrl_spi1_default: spi1_default {
1285 pinctrl_spi1debug_default: spi1debug_default {
1286 function = "SPI1DEBUG";
1287 groups = "SPI1DEBUG";
1290 pinctrl_spi1passthru_default: spi1passthru_default {
1291 function = "SPI1PASSTHRU";
1292 groups = "SPI1PASSTHRU";
1295 pinctrl_spics1_default: spics1_default {
1296 function = "SPICS1";
1300 pinctrl_timer3_default: timer3_default {
1301 function = "TIMER3";
1305 pinctrl_timer4_default: timer4_default {
1306 function = "TIMER4";
1310 pinctrl_timer5_default: timer5_default {
1311 function = "TIMER5";
1315 pinctrl_timer6_default: timer6_default {
1316 function = "TIMER6";
1320 pinctrl_timer7_default: timer7_default {
1321 function = "TIMER7";
1325 pinctrl_timer8_default: timer8_default {
1326 function = "TIMER8";
1330 pinctrl_txd1_default: txd1_default {
1335 pinctrl_txd2_default: txd2_default {
1340 pinctrl_txd3_default: txd3_default {
1345 pinctrl_txd4_default: txd4_default {
1350 pinctrl_uart6_default: uart6_default {
1355 pinctrl_usbcki_default: usbcki_default {
1356 function = "USBCKI";
1360 pinctrl_usb2h_default: usb2h_default {
1361 function = "USB2H1";
1365 pinctrl_usb2d_default: usb2d_default {
1366 function = "USB2D1";
1370 pinctrl_vgabios_rom_default: vgabios_rom_default {
1371 function = "VGABIOS_ROM";
1372 groups = "VGABIOS_ROM";
1375 pinctrl_vgahs_default: vgahs_default {
1380 pinctrl_vgavs_default: vgavs_default {
1385 pinctrl_vpi18_default: vpi18_default {
1390 pinctrl_vpi24_default: vpi24_default {
1395 pinctrl_vpi30_default: vpi30_default {
1400 pinctrl_vpo12_default: vpo12_default {
1405 pinctrl_vpo24_default: vpo24_default {
1410 pinctrl_wdtrst1_default: wdtrst1_default {
1411 function = "WDTRST1";
1415 pinctrl_wdtrst2_default: wdtrst2_default {
1416 function = "WDTRST2";