1 // SPDX-License-Identifier: GPL-2.0+
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 model = "Tyan S8036 BMC";
10 compatible = "tyan,s8036-bmc", "aspeed,ast2500";
14 bootargs = "console=ttyS4,115200 earlycon";
18 device_type = "memory";
19 reg = <0x80000000 0x20000000>;
27 p2a_memory: region@987f0000 {
29 reg = <0x987f0000 0x00010000>; /* 64KB */
32 vga_memory: framebuffer@9f000000 {
34 reg = <0x9f000000 0x01000000>; /* 16M */
37 gfx_memory: framebuffer {
38 size = <0x01000000>; /* 16M */
39 alignment = <0x01000000>;
40 compatible = "shared-dma-pool";
46 compatible = "gpio-leds";
49 gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
53 gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
58 compatible = "iio-hwmon";
59 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
60 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
61 <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
62 <&adc 12>, <&adc 13>, <&adc 14>;
66 compatible = "iio-hwmon";
67 io-channels = <&adc 15>;
77 #include "openbmc-flash-layout.dtsi"
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_spi1_default>;
94 /* Rear RS-232 connector */
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_txd1_default
98 &pinctrl_rxd1_default>;
102 /* RS-232 connector on header */
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_txd2_default
106 &pinctrl_rxd2_default>;
110 /* Alternative to vuart to internally connect (route) to uart1
111 * when vuart cannot be used due to BIOS limitations.
117 /* Alternative to vuart to internally connect (route) to the
118 * external port usually used by uart1 when vuart cannot be
119 * used due to BIOS limitations.
125 /* BMC "debug" (console) UART; connected to RS-232 connector
126 * on header; selectable via jumpers as alternative to uart2
138 /* We enable the VUART here, but leave it in a state that does
139 * not interfere with the SuperIO. The goal is to have both the
140 * VUART and the SuperIO available and decide at runtime whether
141 * the VUART should actually be used. For that reason, configure
142 * an "invalid" IO address and an IRQ that is not used by the
145 aspeed,lpc-io-reg = <0xffff>;
146 aspeed,lpc-interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
155 memory-region = <&p2a_memory>;
160 snoop-ports = <0x80>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_pwm0_default
175 &pinctrl_pwm1_default
176 &pinctrl_pwm3_default
177 &pinctrl_pwm4_default>;
182 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
185 /* PWM group for chassis fans #1, #2, #3 and #4 */
188 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
193 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
198 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
203 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
206 /* PWM group for chassis fans #5 and #6 */
209 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
214 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
219 /* Directly connected to Sideband-Temperature Sensor Interface (APML) */
224 /* Directly connected to IPMB HDR. */
231 /* BMC EEPROM, incl. mainboard FRU */
233 compatible = "atmel,24c256";
236 /* Also connected to:
247 /* PSU1 FRU @ 0xA0 */
249 compatible = "atmel,24c02";
253 /* PSU2 FRU @ 0xA2 */
255 compatible = "atmel,24c02";
261 compatible = "pmbus";
267 compatible = "pmbus";
279 /* Hardware monitor with temperature sensors */
281 compatible = "nuvoton,nct7802";
283 #address-cells = <1>;
286 channel@0 { /* LTD */
291 channel@1 { /* RTD1 */
294 sensor-type = "temperature";
295 temperature-mode = "thermistor";
298 channel@2 { /* RTD2 */
301 sensor-type = "temperature";
302 temperature-mode = "thermistor";
305 channel@3 { /* RTD3 */
308 sensor-type = "temperature";
312 /* Also connected to:
345 pinctrl-names = "default";
346 pinctrl-0 = <&pinctrl_rmii1_default>;
351 pinctrl-names = "default";
352 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
361 aspeed,lpc-io-reg = <0xca8>;
366 aspeed,lpc-io-reg = <0xca2>;
369 /* Enable BMC VGA output to show an early (pre-BIOS) boot screen */
372 memory-region = <&gfx_memory>;
375 /* We're following the GPIO naming as defined at
376 * https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md.
378 * Notes on led-identify and id-button:
379 * - A physical button is connected to id-button which
380 * triggers the clock on a D flip-flop. The /Q output of the
381 * flip-flop drives its D input.
382 * - The flip-flop's Q output drives led-identify which is
384 * - With that, every button press toggles the LED between on and off.
386 * Notes on power-, reset- and nmi- button and control:
387 * - The -button signals can be used to monitor physical buttons.
388 * - The -control signals can be used to actuate the specific
390 * - In hardware, the -button signals are connected to the -control
391 * signals through drivers with the -control signals being
392 * protected through diodes.
399 /*A2*/ "led-identify", /* in/out: BMC_CHASSIS_ID_LED_L */
405 /*B0-B7*/ "","","","","","","","",
406 /*C0-C7*/ "","","","","","","","",
409 /*D2*/ "power-chassis-good", /* in: PWR_GOOD_LED -- Check if this is Z3?*/
410 /*D3*/ "platform-reset", /* in: RESET_LED_L */
415 /*E0*/ "power-button", /* in: BMC_SYS_MON_PWR_BTN_L */
416 /*E1*/ "power-chassis-control", /* out: BMC_ASSERT_PWR_BTN */
417 /*E2*/ "reset-button", /* in: BMC_SYS_MOS_RST_BTN_L*/
418 /*E3*/ "reset-control", /* out: BMC_ASSERT_RST_BTN */
419 /*E4*/ "nmi-button", /* in: BMC_SYS_MON_NMI_BTN_L */
420 /*E5*/ "nmi-control", /* out: BMC_ASSERT_NMI_BTN */
422 /*E7*/ "led-heartbeat", /* out: BMC_GPIOE7 */
424 /*F1*/ "clear-cmos-control", /* out: BMC_ASSERT_CLR_CMOS_L */
427 /*F4*/ "led-fault", /* out: BMC_HWM_FAULT_LED_L */
428 /*F5*/ "BMC_SYS_FAULT_LED_L",
429 /*F6*/ "BMC_ASSERT_BIOS_WP_L",
431 /*G0-G7*/ "","","","","","","","",
432 /*H0-H7*/ "","","","","","","","",
433 /*I0-I7*/ "","","","","","","","",
434 /*J0-J7*/ "","","","","","","","",
435 /*K0-K7*/ "","","","","","","","",
436 /*L0-L7*/ "","","","","","","","",
437 /*M0-M7*/ "","","","","","","","",
438 /*N0-N7*/ "","","","","","","","",
439 /*O0-O7*/ "","","","","","","","",
440 /*P0-P7*/ "","","","","","","","",
447 /*Q6*/ "id-button", /* in: BMC_CHASSIS_ID_BTN_L */
449 /*R0-R7*/ "","","","","","","","",
450 /*S0-S7*/ "","","","","","","","",
451 /*T0-T7*/ "","","","","","","","",
452 /*U0-U7*/ "","","","","","","","",
453 /*V0-V7*/ "","","","","","","","",
454 /*W0-W7*/ "","","","","","","","",
455 /*X0-X7*/ "","","","","","","","",
456 /*Y0-Y7*/ "","","","","","","","",
458 /*Z3*/ "post-complete", /* BMC_SYS_MON_PWROK */
459 /*Z4-Z7*/ "","","","",
467 /*AA7*/ "BMC_ASSERT_BMC_READY",
468 /*AB0*/ "BMC_SPD_SEL",
469 /*AB1-AB7*/ "","","","","","","";