arch/arm/boot/dts/aspeed-bmc-tyan-s8036.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /dts-v1/;
   3
   4 #include "aspeed-g5.dtsi"
   5 #include <dt-bindings/gpio/aspeed-gpio.h>
   6 #include <dt-bindings/interrupt-controller/irq.h>
   7
   8 / {
   9         model = "Tyan S8036 BMC";
  10         compatible = "tyan,s8036-bmc", "aspeed,ast2500";
  11
  12         chosen {
  13                 stdout-path = &uart5;
  14                 bootargs = "console=ttyS4,115200 earlycon";
  15         };
  16
  17         memory@80000000 {
  18                 device_type = "memory";
  19                 reg = <0x80000000 0x20000000>;
  20         };
  21
  22         reserved-memory {
  23                 #address-cells = <1>;
  24                 #size-cells = <1>;
  25                 ranges;
  26
  27                 p2a_memory: region@987f0000 {
  28                         no-map;
  29                         reg = <0x987f0000 0x00010000>; /* 64KB */
  30                 };
  31
  32                 vga_memory: framebuffer@9f000000 {
  33                         no-map;
  34                         reg = <0x9f000000 0x01000000>; /* 16M */
  35                 };
  36
  37                 gfx_memory: framebuffer {
  38                         size = <0x01000000>; /* 16M */
  39                         alignment = <0x01000000>;
  40                         compatible = "shared-dma-pool";
  41                         reusable;
  42                 };
  43         };
  44
  45         leds {
  46                 compatible = "gpio-leds";
  47
  48                 identify {
  49                         gpios = <&gpio ASPEED_GPIO(A, 2) GPIO_ACTIVE_LOW>;
  50                 };
  51
  52                 heartbeat {
  53                         gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
  54                 };
  55         };
  56
  57         iio-hwmon {
  58                 compatible = "iio-hwmon";
  59                 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
  60                         <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
  61                         <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
  62                         <&adc 12>, <&adc 13>, <&adc 14>;
  63         };
  64
  65         iio-hwmon-battery {
  66                 compatible = "iio-hwmon";
  67                 io-channels = <&adc 15>;
  68         };
  69 };
  70
  71 &fmc {
  72         status = "okay";
  73         flash@0 {
  74                 label = "bmc";
  75                 status = "okay";
  76                 m25p,fast-read;
  77 #include "openbmc-flash-layout.dtsi"
  78         };
  79 };
  80
  81 &spi1 {
  82         status = "okay";
  83         pinctrl-names = "default";
  84         pinctrl-0 = <&pinctrl_spi1_default>;
  85
  86         flash@0 {
  87                 status = "okay";
  88                 label = "pnor";
  89                 m25p,fast-read;
  90         };
  91 };
  92
  93 &uart1 {
  94         /* Rear RS-232 connector */
  95         status = "okay";
  96         pinctrl-names = "default";
  97         pinctrl-0 = <&pinctrl_txd1_default
  98                         &pinctrl_rxd1_default>;
  99 };
 100
 101 &uart2 {
 102         /* RS-232 connector on header */
 103         status = "okay";
 104         pinctrl-names = "default";
 105         pinctrl-0 = <&pinctrl_txd2_default
 106                         &pinctrl_rxd2_default>;
 107 };
 108
 109 &uart3 {
 110         /* Alternative to vuart to internally connect (route) to uart1
 111          * when vuart cannot be used due to BIOS limitations.
 112          */
 113         status = "okay";
 114 };
 115
 116 &uart4 {
 117         /* Alternative to vuart to internally connect (route) to the
 118          * external port usually used by uart1 when vuart cannot be
 119          * used due to BIOS limitations.
 120          */
 121         status = "okay";
 122 };
 123
 124 &uart5 {
 125         /* BMC "debug" (console) UART; connected to RS-232 connector
 126          * on header; selectable via jumpers as alternative to uart2
 127          */
 128         status = "okay";
 129 };
 130
 131 &uart_routing {
 132         status = "okay";
 133 };
 134
 135 &vuart {
 136         status = "okay";
 137
 138         /* We enable the VUART here, but leave it in a state that does
 139          * not interfere with the SuperIO. The goal is to have both the
 140          * VUART and the SuperIO available and decide at runtime whether
 141          * the VUART should actually be used. For that reason, configure
 142          * an "invalid" IO address and an IRQ that is not used by the
 143          * BMC.
 144          */
 145         aspeed,lpc-io-reg = <0xffff>;
 146         aspeed,lpc-interrupts = <15 IRQ_TYPE_LEVEL_HIGH>;
 147 };
 148
 149 &lpc_ctrl {
 150         status = "okay";
 151 };
 152
 153 &p2a {
 154         status = "okay";
 155         memory-region = <&p2a_memory>;
 156 };
 157
 158 &lpc_snoop {
 159         status = "okay";
 160         snoop-ports = <0x80>;
 161 };
 162
 163 &adc {
 164         status = "okay";
 165 };
 166
 167 &vhub {
 168         status = "okay";
 169 };
 170
 171 &pwm_tacho {
 172         status = "okay";
 173         pinctrl-names = "default";
 174         pinctrl-0 = <&pinctrl_pwm0_default
 175                         &pinctrl_pwm1_default
 176                         &pinctrl_pwm3_default
 177                         &pinctrl_pwm4_default>;
 178
 179         /* CPU fan */
 180         fan@0 {
 181                 reg = <0x00>;
 182                 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
 183         };
 184
 185         /* PWM group for chassis fans #1, #2, #3 and #4 */
 186         fan@2 {
 187                 reg = <0x03>;
 188                 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
 189         };
 190
 191         fan@3 {
 192                 reg = <0x03>;
 193                 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
 194         };
 195
 196         fan@4 {
 197                 reg = <0x03>;
 198                 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
 199         };
 200
 201         fan@5 {
 202                 reg = <0x03>;
 203                 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
 204         };
 205
 206         /* PWM group for chassis fans #5 and #6  */
 207         fan@6 {
 208                 reg = <0x04>;
 209                 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
 210         };
 211
 212         fan@7 {
 213                 reg = <0x04>;
 214                 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
 215         };
 216 };
 217
 218 &i2c0 {
 219         /* Directly connected to Sideband-Temperature Sensor Interface (APML) */
 220         status = "okay";
 221 };
 222
 223 &i2c1 {
 224         /* Directly connected to IPMB HDR. */
 225         status = "okay";
 226 };
 227
 228 &i2c2 {
 229         status = "okay";
 230
 231         /* BMC EEPROM, incl. mainboard FRU */
 232         eeprom@50 {
 233                 compatible = "atmel,24c256";
 234                 reg = <0x50>;
 235         };
 236         /* Also connected to:
 237          * - BCM5720
 238          * - FPGA
 239          * - FAN HDR
 240          * - FPIO HDR
 241          */
 242 };
 243
 244 &i2c3 {
 245         status = "okay";
 246
 247         /* PSU1 FRU @ 0xA0 */
 248         eeprom@50 {
 249                 compatible = "atmel,24c02";
 250                 reg = <0x50>;
 251         };
 252
 253         /* PSU2 FRU @ 0xA2 */
 254         eeprom@51 {
 255                 compatible = "atmel,24c02";
 256                 reg = <0x51>;
 257         };
 258
 259         /* PSU1 @ 0xB0 */
 260         power-supply@58 {
 261                 compatible = "pmbus";
 262                 reg = <0x58>;
 263         };
 264
 265         /* PSU2 @ 0xB2 */
 266         power-supply@59 {
 267                 compatible = "pmbus";
 268                 reg = <0x59>;
 269         };
 270
 271 };
 272
 273 &i2c4 {
 274         status = "okay";
 275 };
 276
 277 &i2c5 {
 278         status = "okay";
 279         /* Hardware monitor with temperature sensors */
 280         nct7802@28 {
 281                 compatible = "nuvoton,nct7802";
 282                 reg = <0x28>;
 283                 #address-cells = <1>;
 284                 #size-cells = <0>;
 285
 286                 channel@0 { /* LTD */
 287                         reg = <0>;
 288                         status = "okay";
 289                 };
 290
 291                 channel@1 { /* RTD1 */
 292                         reg = <1>;
 293                         status = "okay";
 294                         sensor-type = "temperature";
 295                         temperature-mode = "thermistor";
 296                 };
 297
 298                 channel@2 { /* RTD2 */
 299                         reg = <2>;
 300                         status = "okay";
 301                         sensor-type = "temperature";
 302                         temperature-mode = "thermistor";
 303                 };
 304
 305                 channel@3 { /* RTD3 */
 306                         reg = <3>;
 307                         status = "okay";
 308                         sensor-type = "temperature";
 309                 };
 310         };
 311
 312         /* Also connected to:
 313          * - PCA9544
 314          * - CLK BUFF
 315          * - OCP FRU
 316          */
 317 };
 318
 319 &i2c6 {
 320         status = "okay";
 321         /* Connected to:
 322          * - PCA9548 @0xE0
 323          * - PCA9548 @0xE2
 324          * - PCA9544 @0xE4
 325          */
 326 };
 327
 328 &i2c7 {
 329         status = "okay";
 330
 331         /* Connected to:
 332          * - PCH SMBUS #4
 333          */
 334 };
 335
 336 &i2c8 {
 337         status = "okay";
 338
 339         /* Not connected */
 340 };
 341
 342 &mac0 {
 343         status = "okay";
 344         use-ncsi;
 345         pinctrl-names = "default";
 346         pinctrl-0 = <&pinctrl_rmii1_default>;
 347 };
 348
 349 &mac1 {
 350         status = "okay";
 351         pinctrl-names = "default";
 352         pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
 353 };
 354
 355 &ibt {
 356         status = "okay";
 357 };
 358
 359 &kcs1 {
 360         status = "okay";
 361         aspeed,lpc-io-reg = <0xca8>;
 362 };
 363
 364 &kcs3 {
 365         status = "okay";
 366         aspeed,lpc-io-reg = <0xca2>;
 367 };
 368
 369 /* Enable BMC VGA output to show an early (pre-BIOS) boot screen */
 370 &gfx {
 371         status = "okay";
 372         memory-region = <&gfx_memory>;
 373 };
 374
 375 /* We're following the GPIO naming as defined at
 376  * https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md.
 377  *
 378  * Notes on led-identify and id-button:
 379  * - A physical button is connected to id-button which
 380  *   triggers the clock on a D flip-flop. The /Q output of the
 381  *   flip-flop drives its D input.
 382  * - The flip-flop's Q output drives led-identify which is
 383  *   connected to LEDs.
 384  * - With that, every button press toggles the LED between on and off.
 385  *
 386  * Notes on power-, reset- and nmi- button and control:
 387  * - The -button signals can be used to monitor physical buttons.
 388  * - The -control signals can be used to actuate the specific
 389  *   operation.
 390  * - In hardware, the -button signals are connected to the -control
 391  *   signals through drivers with the -control signals being
 392  *   protected through diodes.
 393  */
 394 &gpio {
 395         status = "okay";
 396         gpio-line-names =
 397         /*A0*/          "",
 398         /*A1*/          "",
 399         /*A2*/          "led-identify", /* in/out: BMC_CHASSIS_ID_LED_L */
 400         /*A3*/          "",
 401         /*A4*/          "",
 402         /*A5*/          "",
 403         /*A6*/          "",
 404         /*A7*/          "",
 405         /*B0-B7*/       "","","","","","","","",
 406         /*C0-C7*/       "","","","","","","","",
 407         /*D0*/          "",
 408         /*D1*/          "",
 409         /*D2*/          "power-chassis-good", /* in: PWR_GOOD_LED -- Check if this is Z3?*/
 410         /*D3*/          "platform-reset", /* in: RESET_LED_L */
 411         /*D4*/          "",
 412         /*D5*/          "",
 413         /*D6*/          "",
 414         /*D7*/          "",
 415         /*E0*/          "power-button", /* in: BMC_SYS_MON_PWR_BTN_L */
 416         /*E1*/          "power-chassis-control", /* out: BMC_ASSERT_PWR_BTN */
 417         /*E2*/          "reset-button", /* in: BMC_SYS_MOS_RST_BTN_L*/
 418         /*E3*/          "reset-control", /* out: BMC_ASSERT_RST_BTN */
 419         /*E4*/          "nmi-button", /* in: BMC_SYS_MON_NMI_BTN_L */
 420         /*E5*/          "nmi-control", /* out: BMC_ASSERT_NMI_BTN */
 421         /*E6*/          "TSI_RESERT",
 422         /*E7*/          "led-heartbeat", /* out: BMC_GPIOE7 */
 423         /*F0*/          "",
 424         /*F1*/          "clear-cmos-control", /* out: BMC_ASSERT_CLR_CMOS_L */
 425         /*F2*/          "",
 426         /*F3*/          "",
 427         /*F4*/          "led-fault", /* out: BMC_HWM_FAULT_LED_L */
 428         /*F5*/          "BMC_SYS_FAULT_LED_L",
 429         /*F6*/          "BMC_ASSERT_BIOS_WP_L",
 430         /*F7*/          "",
 431         /*G0-G7*/       "","","","","","","","",
 432         /*H0-H7*/       "","","","","","","","",
 433         /*I0-I7*/       "","","","","","","","",
 434         /*J0-J7*/       "","","","","","","","",
 435         /*K0-K7*/       "","","","","","","","",
 436         /*L0-L7*/       "","","","","","","","",
 437         /*M0-M7*/       "","","","","","","","",
 438         /*N0-N7*/       "","","","","","","","",
 439         /*O0-O7*/       "","","","","","","","",
 440         /*P0-P7*/       "","","","","","","","",
 441         /*Q0*/          "",
 442         /*Q1*/          "",
 443         /*Q2*/          "",
 444         /*Q3*/          "",
 445         /*Q4*/          "",
 446         /*Q5*/          "",
 447         /*Q6*/          "id-button", /* in: BMC_CHASSIS_ID_BTN_L */
 448         /*Q7*/          "",
 449         /*R0-R7*/       "","","","","","","","",
 450         /*S0-S7*/       "","","","","","","","",
 451         /*T0-T7*/       "","","","","","","","",
 452         /*U0-U7*/       "","","","","","","","",
 453         /*V0-V7*/       "","","","","","","","",
 454         /*W0-W7*/       "","","","","","","","",
 455         /*X0-X7*/       "","","","","","","","",
 456         /*Y0-Y7*/       "","","","","","","","",
 457         /*Z0-Z2*/       "","","",
 458         /*Z3*/          "post-complete", /* BMC_SYS_MON_PWROK */
 459         /*Z4-Z7*/       "","","","",
 460         /*AA0*/         "",
 461         /*AA1*/         "",
 462         /*AA2*/         "",
 463         /*AA3*/         "",
 464         /*AA4*/         "",
 465         /*AA5*/         "",
 466         /*AA6*/         "",
 467         /*AA7*/         "BMC_ASSERT_BMC_READY",
 468         /*AB0*/         "BMC_SPD_SEL",
 469         /*AB1-AB7*/     "","","","","","","";
 470 };