arch/arm/boot/dts/aspeed-bmc-ampere-mtmitchell.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 // Copyright (c) 2022, Ampere Computing LLC
   3
   4 /dts-v1/;
   5
   6 #include "aspeed-g6.dtsi"
   7 #include <dt-bindings/gpio/aspeed-gpio.h>
   8
   9 / {
  10         model = "Ampere Mt.Mitchell BMC";
  11         compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
  12
  13         chosen {
  14                 stdout-path = &uart5;
  15         };
  16
  17         memory@80000000 {
  18                 device_type = "memory";
  19                 reg = <0x80000000 0x80000000>;
  20         };
  21
  22         reserved-memory {
  23                 #address-cells = <1>;
  24                 #size-cells = <1>;
  25                 ranges;
  26
  27                 gfx_memory: framebuffer {
  28                         size = <0x01000000>;
  29                         alignment = <0x01000000>;
  30                         compatible = "shared-dma-pool";
  31                         reusable;
  32                 };
  33
  34                 video_engine_memory: video {
  35                         size = <0x04000000>;
  36                         alignment = <0x01000000>;
  37                         compatible = "shared-dma-pool";
  38                         reusable;
  39                 };
  40
  41                 vga_memory: region@bf000000 {
  42                         no-map;
  43                         compatible = "shared-dma-pool";
  44                         reg = <0xbf000000 0x01000000>;  /* 16M */
  45                 };
  46         };
  47
  48         voltage_mon_reg: voltage-mon-regulator {
  49                 compatible = "regulator-fixed";
  50                 regulator-name = "ltc2497_reg";
  51                 regulator-min-microvolt = <3300000>;
  52                 regulator-max-microvolt = <3300000>;
  53                 regulator-always-on;
  54         };
  55
  56         gpioI5mux: mux-controller {
  57                 compatible = "gpio-mux";
  58                 #mux-control-cells = <0>;
  59                 mux-gpios = <&gpio0 ASPEED_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
  60         };
  61
  62         adc0mux: adc0mux {
  63                 compatible = "io-channel-mux";
  64                 io-channels = <&adc0 0>;
  65                 #io-channel-cells = <1>;
  66                 io-channel-names = "parent";
  67                 mux-controls = <&gpioI5mux>;
  68                 channels = "s0", "s1";
  69         };
  70
  71         adc1mux: adc1mux {
  72                 compatible = "io-channel-mux";
  73                 io-channels = <&adc0 1>;
  74                 #io-channel-cells = <1>;
  75                 io-channel-names = "parent";
  76                 mux-controls = <&gpioI5mux>;
  77                 channels = "s0", "s1";
  78         };
  79
  80         adc2mux: adc2mux {
  81                 compatible = "io-channel-mux";
  82                 io-channels = <&adc0 2>;
  83                 #io-channel-cells = <1>;
  84                 io-channel-names = "parent";
  85                 mux-controls = <&gpioI5mux>;
  86                 channels = "s0", "s1";
  87         };
  88
  89         adc3mux: adc3mux {
  90                 compatible = "io-channel-mux";
  91                 io-channels = <&adc0 3>;
  92                 #io-channel-cells = <1>;
  93                 io-channel-names = "parent";
  94                 mux-controls = <&gpioI5mux>;
  95                 channels = "s0", "s1";
  96         };
  97
  98         adc4mux: adc4mux {
  99                 compatible = "io-channel-mux";
 100                 io-channels = <&adc0 4>;
 101                 #io-channel-cells = <1>;
 102                 io-channel-names = "parent";
 103                 mux-controls = <&gpioI5mux>;
 104                 channels = "s0", "s1";
 105         };
 106
 107         adc5mux: adc5mux {
 108                 compatible = "io-channel-mux";
 109                 io-channels = <&adc0 5>;
 110                 #io-channel-cells = <1>;
 111                 io-channel-names = "parent";
 112                 mux-controls = <&gpioI5mux>;
 113                 channels = "s0", "s1";
 114         };
 115
 116         adc6mux: adc6mux {
 117                 compatible = "io-channel-mux";
 118                 io-channels = <&adc0 6>;
 119                 #io-channel-cells = <1>;
 120                 io-channel-names = "parent";
 121                 mux-controls = <&gpioI5mux>;
 122                 channels = "s0", "s1";
 123         };
 124
 125         adc7mux: adc7mux {
 126                 compatible = "io-channel-mux";
 127                 io-channels = <&adc0 7>;
 128                 #io-channel-cells = <1>;
 129                 io-channel-names = "parent";
 130                 mux-controls = <&gpioI5mux>;
 131                 channels = "s0", "s1";
 132         };
 133
 134         adc8mux: adc8mux {
 135                 compatible = "io-channel-mux";
 136                 io-channels = <&adc1 0>;
 137                 #io-channel-cells = <1>;
 138                 io-channel-names = "parent";
 139                 mux-controls = <&gpioI5mux>;
 140                 channels = "s0", "s1";
 141         };
 142
 143         adc9mux: adc9mux {
 144                 compatible = "io-channel-mux";
 145                 io-channels = <&adc1 1>;
 146                 #io-channel-cells = <1>;
 147                 io-channel-names = "parent";
 148                 mux-controls = <&gpioI5mux>;
 149                 channels = "s0", "s1";
 150         };
 151
 152         adc10mux: adc10mux {
 153                 compatible = "io-channel-mux";
 154                 io-channels = <&adc1 2>;
 155                 #io-channel-cells = <1>;
 156                 io-channel-names = "parent";
 157                 mux-controls = <&gpioI5mux>;
 158                 channels = "s0", "s1";
 159         };
 160
 161         adc11mux: adc11mux {
 162                 compatible = "io-channel-mux";
 163                 io-channels = <&adc1 3>;
 164                 #io-channel-cells = <1>;
 165                 io-channel-names = "parent";
 166                 mux-controls = <&gpioI5mux>;
 167                 channels = "s0", "s1";
 168         };
 169
 170         adc12mux: adc12mux {
 171                 compatible = "io-channel-mux";
 172                 io-channels = <&adc1 4>;
 173                 #io-channel-cells = <1>;
 174                 io-channel-names = "parent";
 175                 mux-controls = <&gpioI5mux>;
 176                 channels = "s0", "s1";
 177         };
 178
 179         adc13mux: adc13mux {
 180                 compatible = "io-channel-mux";
 181                 io-channels = <&adc1 5>;
 182                 #io-channel-cells = <1>;
 183                 io-channel-names = "parent";
 184                 mux-controls = <&gpioI5mux>;
 185                 channels = "s0", "s1";
 186         };
 187
 188         adc14mux: adc14mux {
 189                 compatible = "io-channel-mux";
 190                 io-channels = <&adc1 6>;
 191                 #io-channel-cells = <1>;
 192                 io-channel-names = "parent";
 193                 mux-controls = <&gpioI5mux>;
 194                 channels = "s0", "s1";
 195         };
 196
 197         adc15mux: adc15mux {
 198                 compatible = "io-channel-mux";
 199                 io-channels = <&adc1 7>;
 200                 #io-channel-cells = <1>;
 201                 io-channel-names = "parent";
 202                 mux-controls = <&gpioI5mux>;
 203                 channels = "s0", "s1";
 204         };
 205
 206         iio-hwmon {
 207                 compatible = "iio-hwmon";
 208                 io-channels = <&adc0mux 0>, <&adc0mux 1>,
 209                         <&adc1mux 0>, <&adc1mux 1>,
 210                         <&adc2mux 0>, <&adc2mux 1>,
 211                         <&adc3mux 0>, <&adc3mux 1>,
 212                         <&adc4mux 0>, <&adc4mux 1>,
 213                         <&adc5mux 0>, <&adc5mux 1>,
 214                         <&adc6mux 0>, <&adc6mux 1>,
 215                         <&adc7mux 0>, <&adc7mux 1>,
 216                         <&adc8mux 0>, <&adc8mux 1>,
 217                         <&adc9mux 0>, <&adc9mux 1>,
 218                         <&adc10mux 0>, <&adc10mux 1>,
 219                         <&adc11mux 0>, <&adc11mux 1>,
 220                         <&adc12mux 0>, <&adc12mux 1>,
 221                         <&adc13mux 0>, <&adc13mux 1>,
 222                         <&adc14mux 0>, <&adc14mux 1>,
 223                         <&adc15mux 0>, <&adc15mux 1>,
 224                         <&adc_i2c 0>, <&adc_i2c 1>,
 225                         <&adc_i2c 2>, <&adc_i2c 3>,
 226                         <&adc_i2c 4>, <&adc_i2c 5>,
 227                         <&adc_i2c 6>, <&adc_i2c 7>,
 228                         <&adc_i2c 8>, <&adc_i2c 9>,
 229                         <&adc_i2c 10>, <&adc_i2c 11>,
 230                         <&adc_i2c 12>, <&adc_i2c 13>,
 231                         <&adc_i2c 14>, <&adc_i2c 15>;
 232         };
 233 };
 234
 235 &mdio0 {
 236         status = "okay";
 237
 238         ethphy0: ethernet-phy@0 {
 239                 compatible = "ethernet-phy-ieee802.3-c22";
 240                 reg = <0>;
 241         };
 242 };
 243
 244 &mac0 {
 245         status = "okay";
 246
 247         phy-mode = "rgmii";
 248         phy-handle = <&ethphy0>;
 249
 250         pinctrl-names = "default";
 251         pinctrl-0 = <&pinctrl_rgmii1_default>;
 252 };
 253
 254 &fmc {
 255         status = "okay";
 256         flash@0 {
 257                 status = "okay";
 258                 m25p,fast-read;
 259                 label = "bmc";
 260                 spi-max-frequency = <50000000>;
 261 #include "openbmc-flash-layout-64.dtsi"
 262         };
 263
 264         flash@1 {
 265                 status = "okay";
 266                 m25p,fast-read;
 267                 label = "alt-bmc";
 268                 spi-max-frequency = <50000000>;
 269 #include "openbmc-flash-layout-64-alt.dtsi"
 270         };
 271 };
 272
 273 &spi1 {
 274         status = "okay";
 275         pinctrl-names = "default";
 276         pinctrl-0 = <&pinctrl_spi1_default>;
 277
 278         flash@0 {
 279                 status = "okay";
 280                 m25p,fast-read;
 281                 label = "pnor";
 282                 spi-max-frequency = <20000000>;
 283         };
 284 };
 285
 286 &uart1 {
 287         status = "okay";
 288 };
 289
 290 &uart2 {
 291         status = "okay";
 292 };
 293
 294 &uart3 {
 295         status = "okay";
 296 };
 297
 298 &uart4 {
 299         status = "okay";
 300 };
 301
 302 &i2c0 {
 303         status = "okay";
 304
 305         temperature-sensor@2e {
 306                 compatible = "adi,adt7490";
 307                 reg = <0x2e>;
 308         };
 309 };
 310
 311 &i2c1 {
 312         status = "okay";
 313 };
 314
 315 &i2c2 {
 316         status = "okay";
 317
 318         psu@58 {
 319                 compatible = "pmbus";
 320                 reg = <0x58>;
 321         };
 322
 323         psu@59 {
 324                 compatible = "pmbus";
 325                 reg = <0x59>;
 326         };
 327 };
 328
 329 &i2c3 {
 330         status = "okay";
 331 };
 332
 333 &i2c4 {
 334         status = "okay";
 335
 336         adc_i2c: adc@16 {
 337                 compatible = "lltc,ltc2497";
 338                 reg = <0x16>;
 339                 vref-supply = <&voltage_mon_reg>;
 340                 #io-channel-cells = <1>;
 341          };
 342
 343         eeprom@50 {
 344                 compatible = "atmel,24c64";
 345                 reg = <0x50>;
 346                 pagesize = <32>;
 347         };
 348
 349         i2c-mux@70 {
 350                 compatible = "nxp,pca9545";
 351                 #address-cells = <1>;
 352                 #size-cells = <0>;
 353                 reg = <0x70>;
 354                 i2c-mux-idle-disconnect;
 355
 356                 i2c4_bus70_chn0: i2c@0 {
 357                         #address-cells = <1>;
 358                         #size-cells = <0>;
 359                         reg = <0x0>;
 360
 361                         outlet_temp1: temperature-sensor@48 {
 362                                 compatible = "ti,tmp75";
 363                                 reg = <0x48>;
 364                         };
 365                         psu1_inlet_temp2: temperature-sensor@49 {
 366                                 compatible = "ti,tmp75";
 367                                 reg = <0x49>;
 368                         };
 369                 };
 370
 371                 i2c4_bus70_chn1: i2c@1 {
 372                         #address-cells = <1>;
 373                         #size-cells = <0>;
 374                         reg = <0x1>;
 375
 376                         pcie_zone_temp1: temperature-sensor@48 {
 377                                 compatible = "ti,tmp75";
 378                                 reg = <0x48>;
 379                         };
 380                         psu0_inlet_temp2: temperature-sensor@49 {
 381                                 compatible = "ti,tmp75";
 382                                 reg = <0x49>;
 383                         };
 384                 };
 385
 386                 i2c4_bus70_chn2: i2c@2 {
 387                         #address-cells = <1>;
 388                         #size-cells = <0>;
 389                         reg = <0x2>;
 390
 391                         pcie_zone_temp2: temperature-sensor@48 {
 392                                 compatible = "ti,tmp75";
 393                                 reg = <0x48>;
 394                         };
 395                         outlet_temp2: temperature-sensor@49 {
 396                                 compatible = "ti,tmp75";
 397                                 reg = <0x49>;
 398                         };
 399                 };
 400
 401                 i2c4_bus70_chn3: i2c@3 {
 402                         #address-cells = <1>;
 403                         #size-cells = <0>;
 404                         reg = <0x3>;
 405
 406                         mb_inlet_temp1: temperature-sensor@7c {
 407                                 compatible = "microchip,emc1413";
 408                                 reg = <0x7c>;
 409                         };
 410                         mb_inlet_temp2: temperature-sensor@4c {
 411                                 compatible = "microchip,emc1413";
 412                                 reg = <0x4c>;
 413                         };
 414                 };
 415         };
 416 };
 417
 418 &i2c5 {
 419         status = "okay";
 420
 421         i2c-mux@70 {
 422                 compatible = "nxp,pca9548";
 423                 #address-cells = <1>;
 424                 #size-cells = <0>;
 425                 reg = <0x70>;
 426                 i2c-mux-idle-disconnect;
 427         };
 428 };
 429
 430 &i2c6 {
 431         status = "okay";
 432         rtc@51 {
 433                 compatible = "nxp,pcf85063a";
 434                 reg = <0x51>;
 435         };
 436 };
 437
 438 &i2c7 {
 439         status = "okay";
 440 };
 441
 442 &i2c9 {
 443         status = "okay";
 444 };
 445
 446 &i2c11 {
 447         status = "okay";
 448 };
 449
 450 &i2c14 {
 451         status = "okay";
 452         eeprom@50 {
 453                 compatible = "atmel,24c64";
 454                 reg = <0x50>;
 455                 pagesize = <32>;
 456         };
 457
 458         bmc_ast2600_cpu: temperature-sensor@35 {
 459                 compatible = "ti,tmp175";
 460                 reg = <0x35>;
 461         };
 462 };
 463
 464 &adc0 {
 465         ref_voltage = <2500>;
 466         status = "okay";
 467
 468         pinctrl-names = "default";
 469         pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
 470                 &pinctrl_adc2_default &pinctrl_adc3_default
 471                 &pinctrl_adc4_default &pinctrl_adc5_default
 472                 &pinctrl_adc6_default &pinctrl_adc7_default>;
 473 };
 474
 475 &adc1 {
 476         ref_voltage = <2500>;
 477         status = "okay";
 478
 479         pinctrl-names = "default";
 480         pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
 481                 &pinctrl_adc10_default &pinctrl_adc11_default
 482                 &pinctrl_adc12_default &pinctrl_adc13_default
 483                 &pinctrl_adc14_default &pinctrl_adc15_default>;
 484 };
 485
 486 &vhub {
 487         status = "okay";
 488 };
 489
 490 &video {
 491         status = "okay";
 492         memory-region = <&video_engine_memory>;
 493 };
 494
 495 &gpio0 {
 496         gpio-line-names =
 497         /*A0-A7*/       "","","","","","i2c2-reset-n","i2c6-reset-n","i2c4-reset-n",
 498         /*B0-B7*/       "","","","","host0-sysreset-n","host0-pmin-n","","",
 499         /*C0-C7*/       "s0-vrd-fault-n","s1-vrd-fault-n","","",
 500                         "irq-n","","vrd-sel","spd-sel",
 501         /*D0-D7*/       "presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n",
 502                         "","bmc-ncsi-txen","","",
 503         /*E0-E7*/       "","","clk50m-bmc-ncsi","","","","","",
 504         /*F0-F7*/       "s0-pcp-oc-warn-n","s1-pcp-oc-warn-n","power-chassis-control",
 505                         "cpu-bios-recover","s0-heartbeat","hs-csout-prochot",
 506                         "s0-vr-hot-n","s1-vr-hot-n",
 507         /*G0-G7*/       "","","hsc-12vmain-alt1-n","","","","","",
 508         /*H0-H7*/       "","","wd-disable-n","power-chassis-good","","","","",
 509         /*I0-I7*/       "","","","","","adc-sw","power-button","rtc-battery-voltage-read-enable",
 510         /*J0-J7*/       "","","","","","","","",
 511         /*K0-K7*/       "","","","","","","","",
 512         /*L0-L7*/       "","","","","","","","",
 513         /*M0-M7*/       "","s0-ddr-save","soc-spi-nor-access","presence-cpu0",
 514                         "s0-rtc-lock","","","",
 515         /*N0-N7*/       "hpm-fw-recovery","hpm-stby-rst-n","jtag-sel-s0","led-sw-hb",
 516                         "jtag-dbgr-prsnt-n","s1-heartbeat","","",
 517         /*O0-O7*/       "","","","","","","","",
 518         /*P0-P7*/       "ps0-ac-loss-n","ps1-ac-loss-n","","",
 519                         "led-fault","cpld-user-mode","jtag-srst-n","led-bmc-hb",
 520         /*Q0-Q7*/       "","","","","","","","",
 521         /*R0-R7*/       "","","","","","","","",
 522         /*S0-S7*/       "","","identify-button","led-identify",
 523                         "s1-ddr-save","spi-nor-access","sys-pgood","presence-cpu1",
 524         /*T0-T7*/       "","","","","","","","",
 525         /*U0-U7*/       "","","","","","","","",
 526         /*V0-V7*/       "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
 527                         "host0-reboot-ack-n","host0-ready","host0-shd-req-n",
 528                         "host0-shd-ack-n","s0-overtemp-n",
 529         /*W0-W7*/       "ocp-aux-pwren","ocp-main-pwren","ocp-pgood","",
 530                         "bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
 531         /*X0-X7*/       "i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok",
 532                         "s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n",
 533                         "s1-overtemp-n","s1-spi-auth-fail-n",
 534         /*Y0-Y7*/       "","","","","","","","host0-special-boot",
 535         /*Z0-Z7*/       "reset-button","ps0-pgood","ps1-pgood","","","","","";
 536 };
 537
 538 &gpio1 {
 539         gpio-line-names =
 540         /*18A0-18A7*/   "","","","","","","","",
 541         /*18B0-18B7*/   "","","","","","","s0-soc-pgood","",
 542         /*18C0-18C7*/   "uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1",
 543                         "uart3-mode0","uart3-mode1","uart4-mode0","uart4-mode1",
 544         /*18D0-18D7*/   "","","","","","","","",
 545         /*18E0-18E3*/   "","","","";
 546 };