1 // SPDX-License-Identifier: GPL-2.0+
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
7 model = "Ampere Mt. Jade BMC";
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-7
24 * i2c bus 60-67 assigned to NVMe slot 8-15
36 * i2c bus 70-77 assigned to NVMe slot 16-23
48 * i2c bus 80-81 assigned to NVMe M2 slot 0-1
56 bootargs = "console=ttyS4,115200 earlycon";
60 reg = <0x80000000 0x20000000>;
68 vga_memory: framebuffer@9f000000 {
70 reg = <0x9f000000 0x01000000>; /* 16M */
73 gfx_memory: framebuffer {
75 alignment = <0x01000000>;
76 compatible = "shared-dma-pool";
80 video_engine_memory: jpegbuffer {
81 size = <0x02000000>; /* 32M */
82 alignment = <0x01000000>;
83 compatible = "shared-dma-pool";
89 compatible = "gpio-leds";
92 gpios = <&gpio ASPEED_GPIO(B, 6) GPIO_ACTIVE_HIGH>;
96 gpios = <&gpio ASPEED_GPIO(Q, 6) GPIO_ACTIVE_HIGH>;
101 compatible = "gpio-keys";
104 label = "SHUTDOWN_ACK";
105 gpios = <&gpio ASPEED_GPIO(G, 2) GPIO_ACTIVE_LOW>;
106 linux,code = <ASPEED_GPIO(G, 2)>;
110 label = "REBOOT_ACK";
111 gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>;
112 linux,code = <ASPEED_GPIO(J, 3)>;
116 label = "S0_OVERTEMP";
117 gpios = <&gpio ASPEED_GPIO(G, 3) GPIO_ACTIVE_LOW>;
118 linux,code = <ASPEED_GPIO(G, 3)>;
122 label = "S0_HIGHTEMP";
123 gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
124 linux,code = <ASPEED_GPIO(J, 0)>;
128 label = "S0_CPU_FAULT";
129 gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_HIGH>;
130 linux,code = <ASPEED_GPIO(J, 1)>;
134 label = "S0_SCP_AUTH_FAIL";
135 gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
136 linux,code = <ASPEED_GPIO(J, 2)>;
140 label = "S1_SCP_AUTH_FAIL";
141 gpios = <&gpio ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
142 linux,code = <ASPEED_GPIO(Z, 5)>;
146 label = "S1_OVERTEMP";
147 gpios = <&gpio ASPEED_GPIO(Z, 6) GPIO_ACTIVE_LOW>;
148 linux,code = <ASPEED_GPIO(Z, 6)>;
152 label = "S1_HIGHTEMP";
153 gpios = <&gpio ASPEED_GPIO(AB, 0) GPIO_ACTIVE_LOW>;
154 linux,code = <ASPEED_GPIO(AB, 0)>;
158 label = "S1_CPU_FAULT";
159 gpios = <&gpio ASPEED_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
160 linux,code = <ASPEED_GPIO(Z, 1)>;
165 gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
166 linux,code = <ASPEED_GPIO(Q, 5)>;
170 label = "PSU1_VIN_GOOD";
171 gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>;
172 linux,code = <ASPEED_GPIO(H, 4)>;
176 label = "PSU2_VIN_GOOD";
177 gpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>;
178 linux,code = <ASPEED_GPIO(H, 5)>;
182 label = "PSU1_PRESENT";
183 gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
184 linux,code = <ASPEED_GPIO(I, 0)>;
188 label = "PSU2_PRESENT";
189 gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
190 linux,code = <ASPEED_GPIO(I, 1)>;
195 gpioA0mux: mux-controller {
196 compatible = "gpio-mux";
197 #mux-control-cells = <0>;
198 mux-gpios = <&gpio ASPEED_GPIO(A, 0) GPIO_ACTIVE_LOW>;
202 compatible = "io-channel-mux";
203 io-channels = <&adc 0>;
204 #io-channel-cells = <1>;
205 io-channel-names = "parent";
206 mux-controls = <&gpioA0mux>;
207 channels = "s0", "s1";
211 compatible = "io-channel-mux";
212 io-channels = <&adc 1>;
213 #io-channel-cells = <1>;
214 io-channel-names = "parent";
215 mux-controls = <&gpioA0mux>;
216 channels = "s0", "s1";
220 compatible = "io-channel-mux";
221 io-channels = <&adc 2>;
222 #io-channel-cells = <1>;
223 io-channel-names = "parent";
224 mux-controls = <&gpioA0mux>;
225 channels = "s0", "s1";
229 compatible = "io-channel-mux";
230 io-channels = <&adc 3>;
231 #io-channel-cells = <1>;
232 io-channel-names = "parent";
233 mux-controls = <&gpioA0mux>;
234 channels = "s0", "s1";
238 compatible = "io-channel-mux";
239 io-channels = <&adc 4>;
240 #io-channel-cells = <1>;
241 io-channel-names = "parent";
242 mux-controls = <&gpioA0mux>;
243 channels = "s0", "s1";
247 compatible = "io-channel-mux";
248 io-channels = <&adc 5>;
249 #io-channel-cells = <1>;
250 io-channel-names = "parent";
251 mux-controls = <&gpioA0mux>;
252 channels = "s0", "s1";
256 compatible = "io-channel-mux";
257 io-channels = <&adc 6>;
258 #io-channel-cells = <1>;
259 io-channel-names = "parent";
260 mux-controls = <&gpioA0mux>;
261 channels = "s0", "s1";
265 compatible = "io-channel-mux";
266 io-channels = <&adc 7>;
267 #io-channel-cells = <1>;
268 io-channel-names = "parent";
269 mux-controls = <&gpioA0mux>;
270 channels = "s0", "s1";
274 compatible = "io-channel-mux";
275 io-channels = <&adc 8>;
276 #io-channel-cells = <1>;
277 io-channel-names = "parent";
278 mux-controls = <&gpioA0mux>;
279 channels = "s0", "s1";
283 compatible = "io-channel-mux";
284 io-channels = <&adc 9>;
285 #io-channel-cells = <1>;
286 io-channel-names = "parent";
287 mux-controls = <&gpioA0mux>;
288 channels = "s0", "s1";
292 compatible = "io-channel-mux";
293 io-channels = <&adc 10>;
294 #io-channel-cells = <1>;
295 io-channel-names = "parent";
296 mux-controls = <&gpioA0mux>;
297 channels = "s0", "s1";
301 compatible = "io-channel-mux";
302 io-channels = <&adc 11>;
303 #io-channel-cells = <1>;
304 io-channel-names = "parent";
305 mux-controls = <&gpioA0mux>;
306 channels = "s0", "s1";
310 compatible = "io-channel-mux";
311 io-channels = <&adc 12>;
312 #io-channel-cells = <1>;
313 io-channel-names = "parent";
314 mux-controls = <&gpioA0mux>;
315 channels = "s0", "s1";
319 compatible = "io-channel-mux";
320 io-channels = <&adc 13>;
321 #io-channel-cells = <1>;
322 io-channel-names = "parent";
323 mux-controls = <&gpioA0mux>;
324 channels = "s0", "s1";
328 compatible = "iio-hwmon";
329 io-channels = <&adc0mux 0>, <&adc0mux 1>,
330 <&adc1mux 0>, <&adc1mux 1>,
331 <&adc2mux 0>, <&adc2mux 1>,
332 <&adc3mux 0>, <&adc3mux 1>,
333 <&adc4mux 0>, <&adc4mux 1>,
334 <&adc5mux 0>, <&adc5mux 1>,
335 <&adc6mux 0>, <&adc6mux 1>,
336 <&adc7mux 0>, <&adc7mux 1>,
337 <&adc8mux 0>, <&adc8mux 1>,
338 <&adc9mux 0>, <&adc9mux 1>,
339 <&adc10mux 0>, <&adc10mux 1>,
340 <&adc11mux 0>, <&adc11mux 1>,
341 <&adc12mux 0>, <&adc12mux 1>,
342 <&adc13mux 0>, <&adc13mux 1>,
343 <&adc 14>, <&adc 15>;
353 /* spi-max-frequency = <50000000>; */
354 #include "openbmc-flash-layout-64.dtsi"
361 #include "openbmc-flash-layout-64-alt.dtsi"
367 pinctrl-names = "default";
368 pinctrl-0 = <&pinctrl_spi1_default>;
374 /* spi-max-frequency = <100000000>; */
376 compatible = "fixed-partitions";
377 #address-cells = <1>;
380 reg = <0x400000 0x1C00000>;
389 pinctrl-names = "default";
390 pinctrl-0 = <&pinctrl_txd1_default
391 &pinctrl_rxd1_default
392 &pinctrl_ncts1_default
393 &pinctrl_nrts1_default>;
398 pinctrl-names = "default";
399 pinctrl-0 = <&pinctrl_txd2_default
400 &pinctrl_rxd2_default>;
405 pinctrl-names = "default";
406 pinctrl-0 = <&pinctrl_txd3_default
407 &pinctrl_rxd3_default>;
412 pinctrl-names = "default";
413 pinctrl-0 = <&pinctrl_txd4_default
414 &pinctrl_rxd4_default>;
424 pinctrl-names = "default";
425 pinctrl-0 = <&pinctrl_rmii1_default>;
426 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
427 <&syscon ASPEED_CLK_MAC1RCLK>;
428 clock-names = "MACCLK", "RCLK";
434 pinctrl-names = "default";
435 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
453 compatible = "microchip,24c64", "atmel,24c64";
458 inlet_mem2: tmp175@28 {
459 compatible = "ti,tmp175";
463 inlet_cpu: tmp175@29 {
464 compatible = "ti,tmp175";
468 inlet_mem1: tmp175@2a {
469 compatible = "ti,tmp175";
473 outlet_cpu: tmp175@2b {
474 compatible = "ti,tmp175";
479 compatible = "ti,tmp175";
484 compatible = "ti,tmp175";
492 compatible = "nxp,pcf85063a";
500 compatible = "nxp,pca9548";
501 #address-cells = <1>;
504 i2c-mux-idle-disconnect;
506 nvmeslot_0_7: i2c@3 {
507 #address-cells = <1>;
514 compatible = "nxp,pca9548";
515 #address-cells = <1>;
518 i2c-mux-idle-disconnect;
520 nvmeslot_8_15: i2c@4 {
521 #address-cells = <1>;
526 nvmeslot_16_23: i2c@3 {
527 #address-cells = <1>;
535 compatible = "nxp,pca9545";
536 #address-cells = <1>;
539 i2c-mux-idle-disconnect;
542 #address-cells = <1>;
548 #address-cells = <1>;
559 compatible = "nxp,pca9548";
560 #address-cells = <1>;
563 i2c-mux-idle-disconnect;
566 #address-cells = <1>;
571 #address-cells = <1>;
576 #address-cells = <1>;
581 #address-cells = <1>;
586 #address-cells = <1>;
591 #address-cells = <1>;
596 #address-cells = <1>;
601 #address-cells = <1>;
613 compatible = "nxp,pca9548";
614 #address-cells = <1>;
617 i2c-mux-idle-disconnect;
620 #address-cells = <1>;
625 #address-cells = <1>;
630 #address-cells = <1>;
635 #address-cells = <1>;
640 #address-cells = <1>;
645 #address-cells = <1>;
650 #address-cells = <1>;
655 #address-cells = <1>;
666 compatible = "nxp,pca9548";
667 #address-cells = <1>;
670 i2c-mux-idle-disconnect;
673 #address-cells = <1>;
678 #address-cells = <1>;
683 #address-cells = <1>;
688 #address-cells = <1>;
693 #address-cells = <1>;
698 #address-cells = <1>;
703 #address-cells = <1>;
708 #address-cells = <1>;
718 compatible = "pmbus";
723 compatible = "pmbus";
743 compatible = "adi,adm1278";
748 compatible = "adi,adm1278";
755 memory-region = <&gfx_memory>;
759 aspeed,external-nodes = <&gfx &lhc>;
764 pinctrl-names = "default";
765 pinctrl-0 = <&pinctrl_pwm2_default &pinctrl_pwm3_default
766 &pinctrl_pwm4_default &pinctrl_pwm5_default
767 &pinctrl_pwm6_default &pinctrl_pwm7_default>;
771 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
776 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
781 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
786 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
791 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
796 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
801 aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
806 aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
811 aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
816 aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
821 aspeed,fan-tach-ch = /bits/ 8 <0x0e>;
826 aspeed,fan-tach-ch = /bits/ 8 <0x0f>;
841 memory-region = <&video_engine_memory>;
846 /*A0-A7*/ "","","","S0_BMC_SPECIAL_BOOT","","","","",
847 /*B0-B7*/ "BMC_SELECT_EEPROM","","","",
848 "POWER_BUTTON","","","",
849 /*C0-C7*/ "","","","","","","","",
850 /*D0-D7*/ "","","","","","","","",
851 /*E0-E7*/ "","","","","","","","",
852 /*F0-F7*/ "","","BMC_SYS_PSON_L","S0_DDR_SAVE","PGOOD",
854 /*G0-G7*/ "host0-ready","SHD_REQ_L","","S0_OVERTEMP_L","","",
856 /*H0-H7*/ "","","","","PSU1_VIN_GOOD","PSU2_VIN_GOOD","","",
857 /*I0-I7*/ "PSU1_PRESENT","PSU2_PRESENT","S1_BMC_SPECIAL_BOOT",
859 /*J0-J7*/ "S0_HIGHTEMP_L","S0_FAULT_L","S0_SCP_AUTH_FAIL_L","",
861 /*K0-K7*/ "","","","","","","","",
862 /*L0-L7*/ "","","","BMC_SYSRESET_L","SPI_AUTH_FAIL_L","","","",
863 /*M0-M7*/ "","","","","","","","",
864 /*N0-N7*/ "","","","","","","","",
865 /*O0-O7*/ "","","","","","","","",
866 /*P0-P7*/ "","","","","","","","",
867 /*Q0-Q7*/ "","","","","","UID_BUTTON","","",
868 /*R0-R7*/ "","","BMC_EXT_HIGHTEMP_L","OCP_AUX_PWREN",
869 "OCP_MAIN_PWREN","RESET_BUTTON","","",
870 /*S0-S7*/ "","","","","rtc-battery-voltage-read-enable","","","",
871 /*T0-T7*/ "","","","","","","","",
872 /*U0-U7*/ "","","","","","","","",
873 /*V0-V7*/ "","","","","","","","",
874 /*W0-W7*/ "","","","","","","","",
875 /*X0-X7*/ "","","","","","","","",
876 /*Y0-Y7*/ "","","","","","","","",
877 /*Z0-Z7*/ "S0_BMC_PLIMIT","S1_FAULT_L","S1_FW_BOOT_OK","","",
878 "S1_SCP_AUTH_FAIL_L","S1_OVERTEMP_L","",
879 /*AA0-AA7*/ "","","","","","","","",
880 /*AB0-AB7*/ "S1_HIGHTEMP_L","S1_BMC_PLIMIT","S0_BMC_DDR_ADDR",
881 "S1_BMC_DDR_ADR","","","","",
882 /*AC0-AC7*/ "SYS_PWR_GD","","","","","BMC_READY","SLAVE_PRESENT_L",
887 gpios = <ASPEED_GPIO(Y, 2) GPIO_ACTIVE_HIGH>;
889 line-name = "BMC_I2C4_O_EN";