1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree file for the Linksys WRT1900AC (Mamba).
5 * Note: this board is shipped with a new generation boot loader that
6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
7 * is used, the CONFIG_DEBUG_MVEBU_UART0_ALTERNATE option should be
10 * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
12 * Based on armada-xp-axpwifiap.dts:
14 * Copyright (C) 2013 Marvell
16 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
20 #include <dt-bindings/gpio/gpio.h>
21 #include <dt-bindings/input/input.h>
22 #include "armada-xp-mv78230.dtsi"
25 model = "Linksys WRT1900AC";
26 compatible = "linksys,mamba", "marvell,armadaxp-mv78230",
27 "marvell,armadaxp", "marvell,armada-370-xp";
30 bootargs = "console=ttyS0,115200";
35 device_type = "memory";
36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
40 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
41 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
42 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
43 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
44 MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
49 /* No crystal connected to the internal RTC */
53 /* J10: VCC, NC, RX, NC, TX, GND */
64 pinctrl-0 = <&ge0_rgmii_pins>;
65 pinctrl-names = "default";
67 phy-mode = "rgmii-id";
68 buffer-manager = <&bm>;
78 pinctrl-0 = <&ge1_rgmii_pins>;
79 pinctrl-names = "default";
81 phy-mode = "rgmii-id";
82 buffer-manager = <&bm>;
91 /* USB part of the eSATA/USB 2.0 port */
98 clock-frequency = <100000>;
101 compatible = "ti,tmp421";
106 #address-cells = <1>;
109 compatible = "ti,tlc59116";
113 label = "mamba:amber:wan";
118 label = "mamba:white:wan";
123 label = "mamba:white:wlan_2g";
128 label = "mamba:white:wlan_5g";
133 label = "mamba:white:esata";
135 linux,default-trigger = "disk-activity";
139 label = "mamba:white:usb2";
144 label = "mamba:white:usb3_1";
149 label = "mamba:white:usb3_2";
154 label = "mamba:white:wps";
159 label = "mamba:amber:wps";
176 compatible = "gpio-keys";
177 pinctrl-0 = <&keys_pin>;
178 pinctrl-names = "default";
182 linux,code = <KEY_WPS_BUTTON>;
183 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
187 label = "Factory Reset Button";
188 linux,code = <KEY_RESTART>;
189 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
194 compatible = "gpio-leds";
195 pinctrl-0 = <&power_led_pin>;
196 pinctrl-names = "default";
199 label = "mamba:white:power";
200 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
201 default-state = "on";
206 /* SUNON HA4010V4-0000-C99 */
208 compatible = "pwm-fan";
209 pwms = <&gpio0 24 4000>;
216 /* Etron EJ168 USB 3.0 controller */
222 /* First mini-PCIe port */
228 /* Second mini-PCIe port */
238 marvell,pins = "mpp32", "mpp33";
239 marvell,function = "gpio";
242 power_led_pin: power-led-pin {
243 marvell,pins = "mpp40";
244 marvell,function = "gpio";
247 gpio_fan_pin: gpio-fan-pin {
248 marvell,pins = "mpp24";
249 marvell,function = "gpio";
257 #address-cells = <1>;
259 compatible = "everspin,mr25h256";
260 reg = <0>; /* Chip select 0 */
261 spi-max-frequency = <40000000>;
269 compatible = "marvell,mv88e6085";
270 #address-cells = <1>;
275 #address-cells = <1>;
321 label = "pxa3xx_nand-0";
323 marvell,nand-keep-config;
325 nand-ecc-strength = <4>;
326 nand-ecc-step-size = <512>;
329 compatible = "fixed-partitions";
330 #address-cells = <1>;
335 reg = <0x0000000 0x100000>; /* 1MB */
341 reg = <0x100000 0x40000>; /* 256KB */
346 reg = <0x140000 0x40000>; /* 256KB */
351 reg = <0x900000 0x100000>; /* 1MB */
355 /* kernel1 overlaps with rootfs1 by design */
358 reg = <0xa00000 0x2800000>; /* 40MB */
363 reg = <0xd00000 0x2500000>; /* 37MB */
366 /* kernel2 overlaps with rootfs2 by design */
369 reg = <0x3200000 0x2800000>; /* 40MB */
374 reg = <0x3500000 0x2500000>; /* 37MB */
378 * 38MB, last MB is for the BBT, not writable
382 reg = <0x5a00000 0x2600000>;
386 * Unused area between "s_env" and "devinfo".
387 * Moved here because otherwise the renumbered
388 * partitions would break the bootloader
392 label = "unused_area";
393 reg = <0x180000 0x780000>; /* 7.5MB */