1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-XC3-24G4XG board
5 * Copyright (C) 2016 Allied Telesis Labs
7 * Based on armada-xp-db.dts
9 * Note: this Device Tree assumes that the bootloader has remapped the
10 * internal registers to 0xf1000000 (instead of the default
11 * 0xd0000000). The 0xf1000000 is the default used by the recent,
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
13 * boards were delivered with an older version of the bootloader that
14 * left internal registers mapped at 0xd0000000. If you are in this
15 * situation, you should either update your bootloader (preferred
16 * solution) or the below Device Tree should be adjusted.
20 #include "armada-xp-98dx3336.dtsi"
23 model = "DB-XC3-24G4XG";
24 compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
27 bootargs = "console=ttyS0,115200 earlyprintk";
31 device_type = "memory";
32 reg = <0 0x00000000 0 0x40000000>; /* 1 GB */
39 /* Device Bus parameters are required */
42 devbus,bus-width = <16>;
43 devbus,turn-off-ps = <60000>;
44 devbus,badr-skew-ps = <0>;
45 devbus,acc-first-ps = <124000>;
46 devbus,acc-next-ps = <248000>;
47 devbus,rd-setup-ps = <0>;
48 devbus,rd-hold-ps = <0>;
50 /* Write parameters */
51 devbus,sync-enable = <0>;
52 devbus,wr-high-ps = <60000>;
53 devbus,wr-low-ps = <60000>;
54 devbus,ale-wr-ps = <60000>;
66 clock-frequency = <100000>;
72 label = "pxa3xx_nand-0";
74 marvell,nand-keep-config;
76 nand-ecc-strength = <4>;
77 nand-ecc-step-size = <512>;
86 compatible = "m25p64";
87 reg = <0>; /* Chip select 0 */
88 spi-max-frequency = <20000000>;
92 reg = <0x00000000 0x00100000>;
95 partition@u-boot-env {
96 reg = <0x00100000 0x00040000>;
100 reg = <0x00140000 0x00ec0000>;