GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / armada-38x.dtsi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Device Tree Include file for Marvell Armada 38x family of SoCs.
4  *
5  * Copyright (C) 2014 Marvell
6  *
7  * Lior Amsalem <alior@marvell.com>
8  * Gregory CLEMENT <gregory.clement@free-electrons.com>
9  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10  */
11
12 #include "skeleton.dtsi"
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15
16 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
17
18 / {
19         model = "Marvell Armada 38x family SoC";
20         compatible = "marvell,armada380";
21
22         aliases {
23                 gpio0 = &gpio0;
24                 gpio1 = &gpio1;
25                 serial0 = &uart0;
26                 serial1 = &uart1;
27         };
28
29         pmu {
30                 compatible = "arm,cortex-a9-pmu";
31                 interrupts-extended = <&mpic 3>;
32         };
33
34         soc {
35                 compatible = "marvell,armada380-mbus", "simple-bus";
36                 #address-cells = <2>;
37                 #size-cells = <1>;
38                 controller = <&mbusc>;
39                 interrupt-parent = <&gic>;
40                 pcie-mem-aperture = <0xe0000000 0x8000000>;
41                 pcie-io-aperture  = <0xe8000000 0x100000>;
42
43                 bootrom {
44                         compatible = "marvell,bootrom";
45                         reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>;
46                 };
47
48                 devbus_bootcs: devbus-bootcs {
49                         compatible = "marvell,mvebu-devbus";
50                         reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
51                         ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
52                         #address-cells = <1>;
53                         #size-cells = <1>;
54                         clocks = <&coreclk 0>;
55                         status = "disabled";
56                 };
57
58                 devbus_cs0: devbus-cs0 {
59                         compatible = "marvell,mvebu-devbus";
60                         reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
61                         ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
62                         #address-cells = <1>;
63                         #size-cells = <1>;
64                         clocks = <&coreclk 0>;
65                         status = "disabled";
66                 };
67
68                 devbus_cs1: devbus-cs1 {
69                         compatible = "marvell,mvebu-devbus";
70                         reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
71                         ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
72                         #address-cells = <1>;
73                         #size-cells = <1>;
74                         clocks = <&coreclk 0>;
75                         status = "disabled";
76                 };
77
78                 devbus_cs2: devbus-cs2 {
79                         compatible = "marvell,mvebu-devbus";
80                         reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
81                         ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
82                         #address-cells = <1>;
83                         #size-cells = <1>;
84                         clocks = <&coreclk 0>;
85                         status = "disabled";
86                 };
87
88                 devbus_cs3: devbus-cs3 {
89                         compatible = "marvell,mvebu-devbus";
90                         reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
91                         ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
92                         #address-cells = <1>;
93                         #size-cells = <1>;
94                         clocks = <&coreclk 0>;
95                         status = "disabled";
96                 };
97
98                 internal-regs {
99                         compatible = "simple-bus";
100                         #address-cells = <1>;
101                         #size-cells = <1>;
102                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
103
104                         L2: cache-controller@8000 {
105                                 compatible = "arm,pl310-cache";
106                                 reg = <0x8000 0x1000>;
107                                 cache-unified;
108                                 cache-level = <2>;
109                                 arm,double-linefill-incr = <0>;
110                                 arm,double-linefill-wrap = <0>;
111                                 arm,double-linefill = <0>;
112                                 prefetch-data = <1>;
113                         };
114
115                         scu@c000 {
116                                 compatible = "arm,cortex-a9-scu";
117                                 reg = <0xc000 0x58>;
118                         };
119
120                         timer@c200 {
121                                 compatible = "arm,cortex-a9-global-timer";
122                                 reg = <0xc200 0x20>;
123                                 interrupts = <GIC_PPI 11 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
124                                 clocks = <&coreclk 2>;
125                         };
126
127                         timer@c600 {
128                                 compatible = "arm,cortex-a9-twd-timer";
129                                 reg = <0xc600 0x20>;
130                                 interrupts = <GIC_PPI 13 (IRQ_TYPE_EDGE_RISING | GIC_CPU_MASK_SIMPLE(2))>;
131                                 clocks = <&coreclk 2>;
132                         };
133
134                         gic: interrupt-controller@d000 {
135                                 compatible = "arm,cortex-a9-gic";
136                                 #interrupt-cells = <3>;
137                                 #size-cells = <0>;
138                                 interrupt-controller;
139                                 reg = <0xd000 0x1000>,
140                                       <0xc100 0x100>;
141                         };
142
143                         i2c0: i2c@11000 {
144                                 compatible = "marvell,mv78230-a0-i2c", "marvell,mv64xxx-i2c";
145                                 reg = <0x11000 0x20>;
146                                 #address-cells = <1>;
147                                 #size-cells = <0>;
148                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
149                                 timeout-ms = <1000>;
150                                 clocks = <&coreclk 0>;
151                                 status = "disabled";
152                         };
153
154                         i2c1: i2c@11100 {
155                                 compatible = "marvell,mv78230-a0-i2c", "marvell,mv64xxx-i2c";
156                                 reg = <0x11100 0x20>;
157                                 #address-cells = <1>;
158                                 #size-cells = <0>;
159                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
160                                 timeout-ms = <1000>;
161                                 clocks = <&coreclk 0>;
162                                 status = "disabled";
163                         };
164
165                         uart0: serial@12000 {
166                                 compatible = "marvell,armada-38x-uart", "ns16550a";
167                                 reg = <0x12000 0x100>;
168                                 reg-shift = <2>;
169                                 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
170                                 reg-io-width = <1>;
171                                 clocks = <&coreclk 0>;
172                                 status = "disabled";
173                         };
174
175                         uart1: serial@12100 {
176                                 compatible = "marvell,armada-38x-uart", "ns16550a";
177                                 reg = <0x12100 0x100>;
178                                 reg-shift = <2>;
179                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
180                                 reg-io-width = <1>;
181                                 clocks = <&coreclk 0>;
182                                 status = "disabled";
183                         };
184
185                         pinctrl: pinctrl@18000 {
186                                 reg = <0x18000 0x20>;
187
188                                 ge0_rgmii_pins: ge-rgmii-pins-0 {
189                                         marvell,pins = "mpp6", "mpp7", "mpp8",
190                                                        "mpp9", "mpp10", "mpp11",
191                                                        "mpp12", "mpp13", "mpp14",
192                                                        "mpp15", "mpp16", "mpp17";
193                                         marvell,function = "ge0";
194                                 };
195
196                                 ge1_rgmii_pins: ge-rgmii-pins-1 {
197                                         marvell,pins = "mpp21", "mpp27", "mpp28",
198                                                        "mpp29", "mpp30", "mpp31",
199                                                        "mpp32", "mpp37", "mpp38",
200                                                        "mpp39", "mpp40", "mpp41";
201                                         marvell,function = "ge1";
202                                 };
203
204                                 i2c0_pins: i2c-pins-0 {
205                                         marvell,pins = "mpp2", "mpp3";
206                                         marvell,function = "i2c0";
207                                 };
208
209                                 mdio_pins: mdio-pins {
210                                         marvell,pins = "mpp4", "mpp5";
211                                         marvell,function = "ge";
212                                 };
213
214                                 ref_clk0_pins: ref-clk-pins-0 {
215                                         marvell,pins = "mpp45";
216                                         marvell,function = "ref";
217                                 };
218
219                                 ref_clk1_pins: ref-clk-pins-1 {
220                                         marvell,pins = "mpp46";
221                                         marvell,function = "ref";
222                                 };
223
224                                 spi0_pins: spi-pins-0 {
225                                         marvell,pins = "mpp22", "mpp23", "mpp24",
226                                                        "mpp25";
227                                         marvell,function = "spi0";
228                                 };
229
230                                 spi1_pins: spi-pins-1 {
231                                         marvell,pins = "mpp56", "mpp57", "mpp58",
232                                                        "mpp59";
233                                         marvell,function = "spi1";
234                                 };
235
236                                 nand_pins: nand-pins {
237                                         marvell,pins = "mpp22", "mpp34", "mpp23",
238                                                        "mpp33", "mpp38", "mpp28",
239                                                        "mpp40", "mpp42", "mpp35",
240                                                        "mpp36", "mpp25", "mpp30",
241                                                        "mpp32";
242                                         marvell,function = "dev";
243                                 };
244
245                                 nand_rb: nand-rb {
246                                         marvell,pins = "mpp41";
247                                         marvell,function = "nand";
248                                 };
249
250                                 uart0_pins: uart-pins-0 {
251                                         marvell,pins = "mpp0", "mpp1";
252                                         marvell,function = "ua0";
253                                 };
254
255                                 uart1_pins: uart-pins-1 {
256                                         marvell,pins = "mpp19", "mpp20";
257                                         marvell,function = "ua1";
258                                 };
259
260                                 sdhci_pins: sdhci-pins {
261                                         marvell,pins = "mpp48", "mpp49", "mpp50",
262                                                        "mpp52", "mpp53", "mpp54",
263                                                        "mpp55", "mpp57", "mpp58",
264                                                        "mpp59";
265                                         marvell,function = "sd0";
266                                 };
267
268                                 sata0_pins: sata-pins-0 {
269                                         marvell,pins = "mpp20";
270                                         marvell,function = "sata0";
271                                 };
272
273                                 sata1_pins: sata-pins-1 {
274                                         marvell,pins = "mpp19";
275                                         marvell,function = "sata1";
276                                 };
277
278                                 sata2_pins: sata-pins-2 {
279                                         marvell,pins = "mpp47";
280                                         marvell,function = "sata2";
281                                 };
282
283                                 sata3_pins: sata-pins-3 {
284                                         marvell,pins = "mpp44";
285                                         marvell,function = "sata3";
286                                 };
287                         };
288
289                         gpio0: gpio@18100 {
290                                 compatible = "marvell,armada-370-gpio",
291                                              "marvell,orion-gpio";
292                                 reg = <0x18100 0x40>, <0x181c0 0x08>;
293                                 reg-names = "gpio", "pwm";
294                                 ngpios = <32>;
295                                 gpio-controller;
296                                 #gpio-cells = <2>;
297                                 #pwm-cells = <2>;
298                                 interrupt-controller;
299                                 #interrupt-cells = <2>;
300                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
301                                              <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
302                                              <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
303                                              <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
304                                 clocks = <&coreclk 0>;
305                         };
306
307                         gpio1: gpio@18140 {
308                                 compatible = "marvell,armada-370-gpio",
309                                              "marvell,orion-gpio";
310                                 reg = <0x18140 0x40>, <0x181c8 0x08>;
311                                 reg-names = "gpio", "pwm";
312                                 ngpios = <28>;
313                                 gpio-controller;
314                                 #gpio-cells = <2>;
315                                 #pwm-cells = <2>;
316                                 interrupt-controller;
317                                 #interrupt-cells = <2>;
318                                 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
319                                              <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
320                                              <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
321                                              <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
322                                 clocks = <&coreclk 0>;
323                         };
324
325                         systemc: system-controller@18200 {
326                                 compatible = "marvell,armada-380-system-controller",
327                                              "marvell,armada-370-xp-system-controller";
328                                 reg = <0x18200 0x100>;
329                         };
330
331                         gateclk: clock-gating-control@18220 {
332                                 compatible = "marvell,armada-380-gating-clock";
333                                 reg = <0x18220 0x4>;
334                                 clocks = <&coreclk 0>;
335                                 #clock-cells = <1>;
336                         };
337
338                         coreclk: mvebu-sar@18600 {
339                                 compatible = "marvell,armada-380-core-clock";
340                                 reg = <0x18600 0x04>;
341                                 #clock-cells = <1>;
342                         };
343
344                         mbusc: mbus-controller@20000 {
345                                 compatible = "marvell,mbus-controller";
346                                 reg = <0x20000 0x100>, <0x20180 0x20>,
347                                       <0x20250 0x8>;
348                         };
349
350                         mpic: interrupt-controller@20a00 {
351                                 compatible = "marvell,mpic";
352                                 reg = <0x20a00 0x2d0>, <0x21070 0x58>;
353                                 #interrupt-cells = <1>;
354                                 #size-cells = <1>;
355                                 interrupt-controller;
356                                 msi-controller;
357                                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
358                         };
359
360                         timer: timer@20300 {
361                                 compatible = "marvell,armada-380-timer",
362                                              "marvell,armada-xp-timer";
363                                 reg = <0x20300 0x30>, <0x21040 0x30>;
364                                 interrupts-extended = <&gic  GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
365                                                       <&gic  GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
366                                                       <&gic  GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
367                                                       <&gic  GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
368                                                       <&mpic 5>,
369                                                       <&mpic 6>;
370                                 clocks = <&coreclk 2>, <&refclk>;
371                                 clock-names = "nbclk", "fixed";
372                         };
373
374                         watchdog: watchdog@20300 {
375                                 compatible = "marvell,armada-380-wdt";
376                                 reg = <0x20300 0x34>, <0x20704 0x4>, <0x18260 0x4>;
377                                 clocks = <&coreclk 2>, <&refclk>;
378                                 clock-names = "nbclk", "fixed";
379                         };
380
381                         cpurst: cpurst@20800 {
382                                 compatible = "marvell,armada-370-cpu-reset";
383                                 reg = <0x20800 0x10>;
384                         };
385
386                         mpcore-soc-ctrl@20d20 {
387                                 compatible = "marvell,armada-380-mpcore-soc-ctrl";
388                                 reg = <0x20d20 0x6c>;
389                         };
390
391                         coherencyfab: coherency-fabric@21010 {
392                                 compatible = "marvell,armada-380-coherency-fabric";
393                                 reg = <0x21010 0x1c>;
394                         };
395
396                         pmsu: pmsu@22000 {
397                                 compatible = "marvell,armada-380-pmsu";
398                                 reg = <0x22000 0x1000>;
399                         };
400
401                         /*
402                          * As a special exception to the "order by
403                          * register address" rule, the eth0 node is
404                          * placed here to ensure that it gets
405                          * registered as the first interface, since
406                          * the network subsystem doesn't allow naming
407                          * interfaces using DT aliases. Without this,
408                          * the ordering of interfaces is different
409                          * from the one used in U-Boot and the
410                          * labeling of interfaces on the boards, which
411                          * is very confusing for users.
412                          */
413                         eth0: ethernet@70000 {
414                                 compatible = "marvell,armada-370-neta";
415                                 reg = <0x70000 0x4000>;
416                                 interrupts-extended = <&mpic 8>;
417                                 clocks = <&gateclk 4>;
418                                 tx-csum-limit = <9800>;
419                                 status = "disabled";
420                         };
421
422                         eth1: ethernet@30000 {
423                                 compatible = "marvell,armada-370-neta";
424                                 reg = <0x30000 0x4000>;
425                                 interrupts-extended = <&mpic 10>;
426                                 clocks = <&gateclk 3>;
427                                 status = "disabled";
428                         };
429
430                         eth2: ethernet@34000 {
431                                 compatible = "marvell,armada-370-neta";
432                                 reg = <0x34000 0x4000>;
433                                 interrupts-extended = <&mpic 12>;
434                                 clocks = <&gateclk 2>;
435                                 status = "disabled";
436                         };
437
438                         usb0: usb@58000 {
439                                 compatible = "marvell,orion-ehci";
440                                 reg = <0x58000 0x500>;
441                                 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
442                                 clocks = <&gateclk 18>;
443                                 status = "disabled";
444                         };
445
446                         xor0: xor@60800 {
447                                 compatible = "marvell,armada-380-xor", "marvell,orion-xor";
448                                 reg = <0x60800 0x100
449                                        0x60a00 0x100>;
450                                 clocks = <&gateclk 22>;
451                                 status = "okay";
452
453                                 xor00 {
454                                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
455                                         dmacap,memcpy;
456                                         dmacap,xor;
457                                 };
458                                 xor01 {
459                                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
460                                         dmacap,memcpy;
461                                         dmacap,xor;
462                                         dmacap,memset;
463                                 };
464                         };
465
466                         xor1: xor@60900 {
467                                 compatible = "marvell,armada-380-xor", "marvell,orion-xor";
468                                 reg = <0x60900 0x100
469                                        0x60b00 0x100>;
470                                 clocks = <&gateclk 28>;
471                                 status = "okay";
472
473                                 xor10 {
474                                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
475                                         dmacap,memcpy;
476                                         dmacap,xor;
477                                 };
478                                 xor11 {
479                                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
480                                         dmacap,memcpy;
481                                         dmacap,xor;
482                                         dmacap,memset;
483                                 };
484                         };
485
486                         mdio: mdio@72004 {
487                                 #address-cells = <1>;
488                                 #size-cells = <0>;
489                                 compatible = "marvell,orion-mdio";
490                                 reg = <0x72004 0x4>;
491                                 clocks = <&gateclk 4>;
492                         };
493
494                         cesa: crypto@90000 {
495                                 compatible = "marvell,armada-38x-crypto";
496                                 reg = <0x90000 0x10000>;
497                                 reg-names = "regs";
498                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
499                                              <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
500                                 clocks = <&gateclk 23>, <&gateclk 21>,
501                                          <&gateclk 14>, <&gateclk 16>;
502                                 clock-names = "cesa0", "cesa1",
503                                               "cesaz0", "cesaz1";
504                                 marvell,crypto-srams = <&crypto_sram0>,
505                                                        <&crypto_sram1>;
506                                 marvell,crypto-sram-size = <0x800>;
507                         };
508
509                         rtc: rtc@a3800 {
510                                 compatible = "marvell,armada-380-rtc";
511                                 reg = <0xa3800 0x20>, <0x184a0 0x0c>;
512                                 reg-names = "rtc", "rtc-soc";
513                                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
514                         };
515
516                         ahci0: sata@a8000 {
517                                 compatible = "marvell,armada-380-ahci";
518                                 reg = <0xa8000 0x2000>;
519                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
520                                 clocks = <&gateclk 15>;
521                                 status = "disabled";
522                         };
523
524                         bm: bm@c8000 {
525                                 compatible = "marvell,armada-380-neta-bm";
526                                 reg = <0xc8000 0xac>;
527                                 clocks = <&gateclk 13>;
528                                 internal-mem = <&bm_bppi>;
529                                 status = "disabled";
530                         };
531
532                         ahci1: sata@e0000 {
533                                 compatible = "marvell,armada-380-ahci";
534                                 reg = <0xe0000 0x2000>;
535                                 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
536                                 clocks = <&gateclk 30>;
537                                 status = "disabled";
538                         };
539
540                         coredivclk: clock@e4250 {
541                                 compatible = "marvell,armada-380-corediv-clock";
542                                 reg = <0xe4250 0xc>;
543                                 #clock-cells = <1>;
544                                 clocks = <&mainpll>;
545                                 clock-output-names = "nand";
546                         };
547
548                         thermal: thermal@e8078 {
549                                 compatible = "marvell,armada380-thermal";
550                                 reg = <0xe4078 0x4>, <0xe4070 0x8>;
551                                 status = "okay";
552                         };
553
554                         nand_controller: nand-controller@d0000 {
555                                 compatible = "marvell,armada370-nand-controller";
556                                 reg = <0xd0000 0x54>;
557                                 #address-cells = <1>;
558                                 #size-cells = <0>;
559                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
560                                 clocks = <&coredivclk 0>;
561                                 status = "disabled";
562                         };
563
564                         sdhci: sdhci@d8000 {
565                                 compatible = "marvell,armada-380-sdhci";
566                                 reg-names = "sdhci", "mbus", "conf-sdio3";
567                                 reg = <0xd8000 0x1000>,
568                                         <0xdc000 0x100>,
569                                         <0x18454 0x4>;
570                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
571                                 clocks = <&gateclk 17>;
572                                 mrvl,clk-delay-cycles = <0x1F>;
573                                 status = "disabled";
574                         };
575
576                         usb3_0: usb3@f0000 {
577                                 compatible = "marvell,armada-380-xhci";
578                                 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
579                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
580                                 clocks = <&gateclk 9>;
581                                 status = "disabled";
582                         };
583
584                         usb3_1: usb3@f8000 {
585                                 compatible = "marvell,armada-380-xhci";
586                                 reg = <0xf8000 0x4000>,<0xfc000 0x4000>;
587                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
588                                 clocks = <&gateclk 10>;
589                                 status = "disabled";
590                         };
591                 };
592
593                 crypto_sram0: sa-sram0 {
594                         compatible = "mmio-sram";
595                         reg = <MBUS_ID(0x09, 0x19) 0 0x800>;
596                         clocks = <&gateclk 23>;
597                         #address-cells = <1>;
598                         #size-cells = <1>;
599                         ranges = <0 MBUS_ID(0x09, 0x19) 0 0x800>;
600                 };
601
602                 crypto_sram1: sa-sram1 {
603                         compatible = "mmio-sram";
604                         reg = <MBUS_ID(0x09, 0x15) 0 0x800>;
605                         clocks = <&gateclk 21>;
606                         #address-cells = <1>;
607                         #size-cells = <1>;
608                         ranges = <0 MBUS_ID(0x09, 0x15) 0 0x800>;
609                 };
610
611                 bm_bppi: bm-bppi {
612                         compatible = "mmio-sram";
613                         reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>;
614                         ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
615                         #address-cells = <1>;
616                         #size-cells = <1>;
617                         clocks = <&gateclk 13>;
618                         no-memory-wc;
619                         status = "disabled";
620                 };
621
622                 spi0: spi@10600 {
623                         compatible = "marvell,armada-380-spi",
624                                         "marvell,orion-spi";
625                         reg = <MBUS_ID(0xf0, 0x01) 0x10600 0x50>;
626                         #address-cells = <1>;
627                         #size-cells = <0>;
628                         cell-index = <0>;
629                         interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
630                         clocks = <&coreclk 0>;
631                         status = "disabled";
632                 };
633
634                 spi1: spi@10680 {
635                         compatible = "marvell,armada-380-spi",
636                                         "marvell,orion-spi";
637                         reg = <MBUS_ID(0xf0, 0x01) 0x10680 0x50>;
638                         #address-cells = <1>;
639                         #size-cells = <0>;
640                         cell-index = <1>;
641                         interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
642                         clocks = <&coreclk 0>;
643                         status = "disabled";
644                 };
645         };
646
647         clocks {
648                 /* 1 GHz fixed main PLL */
649                 mainpll: mainpll {
650                         compatible = "fixed-clock";
651                         #clock-cells = <0>;
652                         clock-frequency = <1000000000>;
653                 };
654
655                 /* 25 MHz reference crystal */
656                 refclk: oscillator {
657                         compatible = "fixed-clock";
658                         #clock-cells = <0>;
659                         clock-frequency = <25000000>;
660                 };
661         };
662 };