arch/arm/boot/dts/armada-388-clearfog.dts

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
   4  *
   5  *  Copyright (C) 2015 Russell King
   6  */
   7
   8 /dts-v1/;
   9 #include "armada-388-clearfog.dtsi"
  10
  11 / {
  12         model = "SolidRun Clearfog A1";
  13         compatible = "solidrun,clearfog-a1", "marvell,armada388",
  14                 "marvell,armada385", "marvell,armada380";
  15
  16         soc {
  17                 internal-regs {
  18                         usb3@f0000 {
  19                                 /* CON2, nearest CPU, USB2 only. */
  20                                 status = "okay";
  21                         };
  22                 };
  23
  24                 pcie {
  25                         pcie@3,0 {
  26                                 /* Port 2, Lane 0. CON2, nearest CPU. */
  27                                 reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
  28                                 status = "okay";
  29                         };
  30                 };
  31         };
  32
  33         dsa@0 {
  34                 status = "disabled";
  35
  36                 compatible = "marvell,dsa";
  37                 dsa,ethernet = <&eth1>;
  38                 dsa,mii-bus = <&mdio>;
  39                 pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
  40                 pinctrl-names = "default";
  41                 #address-cells = <2>;
  42                 #size-cells = <0>;
  43
  44                 switch@0 {
  45                         #address-cells = <1>;
  46                         #size-cells = <0>;
  47                         reg = <4 0>;
  48
  49                         port@0 {
  50                                 reg = <0>;
  51                                 label = "lan5";
  52                         };
  53
  54                         port@1 {
  55                                 reg = <1>;
  56                                 label = "lan4";
  57                         };
  58
  59                         port@2 {
  60                                 reg = <2>;
  61                                 label = "lan3";
  62                         };
  63
  64                         port@3 {
  65                                 reg = <3>;
  66                                 label = "lan2";
  67                         };
  68
  69                         port@4 {
  70                                 reg = <4>;
  71                                 label = "lan1";
  72                         };
  73
  74                         port@5 {
  75                                 reg = <5>;
  76                                 label = "cpu";
  77                         };
  78
  79                         port@6 {
  80                                 /* 88E1512 external phy */
  81                                 reg = <6>;
  82                                 label = "lan6";
  83                                 fixed-link {
  84                                         speed = <1000>;
  85                                         full-duplex;
  86                                 };
  87                         };
  88                 };
  89         };
  90
  91         gpio-keys {
  92                 compatible = "gpio-keys";
  93                 pinctrl-0 = <&rear_button_pins>;
  94                 pinctrl-names = "default";
  95
  96                 button_0 {
  97                         /* The rear SW3 button */
  98                         label = "Rear Button";
  99                         gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
 100                         linux,can-disable;
 101                         linux,code = <BTN_0>;
 102                 };
 103         };
 104 };
 105
 106 &eth1 {
 107         /* ethernet@30000 */
 108         fixed-link {
 109                 speed = <1000>;
 110                 full-duplex;
 111         };
 112 };
 113
 114 &expander0 {
 115         /*
 116          * PCA9655 GPIO expander:
 117          *  0-CON3 CLKREQ#
 118          *  1-CON3 PERST#
 119          *  2-CON2 PERST#
 120          *  3-CON3 W_DISABLE
 121          *  4-CON2 CLKREQ#
 122          *  5-USB3 overcurrent
 123          *  6-USB3 power
 124          *  7-CON2 W_DISABLE
 125          *  8-JP4 P1
 126          *  9-JP4 P4
 127          * 10-JP4 P5
 128          * 11-m.2 DEVSLP
 129          * 12-SFP_LOS
 130          * 13-SFP_TX_FAULT
 131          * 14-SFP_TX_DISABLE
 132          * 15-SFP_MOD_DEF0
 133          */
 134         pcie2_0_clkreq {
 135                 gpio-hog;
 136                 gpios = <4 GPIO_ACTIVE_LOW>;
 137                 input;
 138                 line-name = "pcie2.0-clkreq";
 139         };
 140         pcie2_0_w_disable {
 141                 gpio-hog;
 142                 gpios = <7 GPIO_ACTIVE_LOW>;
 143                 output-low;
 144                 line-name = "pcie2.0-w-disable";
 145         };
 146 };
 147
 148 &mdio {
 149         status = "okay";
 150
 151         switch@4 {
 152                 compatible = "marvell,mv88e6085";
 153                 #address-cells = <1>;
 154                 #size-cells = <0>;
 155                 reg = <4>;
 156                 pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
 157                 pinctrl-names = "default";
 158
 159                 ports {
 160                         #address-cells = <1>;
 161                         #size-cells = <0>;
 162
 163                         port@0 {
 164                                 reg = <0>;
 165                                 label = "lan5";
 166                         };
 167
 168                         port@1 {
 169                                 reg = <1>;
 170                                 label = "lan4";
 171                         };
 172
 173                         port@2 {
 174                                 reg = <2>;
 175                                 label = "lan3";
 176                         };
 177
 178                         port@3 {
 179                                 reg = <3>;
 180                                 label = "lan2";
 181                         };
 182
 183                         port@4 {
 184                                 reg = <4>;
 185                                 label = "lan1";
 186                         };
 187
 188                         port@5 {
 189                                 reg = <5>;
 190                                 label = "cpu";
 191                                 ethernet = <&eth1>;
 192                                 fixed-link {
 193                                         speed = <1000>;
 194                                         full-duplex;
 195                                 };
 196                         };
 197
 198                         port@6 {
 199                                 /* 88E1512 external phy */
 200                                 reg = <6>;
 201                                 label = "lan6";
 202                                 fixed-link {
 203                                         speed = <1000>;
 204                                         full-duplex;
 205                                 };
 206                         };
 207                 };
 208         };
 209 };
 210
 211 &pinctrl {
 212         clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
 213                 marvell,pins = "mpp46";
 214                 marvell,function = "ref";
 215         };
 216         clearfog_dsa0_pins: clearfog-dsa0-pins {
 217                 marvell,pins = "mpp23", "mpp41";
 218                 marvell,function = "gpio";
 219         };
 220         clearfog_spi1_cs_pins: spi1-cs-pins {
 221                 marvell,pins = "mpp55";
 222                 marvell,function = "spi1";
 223         };
 224         rear_button_pins: rear-button-pins {
 225                 marvell,pins = "mpp34";
 226                 marvell,function = "gpio";
 227         };
 228 };
 229
 230 &spi1 {
 231         /*
 232          * Add SPI CS pins for clearfog:
 233          * CS0: W25Q32
 234          * CS1:
 235          * CS2: mikrobus
 236          */
 237         pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;
 238 };