1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree common file for the Seagate NAS 2 and 4-bay (Armada 370 SoC).
5 * Copyright (C) 2015 Seagate
7 * Author: Vincent Donnefort <vdonnefort@gmail.com>
11 * TODO: add support for the white SATA LEDs associated with HDD 0 and 1.
14 #include "armada-370.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
20 stdout-path = "serial0:115200n8";
24 device_type = "memory";
25 reg = <0x00000000 0x20000000>; /* 512 MB */
29 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
30 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
44 pinctrl-0 = <&ge0_rgmii_pins>;
45 pinctrl-names = "default";
47 phy-mode = "rgmii-id";
52 pinctrl-0 = <&i2c0_pins>;
53 pinctrl-names = "default";
54 clock-frequency = <100000>;
56 /* RTC - NXP 8563T (second source) */
58 compatible = "nxp,pcf8563";
64 compatible = "microchip,mcp7941x";
74 compatible = "simple-bus";
77 pinctrl-names = "default";
80 compatible = "regulator-fixed";
82 regulator-name = "SATA0 power";
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
88 gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
91 compatible = "regulator-fixed";
93 regulator-name = "SATA1 power";
94 regulator-min-microvolt = <5000000>;
95 regulator-max-microvolt = <5000000>;
99 gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
104 compatible = "gpio-fan";
105 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH
106 &gpio2 1 GPIO_ACTIVE_HIGH>;
110 compatible = "gpio-keys";
113 label = "Power button";
114 linux,code = <KEY_POWER>;
115 gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
116 debounce-interval = <100>;
119 label = "Backup button";
120 linux,code = <KEY_OPTION>;
121 gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
122 debounce-interval = <100>;
125 label = "Reset Button";
126 linux,code = <KEY_RESTART>;
127 gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
128 debounce-interval = <100>;
133 compatible = "gpio-leds";
136 label = "dart:white:power";
137 gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
138 linux,default-trigger = "timer";
142 label = "dart:red:power";
143 gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
146 label = "dart:red:sata0";
147 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
150 label = "dart:red:sata1";
151 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
156 compatible = "gpio-poweroff";
157 gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
164 /* USB 3.0 bridge ASM1042A */
172 pinctrl-0 = <&mdio_pins>;
173 pinctrl-names = "default";
175 phy0: ethernet-phy@0 {
181 pinctrl-0 = <&hdd0_led_sata_pin>, <&hdd1_led_sata_pin>;
182 pinctrl-names = "default";
184 hdd0_led_sata_pin: hdd0-led-sata-pin {
185 marvell,pins = "mpp48";
186 marvell,function = "sata1";
188 hdd0_led_gpio_pin: hdd0-led-gpio-pin {
189 marvell,pins = "mpp48";
190 marvell,function = "gpio";
192 hdd1_led_sata_pin: hdd1-led-sata-pin {
193 marvell,pins = "mpp57";
194 marvell,function = "sata0";
196 hdd1_led_gpio_pin: hdd1-led-gpio-pin {
197 marvell,pins = "mpp57";
198 marvell,function = "gpio";
207 label = "pxa3xx_nand-0";
209 marvell,nand-keep-config;
211 nand-ecc-strength = <4>;
212 nand-ecc-step-size = <512>;
215 compatible = "fixed-partitions";
216 #address-cells = <1>;
221 reg = <0x0 0x300000>;
224 label = "device-tree";
225 reg = <0x300000 0x20000>;
229 reg = <0x320000 0x2000000>;
233 reg = <0x2320000 0xdce0000>;