1 &l4_wkup { /* 0x44c00000 */
2 compatible = "ti,am4-l4-wkup", "simple-bus";
3 reg = <0x44c00000 0x800>,
7 reg-names = "ap", "la", "ia0", "ia1";
10 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */
11 <0x00100000 0x44d00000 0x100000>, /* segment 1 */
12 <0x00200000 0x44e00000 0x100000>; /* segment 2 */
14 segment@0 { /* 0x44c00000 */
15 compatible = "simple-bus";
18 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
19 <0x00000800 0x00000800 0x000800>, /* ap 1 */
20 <0x00001000 0x00001000 0x000400>, /* ap 2 */
21 <0x00001400 0x00001400 0x000400>; /* ap 3 */
24 segment@100000 { /* 0x44d00000 */
25 compatible = "simple-bus";
28 ranges = <0x00000000 0x00100000 0x004000>, /* ap 4 */
29 <0x00004000 0x00104000 0x001000>, /* ap 5 */
30 <0x00080000 0x00180000 0x002000>, /* ap 6 */
31 <0x00082000 0x00182000 0x001000>, /* ap 7 */
32 <0x000f0000 0x001f0000 0x010000>; /* ap 8 */
34 target-module@0 { /* 0x44d00000, ap 4 28.0 */
35 compatible = "ti,sysc";
39 ranges = <0x0 0x0 0x4000>;
42 target-module@80000 { /* 0x44d80000, ap 6 10.0 */
43 compatible = "ti,sysc";
47 ranges = <0x0 0x80000 0x2000>;
50 target-module@f0000 { /* 0x44df0000, ap 8 58.0 */
51 compatible = "ti,sysc-omap4", "ti,sysc";
56 ranges = <0x0 0xf0000 0x10000>;
59 compatible = "ti,am4-prcm", "simple-bus";
61 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
64 ranges = <0 0 0x11000>;
71 prcm_clockdomains: clockdomains {
77 segment@200000 { /* 0x44e00000 */
78 compatible = "simple-bus";
81 ranges = <0x00000000 0x00200000 0x001000>, /* ap 9 */
82 <0x00003000 0x00203000 0x001000>, /* ap 10 */
83 <0x00004000 0x00204000 0x001000>, /* ap 11 */
84 <0x00005000 0x00205000 0x001000>, /* ap 12 */
85 <0x00006000 0x00206000 0x001000>, /* ap 13 */
86 <0x00007000 0x00207000 0x001000>, /* ap 14 */
87 <0x00008000 0x00208000 0x001000>, /* ap 15 */
88 <0x00009000 0x00209000 0x001000>, /* ap 16 */
89 <0x0000a000 0x0020a000 0x001000>, /* ap 17 */
90 <0x0000b000 0x0020b000 0x001000>, /* ap 18 */
91 <0x0000c000 0x0020c000 0x001000>, /* ap 19 */
92 <0x0000d000 0x0020d000 0x001000>, /* ap 20 */
93 <0x0000f000 0x0020f000 0x001000>, /* ap 21 */
94 <0x00010000 0x00210000 0x010000>, /* ap 22 */
95 <0x00030000 0x00230000 0x001000>, /* ap 23 */
96 <0x00031000 0x00231000 0x001000>, /* ap 24 */
97 <0x00032000 0x00232000 0x001000>, /* ap 25 */
98 <0x00033000 0x00233000 0x001000>, /* ap 26 */
99 <0x00034000 0x00234000 0x001000>, /* ap 27 */
100 <0x00035000 0x00235000 0x001000>, /* ap 28 */
101 <0x00036000 0x00236000 0x001000>, /* ap 29 */
102 <0x00037000 0x00237000 0x001000>, /* ap 30 */
103 <0x00038000 0x00238000 0x001000>, /* ap 31 */
104 <0x00039000 0x00239000 0x001000>, /* ap 32 */
105 <0x0003a000 0x0023a000 0x001000>, /* ap 33 */
106 <0x0003e000 0x0023e000 0x001000>, /* ap 34 */
107 <0x0003f000 0x0023f000 0x001000>, /* ap 35 */
108 <0x00040000 0x00240000 0x040000>, /* ap 36 */
109 <0x00080000 0x00280000 0x001000>, /* ap 37 */
110 <0x00088000 0x00288000 0x008000>, /* ap 38 */
111 <0x00092000 0x00292000 0x001000>, /* ap 39 */
112 <0x00086000 0x00286000 0x001000>, /* ap 40 */
113 <0x00087000 0x00287000 0x001000>, /* ap 41 */
114 <0x00090000 0x00290000 0x001000>, /* ap 42 */
115 <0x00091000 0x00291000 0x001000>; /* ap 43 */
117 target-module@3000 { /* 0x44e03000, ap 10 0a.0 */
118 compatible = "ti,sysc";
120 #address-cells = <1>;
122 ranges = <0x0 0x3000 0x1000>;
125 target-module@5000 { /* 0x44e05000, ap 12 30.0 */
126 compatible = "ti,sysc";
128 #address-cells = <1>;
130 ranges = <0x0 0x5000 0x1000>;
133 target-module@7000 { /* 0x44e07000, ap 14 20.0 */
134 compatible = "ti,sysc-omap2", "ti,sysc";
139 reg-names = "rev", "sysc", "syss";
140 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
141 SYSC_OMAP2_SOFTRESET |
142 SYSC_OMAP2_AUTOIDLE)>;
143 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
146 <SYSC_IDLE_SMART_WKUP>;
148 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
149 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 0>,
150 <&l4_wkup_clkctrl AM4_L4_WKUP_GPIO1_CLKCTRL 8>;
151 clock-names = "fck", "dbclk";
152 #address-cells = <1>;
154 ranges = <0x0 0x7000 0x1000>;
157 compatible = "ti,am4372-gpio","ti,omap4-gpio";
159 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
162 interrupt-controller;
163 #interrupt-cells = <2>;
168 target-module@9000 { /* 0x44e09000, ap 16 04.0 */
169 compatible = "ti,sysc-omap2", "ti,sysc";
174 reg-names = "rev", "sysc", "syss";
175 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
176 SYSC_OMAP2_SOFTRESET |
177 SYSC_OMAP2_AUTOIDLE)>;
178 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
181 <SYSC_IDLE_SMART_WKUP>;
182 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
183 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_UART1_CLKCTRL 0>;
185 #address-cells = <1>;
187 ranges = <0x0 0x9000 0x1000>;
190 compatible = "ti,am4372-uart","ti,omap2-uart";
192 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
196 target-module@b000 { /* 0x44e0b000, ap 18 48.0 */
197 compatible = "ti,sysc-omap2", "ti,sysc";
202 reg-names = "rev", "sysc", "syss";
203 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
204 SYSC_OMAP2_ENAWAKEUP |
205 SYSC_OMAP2_SOFTRESET |
206 SYSC_OMAP2_AUTOIDLE)>;
207 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
210 <SYSC_IDLE_SMART_WKUP>;
212 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
213 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_I2C1_CLKCTRL 0>;
215 #address-cells = <1>;
217 ranges = <0x0 0xb000 0x1000>;
220 compatible = "ti,am4372-i2c","ti,omap4-i2c";
222 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
223 #address-cells = <1>;
229 target-module@d000 { /* 0x44e0d000, ap 20 38.0 */
230 compatible = "ti,sysc-omap4", "ti,sysc";
231 ti,hwmods = "adc_tsc";
234 reg-names = "rev", "sysc";
235 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
238 <SYSC_IDLE_SMART_WKUP>;
239 /* Domains (P, C): wkup_pwrdm, l3s_tsc_clkdm */
240 clocks = <&l3s_tsc_clkctrl AM4_L3S_TSC_ADC_TSC_CLKCTRL 0>;
242 #address-cells = <1>;
244 ranges = <0x0 0xd000 0x1000>;
247 compatible = "ti,am3359-tscadc";
249 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
250 clocks = <&adc_tsc_fck>;
253 dmas = <&edma 53 0>, <&edma 57 0>;
254 dma-names = "fifo0", "fifo1";
257 compatible = "ti,am3359-tsc";
261 #io-channel-cells = <1>;
262 compatible = "ti,am3359-adc";
268 target-module@10000 { /* 0x44e10000, ap 22 0c.0 */
269 compatible = "ti,sysc-omap4", "ti,sysc";
272 #address-cells = <1>;
274 ranges = <0x0 0x10000 0x10000>;
277 compatible = "ti,am4-scm", "simple-bus";
279 #address-cells = <1>;
281 ranges = <0 0 0x4000>;
283 am43xx_pinmux: pinmux@800 {
284 compatible = "ti,am437-padconf",
287 #address-cells = <1>;
289 #pinctrl-cells = <1>;
290 #interrupt-cells = <1>;
291 interrupt-controller;
292 pinctrl-single,register-width = <32>;
293 pinctrl-single,function-mask = <0xffffffff>;
296 scm_conf: scm_conf@0 {
297 compatible = "syscon", "simple-bus";
299 #address-cells = <1>;
302 phy_gmii_sel: phy-gmii-sel {
303 compatible = "ti,am43xx-phy-gmii-sel";
309 #address-cells = <1>;
314 wkup_m3_ipc: wkup_m3_ipc@1324 {
315 compatible = "ti,am4372-wkup-m3-ipc";
317 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
318 ti,rproc = <&wkup_m3>;
319 mboxes = <&mailbox &mbox_wkupm3>;
322 edma_xbar: dma-router@f90 {
323 compatible = "ti,am335x-edma-crossbar";
327 dma-masters = <&edma>;
330 scm_clockdomains: clockdomains {
335 target-module@31000 { /* 0x44e31000, ap 24 40.0 */
336 compatible = "ti,sysc-omap2-timer", "ti,sysc";
337 ti,hwmods = "timer1";
341 reg-names = "rev", "sysc", "syss";
342 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
343 SYSC_OMAP2_SOFTRESET |
344 SYSC_OMAP2_AUTOIDLE)>;
345 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
349 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
350 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_TIMER1_CLKCTRL 0>;
352 #address-cells = <1>;
354 ranges = <0x0 0x31000 0x1000>;
357 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
359 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
361 clocks = <&timer1_fck>;
366 target-module@33000 { /* 0x44e33000, ap 26 18.0 */
367 compatible = "ti,sysc";
369 #address-cells = <1>;
371 ranges = <0x0 0x33000 0x1000>;
374 target-module@35000 { /* 0x44e35000, ap 28 50.0 */
375 compatible = "ti,sysc-omap2", "ti,sysc";
376 ti,hwmods = "wd_timer2";
380 reg-names = "rev", "sysc", "syss";
381 ti,sysc-mask = <(SYSC_OMAP2_EMUFREE |
382 SYSC_OMAP2_SOFTRESET)>;
383 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
386 <SYSC_IDLE_SMART_WKUP>;
388 /* Domains (P, C): wkup_pwrdm, l4_wkup_clkdm */
389 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_WD_TIMER2_CLKCTRL 0>;
391 #address-cells = <1>;
393 ranges = <0x0 0x35000 0x1000>;
396 compatible = "ti,am4372-wdt","ti,omap3-wdt";
398 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
402 target-module@37000 { /* 0x44e37000, ap 30 08.0 */
403 compatible = "ti,sysc";
405 #address-cells = <1>;
407 ranges = <0x0 0x37000 0x1000>;
410 target-module@39000 { /* 0x44e39000, ap 32 02.0 */
411 compatible = "ti,sysc";
413 #address-cells = <1>;
415 ranges = <0x0 0x39000 0x1000>;
418 target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */
419 compatible = "ti,sysc-omap4-simple", "ti,sysc";
423 reg-names = "rev", "sysc";
424 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
427 <SYSC_IDLE_SMART_WKUP>;
428 /* Domains (P, C): rtc_pwrdm, l4_rtc_clkdm */
429 clocks = <&l4_rtc_clkctrl AM4_L4_RTC_RTC_CLKCTRL 0>;
431 #address-cells = <1>;
433 ranges = <0x0 0x3e000 0x1000>;
436 compatible = "ti,am4372-rtc", "ti,am3352-rtc",
439 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
441 clocks = <&clk_32768_ck>;
442 clock-names = "int-clk";
443 system-power-controller;
448 target-module@40000 { /* 0x44e40000, ap 36 68.0 */
449 compatible = "ti,sysc";
451 #address-cells = <1>;
453 ranges = <0x0 0x40000 0x40000>;
456 target-module@86000 { /* 0x44e86000, ap 40 70.0 */
457 compatible = "ti,sysc-omap2", "ti,sysc";
458 ti,hwmods = "counter_32k";
461 reg-names = "rev", "sysc";
462 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
464 /* Domains (P, C): wkup_pwrdm, l4_wkup_aon_clkdm */
465 clocks = <&l4_wkup_aon_clkctrl AM4_L4_WKUP_AON_COUNTER_32K_CLKCTRL 0>;
467 #address-cells = <1>;
469 ranges = <0x0 0x86000 0x1000>;
471 counter32k: counter@0 {
472 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
477 target-module@88000 { /* 0x44e88000, ap 38 12.0 */
478 compatible = "ti,sysc";
480 #address-cells = <1>;
482 ranges = <0x00000000 0x00088000 0x00008000>,
483 <0x00008000 0x00090000 0x00001000>,
484 <0x00009000 0x00091000 0x00001000>;
489 &l4_fast { /* 0x4a000000 */
490 compatible = "ti,am4-l4-fast", "simple-bus";
491 reg = <0x4a000000 0x800>,
494 reg-names = "ap", "la", "ia0";
495 #address-cells = <1>;
497 ranges = <0x00000000 0x4a000000 0x1000000>; /* segment 0 */
499 segment@0 { /* 0x4a000000 */
500 compatible = "simple-bus";
501 #address-cells = <1>;
503 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
504 <0x00000800 0x00000800 0x000800>, /* ap 1 */
505 <0x00001000 0x00001000 0x000400>, /* ap 2 */
506 <0x00100000 0x00100000 0x008000>, /* ap 3 */
507 <0x00108000 0x00108000 0x001000>, /* ap 4 */
508 <0x00400000 0x00400000 0x002000>, /* ap 5 */
509 <0x00402000 0x00402000 0x001000>, /* ap 6 */
510 <0x00200000 0x00200000 0x080000>, /* ap 7 */
511 <0x00280000 0x00280000 0x001000>; /* ap 8 */
513 target-module@100000 { /* 0x4a100000, ap 3 04.0 */
514 compatible = "ti,sysc-omap4-simple", "ti,sysc";
515 reg = <0x101200 0x4>,
518 reg-names = "rev", "sysc", "syss";
520 ti,sysc-midle = <SYSC_IDLE_FORCE>,
522 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
525 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
527 #address-cells = <1>;
529 ranges = <0x0 0x100000 0x8000>;
532 compatible = "ti,am4372-cpsw","ti,cpsw";
535 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
536 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
537 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
538 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
539 #address-cells = <1>;
541 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
542 <&dpll_clksel_mac_clk>;
543 clock-names = "fck", "cpts", "50mclk";
544 assigned-clocks = <&dpll_clksel_mac_clk>;
545 assigned-clock-rates = <50000000>;
547 cpdma_channels = <8>;
548 ale_entries = <1024>;
549 bd_ram_size = <0x2000>;
550 mac_control = <0x20>;
553 cpts_clock_mult = <0x80000000>;
554 cpts_clock_shift = <29>;
555 ranges = <0 0 0x8000>;
556 syscon = <&scm_conf>;
558 davinci_mdio: mdio@1000 {
559 compatible = "ti,am4372-mdio","ti,cpsw-mdio","ti,davinci_mdio";
560 reg = <0x1000 0x100>;
561 clocks = <&cpsw_125mhz_clkctrl AM4_CPSW_125MHZ_CPGMAC0_CLKCTRL 0>;
563 #address-cells = <1>;
565 bus_freq = <1000000>;
569 cpsw_emac0: slave@200 {
570 /* Filled in by U-Boot */
571 mac-address = [ 00 00 00 00 00 00 ];
572 phys = <&phy_gmii_sel 1 0>;
575 cpsw_emac1: slave@300 {
576 /* Filled in by U-Boot */
577 mac-address = [ 00 00 00 00 00 00 ];
578 phys = <&phy_gmii_sel 2 0>;
583 target-module@200000 { /* 0x4a200000, ap 7 02.0 */
584 compatible = "ti,sysc";
586 #address-cells = <1>;
588 ranges = <0x0 0x200000 0x80000>;
591 target-module@400000 { /* 0x4a400000, ap 5 08.0 */
592 compatible = "ti,sysc";
594 #address-cells = <1>;
596 ranges = <0x0 0x400000 0x2000>;
601 &l4_per { /* 0x48000000 */
602 compatible = "ti,am4-l4-per", "simple-bus";
603 reg = <0x48000000 0x800>,
609 reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3";
610 #address-cells = <1>;
612 ranges = <0x00000000 0x48000000 0x100000>, /* segment 0 */
613 <0x00100000 0x48100000 0x100000>, /* segment 1 */
614 <0x00200000 0x48200000 0x100000>, /* segment 2 */
615 <0x00300000 0x48300000 0x100000>, /* segment 3 */
616 <0x46000000 0x46000000 0x400000>, /* l3 data port */
617 <0x46400000 0x46400000 0x400000>; /* l3 data port */
619 segment@0 { /* 0x48000000 */
620 compatible = "simple-bus";
621 #address-cells = <1>;
623 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
624 <0x00000800 0x00000800 0x000800>, /* ap 1 */
625 <0x00001000 0x00001000 0x000400>, /* ap 2 */
626 <0x00001400 0x00001400 0x000400>, /* ap 3 */
627 <0x00001800 0x00001800 0x000400>, /* ap 4 */
628 <0x00001c00 0x00001c00 0x000400>, /* ap 5 */
629 <0x00008000 0x00008000 0x001000>, /* ap 6 */
630 <0x00009000 0x00009000 0x001000>, /* ap 7 */
631 <0x00022000 0x00022000 0x001000>, /* ap 8 */
632 <0x00023000 0x00023000 0x001000>, /* ap 9 */
633 <0x00024000 0x00024000 0x001000>, /* ap 10 */
634 <0x00025000 0x00025000 0x001000>, /* ap 11 */
635 <0x0002a000 0x0002a000 0x001000>, /* ap 12 */
636 <0x0002b000 0x0002b000 0x001000>, /* ap 13 */
637 <0x00038000 0x00038000 0x002000>, /* ap 14 */
638 <0x0003a000 0x0003a000 0x001000>, /* ap 15 */
639 <0x0003c000 0x0003c000 0x002000>, /* ap 16 */
640 <0x0003e000 0x0003e000 0x001000>, /* ap 17 */
641 <0x00040000 0x00040000 0x001000>, /* ap 18 */
642 <0x00041000 0x00041000 0x001000>, /* ap 19 */
643 <0x00042000 0x00042000 0x001000>, /* ap 20 */
644 <0x00043000 0x00043000 0x001000>, /* ap 21 */
645 <0x00044000 0x00044000 0x001000>, /* ap 22 */
646 <0x00045000 0x00045000 0x001000>, /* ap 23 */
647 <0x00046000 0x00046000 0x001000>, /* ap 24 */
648 <0x00047000 0x00047000 0x001000>, /* ap 25 */
649 <0x00048000 0x00048000 0x001000>, /* ap 26 */
650 <0x00049000 0x00049000 0x001000>, /* ap 27 */
651 <0x0004c000 0x0004c000 0x001000>, /* ap 28 */
652 <0x0004d000 0x0004d000 0x001000>, /* ap 29 */
653 <0x00060000 0x00060000 0x001000>, /* ap 30 */
654 <0x00061000 0x00061000 0x001000>, /* ap 31 */
655 <0x00080000 0x00080000 0x010000>, /* ap 32 */
656 <0x00090000 0x00090000 0x001000>, /* ap 33 */
657 <0x00030000 0x00030000 0x001000>, /* ap 65 */
658 <0x00031000 0x00031000 0x001000>, /* ap 66 */
659 <0x0004a000 0x0004a000 0x001000>, /* ap 71 */
660 <0x0004b000 0x0004b000 0x001000>, /* ap 72 */
661 <0x000c8000 0x000c8000 0x001000>, /* ap 73 */
662 <0x000c9000 0x000c9000 0x001000>, /* ap 74 */
663 <0x000ca000 0x000ca000 0x001000>, /* ap 77 */
664 <0x000cb000 0x000cb000 0x001000>, /* ap 78 */
665 <0x00034000 0x00034000 0x001000>, /* ap 80 */
666 <0x00035000 0x00035000 0x001000>, /* ap 81 */
667 <0x00036000 0x00036000 0x001000>, /* ap 84 */
668 <0x00037000 0x00037000 0x001000>, /* ap 85 */
669 <0x46000000 0x46000000 0x400000>, /* l3 data port */
670 <0x46400000 0x46400000 0x400000>; /* l3 data port */
672 target-module@8000 { /* 0x48008000, ap 6 10.0 */
673 compatible = "ti,sysc";
675 #address-cells = <1>;
677 ranges = <0x0 0x8000 0x1000>;
680 target-module@22000 { /* 0x48022000, ap 8 0a.0 */
681 compatible = "ti,sysc-omap2", "ti,sysc";
686 reg-names = "rev", "sysc", "syss";
687 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
688 SYSC_OMAP2_SOFTRESET |
689 SYSC_OMAP2_AUTOIDLE)>;
690 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
693 <SYSC_IDLE_SMART_WKUP>;
694 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
695 clocks = <&l4ls_clkctrl AM4_L4LS_UART2_CLKCTRL 0>;
697 #address-cells = <1>;
699 ranges = <0x0 0x22000 0x1000>;
702 compatible = "ti,am4372-uart","ti,omap2-uart";
704 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
709 target-module@24000 { /* 0x48024000, ap 10 1c.0 */
710 compatible = "ti,sysc-omap2", "ti,sysc";
715 reg-names = "rev", "sysc", "syss";
716 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
717 SYSC_OMAP2_SOFTRESET |
718 SYSC_OMAP2_AUTOIDLE)>;
719 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
722 <SYSC_IDLE_SMART_WKUP>;
723 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
724 clocks = <&l4ls_clkctrl AM4_L4LS_UART3_CLKCTRL 0>;
726 #address-cells = <1>;
728 ranges = <0x0 0x24000 0x1000>;
731 compatible = "ti,am4372-uart","ti,omap2-uart";
733 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
738 target-module@2a000 { /* 0x4802a000, ap 12 22.0 */
739 compatible = "ti,sysc-omap2", "ti,sysc";
744 reg-names = "rev", "sysc", "syss";
745 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
746 SYSC_OMAP2_ENAWAKEUP |
747 SYSC_OMAP2_SOFTRESET |
748 SYSC_OMAP2_AUTOIDLE)>;
749 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
752 <SYSC_IDLE_SMART_WKUP>;
754 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
755 clocks = <&l4ls_clkctrl AM4_L4LS_I2C2_CLKCTRL 0>;
757 #address-cells = <1>;
759 ranges = <0x0 0x2a000 0x1000>;
762 compatible = "ti,am4372-i2c","ti,omap4-i2c";
764 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
765 #address-cells = <1>;
771 target-module@30000 { /* 0x48030000, ap 65 08.0 */
772 compatible = "ti,sysc-omap2", "ti,sysc";
777 reg-names = "rev", "sysc", "syss";
778 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
779 SYSC_OMAP2_SOFTRESET |
780 SYSC_OMAP2_AUTOIDLE)>;
781 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
785 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
786 clocks = <&l4ls_clkctrl AM4_L4LS_SPI0_CLKCTRL 0>;
788 #address-cells = <1>;
790 ranges = <0x0 0x30000 0x1000>;
793 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
795 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
796 #address-cells = <1>;
802 target-module@34000 { /* 0x48034000, ap 80 56.0 */
803 compatible = "ti,sysc";
805 #address-cells = <1>;
807 ranges = <0x0 0x34000 0x1000>;
810 target-module@36000 { /* 0x48036000, ap 84 3e.0 */
811 compatible = "ti,sysc";
813 #address-cells = <1>;
815 ranges = <0x0 0x36000 0x1000>;
818 target-module@38000 { /* 0x48038000, ap 14 04.0 */
819 compatible = "ti,sysc-omap4-simple", "ti,sysc";
820 ti,hwmods = "mcasp0";
823 reg-names = "rev", "sysc";
824 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
827 /* Domains (P, C): per_pwrdm, l3s_clkdm */
828 clocks = <&l3s_clkctrl AM4_L3S_MCASP0_CLKCTRL 0>;
830 #address-cells = <1>;
832 ranges = <0x0 0x38000 0x2000>,
833 <0x46000000 0x46000000 0x400000>;
836 compatible = "ti,am33xx-mcasp-audio";
838 <0x46000000 0x400000>;
839 reg-names = "mpu", "dat";
840 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
841 <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
842 interrupt-names = "tx", "rx";
846 dma-names = "tx", "rx";
850 target-module@3c000 { /* 0x4803c000, ap 16 2a.0 */
851 compatible = "ti,sysc-omap4-simple", "ti,sysc";
852 ti,hwmods = "mcasp1";
855 reg-names = "rev", "sysc";
856 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
859 /* Domains (P, C): per_pwrdm, l3s_clkdm */
860 clocks = <&l3s_clkctrl AM4_L3S_MCASP1_CLKCTRL 0>;
862 #address-cells = <1>;
864 ranges = <0x0 0x3c000 0x2000>,
865 <0x46400000 0x46400000 0x400000>;
868 compatible = "ti,am33xx-mcasp-audio";
870 <0x46400000 0x400000>;
871 reg-names = "mpu", "dat";
872 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
873 <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
874 interrupt-names = "tx", "rx";
878 dma-names = "tx", "rx";
882 target-module@40000 { /* 0x48040000, ap 18 1e.0 */
883 compatible = "ti,sysc-omap4-timer", "ti,sysc";
884 ti,hwmods = "timer2";
888 reg-names = "rev", "sysc", "syss";
889 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
890 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
893 <SYSC_IDLE_SMART_WKUP>;
894 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
895 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER2_CLKCTRL 0>;
897 #address-cells = <1>;
899 ranges = <0x0 0x40000 0x1000>;
902 compatible = "ti,am4372-timer","ti,am335x-timer";
904 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
905 clocks = <&timer2_fck>;
910 target-module@42000 { /* 0x48042000, ap 20 24.0 */
911 compatible = "ti,sysc-omap4-timer", "ti,sysc";
912 ti,hwmods = "timer3";
916 reg-names = "rev", "sysc", "syss";
917 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
918 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
921 <SYSC_IDLE_SMART_WKUP>;
922 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
923 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER3_CLKCTRL 0>;
925 #address-cells = <1>;
927 ranges = <0x0 0x42000 0x1000>;
930 compatible = "ti,am4372-timer","ti,am335x-timer";
932 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
937 target-module@44000 { /* 0x48044000, ap 22 26.0 */
938 compatible = "ti,sysc-omap4-timer", "ti,sysc";
939 ti,hwmods = "timer4";
943 reg-names = "rev", "sysc", "syss";
944 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
945 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
948 <SYSC_IDLE_SMART_WKUP>;
949 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
950 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER4_CLKCTRL 0>;
952 #address-cells = <1>;
954 ranges = <0x0 0x44000 0x1000>;
957 compatible = "ti,am4372-timer","ti,am335x-timer";
959 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
965 target-module@46000 { /* 0x48046000, ap 24 28.0 */
966 compatible = "ti,sysc-omap4-timer", "ti,sysc";
967 ti,hwmods = "timer5";
971 reg-names = "rev", "sysc", "syss";
972 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
973 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
976 <SYSC_IDLE_SMART_WKUP>;
977 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
978 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER5_CLKCTRL 0>;
980 #address-cells = <1>;
982 ranges = <0x0 0x46000 0x1000>;
985 compatible = "ti,am4372-timer","ti,am335x-timer";
987 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
993 target-module@48000 { /* 0x48048000, ap 26 1a.0 */
994 compatible = "ti,sysc-omap4-timer", "ti,sysc";
995 ti,hwmods = "timer6";
999 reg-names = "rev", "sysc", "syss";
1000 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1001 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1004 <SYSC_IDLE_SMART_WKUP>;
1005 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1006 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER6_CLKCTRL 0>;
1007 clock-names = "fck";
1008 #address-cells = <1>;
1010 ranges = <0x0 0x48000 0x1000>;
1013 compatible = "ti,am4372-timer","ti,am335x-timer";
1015 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
1017 status = "disabled";
1021 target-module@4a000 { /* 0x4804a000, ap 71 48.0 */
1022 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1023 ti,hwmods = "timer7";
1024 reg = <0x4a000 0x4>,
1027 reg-names = "rev", "sysc", "syss";
1028 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1029 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1032 <SYSC_IDLE_SMART_WKUP>;
1033 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1034 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER7_CLKCTRL 0>;
1035 clock-names = "fck";
1036 #address-cells = <1>;
1038 ranges = <0x0 0x4a000 0x1000>;
1041 compatible = "ti,am4372-timer","ti,am335x-timer";
1043 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
1045 status = "disabled";
1049 target-module@4c000 { /* 0x4804c000, ap 28 36.0 */
1050 compatible = "ti,sysc-omap2", "ti,sysc";
1051 ti,hwmods = "gpio2";
1052 reg = <0x4c000 0x4>,
1055 reg-names = "rev", "sysc", "syss";
1056 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1057 SYSC_OMAP2_SOFTRESET |
1058 SYSC_OMAP2_AUTOIDLE)>;
1059 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1062 <SYSC_IDLE_SMART_WKUP>;
1064 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1065 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 0>,
1066 <&l4ls_clkctrl AM4_L4LS_GPIO2_CLKCTRL 8>;
1067 clock-names = "fck", "dbclk";
1068 #address-cells = <1>;
1070 ranges = <0x0 0x4c000 0x1000>;
1073 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1075 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1078 interrupt-controller;
1079 #interrupt-cells = <2>;
1080 status = "disabled";
1084 target-module@60000 { /* 0x48060000, ap 30 14.0 */
1085 compatible = "ti,sysc-omap2", "ti,sysc";
1087 reg = <0x602fc 0x4>,
1090 reg-names = "rev", "sysc", "syss";
1091 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1092 SYSC_OMAP2_ENAWAKEUP |
1093 SYSC_OMAP2_SOFTRESET |
1094 SYSC_OMAP2_AUTOIDLE)>;
1095 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1099 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1100 clocks = <&l4ls_clkctrl AM4_L4LS_MMC1_CLKCTRL 0>;
1101 clock-names = "fck";
1102 #address-cells = <1>;
1104 ranges = <0x0 0x60000 0x1000>;
1107 compatible = "ti,omap4-hsmmc";
1110 ti,needs-special-reset;
1111 dmas = <&edma 24 0>,
1113 dma-names = "tx", "rx";
1114 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
1115 status = "disabled";
1119 target-module@80000 { /* 0x48080000, ap 32 18.0 */
1120 compatible = "ti,sysc-omap2", "ti,sysc";
1122 reg = <0x80000 0x4>,
1125 reg-names = "rev", "sysc", "syss";
1126 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1127 SYSC_OMAP2_SOFTRESET |
1128 SYSC_OMAP2_AUTOIDLE)>;
1129 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1133 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1134 clocks = <&l4ls_clkctrl AM4_L4LS_ELM_CLKCTRL 0>;
1135 clock-names = "fck";
1136 #address-cells = <1>;
1138 ranges = <0x0 0x80000 0x10000>;
1141 compatible = "ti,am3352-elm";
1143 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
1144 clocks = <&l4ls_gclk>;
1145 clock-names = "fck";
1146 status = "disabled";
1150 target-module@c8000 { /* 0x480c8000, ap 73 06.0 */
1151 compatible = "ti,sysc-omap4", "ti,sysc";
1152 ti,hwmods = "mailbox";
1153 reg = <0xc8000 0x4>,
1155 reg-names = "rev", "sysc";
1156 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1157 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1160 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1161 clocks = <&l4ls_clkctrl AM4_L4LS_MAILBOX_CLKCTRL 0>;
1162 clock-names = "fck";
1163 #address-cells = <1>;
1165 ranges = <0x0 0xc8000 0x1000>;
1167 mailbox: mailbox@0 {
1168 compatible = "ti,omap4-mailbox";
1170 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
1172 ti,mbox-num-users = <4>;
1173 ti,mbox-num-fifos = <8>;
1174 mbox_wkupm3: wkup_m3 {
1176 ti,mbox-tx = <0 0 0>;
1177 ti,mbox-rx = <0 0 3>;
1182 target-module@ca000 { /* 0x480ca000, ap 77 38.0 */
1183 compatible = "ti,sysc-omap2", "ti,sysc";
1184 ti,hwmods = "spinlock";
1185 reg = <0xca000 0x4>,
1188 reg-names = "rev", "sysc", "syss";
1189 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1190 SYSC_OMAP2_ENAWAKEUP |
1191 SYSC_OMAP2_SOFTRESET |
1192 SYSC_OMAP2_AUTOIDLE)>;
1193 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1197 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1198 clocks = <&l4ls_clkctrl AM4_L4LS_SPINLOCK_CLKCTRL 0>;
1199 clock-names = "fck";
1200 #address-cells = <1>;
1202 ranges = <0x0 0xca000 0x1000>;
1204 hwspinlock: spinlock@0 {
1205 compatible = "ti,omap4-hwspinlock";
1207 #hwlock-cells = <1>;
1212 segment@100000 { /* 0x48100000 */
1213 compatible = "simple-bus";
1214 #address-cells = <1>;
1216 ranges = <0x0008c000 0x0018c000 0x001000>, /* ap 34 */
1217 <0x0008d000 0x0018d000 0x001000>, /* ap 35 */
1218 <0x0008e000 0x0018e000 0x001000>, /* ap 36 */
1219 <0x0008f000 0x0018f000 0x001000>, /* ap 37 */
1220 <0x0009c000 0x0019c000 0x001000>, /* ap 38 */
1221 <0x0009d000 0x0019d000 0x001000>, /* ap 39 */
1222 <0x000a6000 0x001a6000 0x001000>, /* ap 40 */
1223 <0x000a7000 0x001a7000 0x001000>, /* ap 41 */
1224 <0x000a8000 0x001a8000 0x001000>, /* ap 42 */
1225 <0x000a9000 0x001a9000 0x001000>, /* ap 43 */
1226 <0x000aa000 0x001aa000 0x001000>, /* ap 44 */
1227 <0x000ab000 0x001ab000 0x001000>, /* ap 45 */
1228 <0x000ac000 0x001ac000 0x001000>, /* ap 46 */
1229 <0x000ad000 0x001ad000 0x001000>, /* ap 47 */
1230 <0x000ae000 0x001ae000 0x001000>, /* ap 48 */
1231 <0x000af000 0x001af000 0x001000>, /* ap 49 */
1232 <0x000cc000 0x001cc000 0x002000>, /* ap 50 */
1233 <0x000ce000 0x001ce000 0x002000>, /* ap 51 */
1234 <0x000d0000 0x001d0000 0x002000>, /* ap 52 */
1235 <0x000d2000 0x001d2000 0x002000>, /* ap 53 */
1236 <0x000d8000 0x001d8000 0x001000>, /* ap 54 */
1237 <0x000d9000 0x001d9000 0x001000>, /* ap 55 */
1238 <0x000a0000 0x001a0000 0x001000>, /* ap 67 */
1239 <0x000a1000 0x001a1000 0x001000>, /* ap 68 */
1240 <0x000a2000 0x001a2000 0x001000>, /* ap 69 */
1241 <0x000a3000 0x001a3000 0x001000>, /* ap 70 */
1242 <0x000a4000 0x001a4000 0x001000>, /* ap 92 */
1243 <0x000a5000 0x001a5000 0x001000>, /* ap 93 */
1244 <0x000c1000 0x001c1000 0x001000>, /* ap 94 */
1245 <0x000c2000 0x001c2000 0x001000>; /* ap 95 */
1247 target-module@8c000 { /* 0x4818c000, ap 34 0c.0 */
1248 compatible = "ti,sysc";
1249 status = "disabled";
1250 #address-cells = <1>;
1252 ranges = <0x0 0x8c000 0x1000>;
1255 target-module@8e000 { /* 0x4818e000, ap 36 02.0 */
1256 compatible = "ti,sysc";
1257 status = "disabled";
1258 #address-cells = <1>;
1260 ranges = <0x0 0x8e000 0x1000>;
1263 target-module@9c000 { /* 0x4819c000, ap 38 52.0 */
1264 compatible = "ti,sysc-omap2", "ti,sysc";
1266 reg = <0x9c000 0x8>,
1269 reg-names = "rev", "sysc", "syss";
1270 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1271 SYSC_OMAP2_ENAWAKEUP |
1272 SYSC_OMAP2_SOFTRESET |
1273 SYSC_OMAP2_AUTOIDLE)>;
1274 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1277 <SYSC_IDLE_SMART_WKUP>;
1279 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1280 clocks = <&l4ls_clkctrl AM4_L4LS_I2C3_CLKCTRL 0>;
1281 clock-names = "fck";
1282 #address-cells = <1>;
1284 ranges = <0x0 0x9c000 0x1000>;
1287 compatible = "ti,am4372-i2c","ti,omap4-i2c";
1289 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1290 #address-cells = <1>;
1292 status = "disabled";
1296 target-module@a0000 { /* 0x481a0000, ap 67 2c.0 */
1297 compatible = "ti,sysc-omap2", "ti,sysc";
1299 reg = <0xa0000 0x4>,
1302 reg-names = "rev", "sysc", "syss";
1303 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1304 SYSC_OMAP2_SOFTRESET |
1305 SYSC_OMAP2_AUTOIDLE)>;
1306 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1310 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1311 clocks = <&l4ls_clkctrl AM4_L4LS_SPI1_CLKCTRL 0>;
1312 clock-names = "fck";
1313 #address-cells = <1>;
1315 ranges = <0x0 0xa0000 0x1000>;
1318 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1320 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
1321 #address-cells = <1>;
1323 status = "disabled";
1327 target-module@a2000 { /* 0x481a2000, ap 69 2e.0 */
1328 compatible = "ti,sysc-omap2", "ti,sysc";
1330 reg = <0xa2000 0x4>,
1333 reg-names = "rev", "sysc", "syss";
1334 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1335 SYSC_OMAP2_SOFTRESET |
1336 SYSC_OMAP2_AUTOIDLE)>;
1337 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1341 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1342 clocks = <&l4ls_clkctrl AM4_L4LS_SPI2_CLKCTRL 0>;
1343 clock-names = "fck";
1344 #address-cells = <1>;
1346 ranges = <0x0 0xa2000 0x1000>;
1349 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1351 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
1352 #address-cells = <1>;
1354 status = "disabled";
1358 target-module@a4000 { /* 0x481a4000, ap 92 62.0 */
1359 compatible = "ti,sysc-omap2", "ti,sysc";
1361 reg = <0xa4000 0x4>,
1364 reg-names = "rev", "sysc", "syss";
1365 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1366 SYSC_OMAP2_SOFTRESET |
1367 SYSC_OMAP2_AUTOIDLE)>;
1368 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1372 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1373 clocks = <&l4ls_clkctrl AM4_L4LS_SPI3_CLKCTRL 0>;
1374 clock-names = "fck";
1375 #address-cells = <1>;
1377 ranges = <0x0 0xa4000 0x1000>;
1380 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
1382 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
1383 #address-cells = <1>;
1385 status = "disabled";
1389 target-module@a6000 { /* 0x481a6000, ap 40 16.0 */
1390 compatible = "ti,sysc-omap2", "ti,sysc";
1391 ti,hwmods = "uart4";
1392 reg = <0xa6050 0x4>,
1395 reg-names = "rev", "sysc", "syss";
1396 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1397 SYSC_OMAP2_SOFTRESET |
1398 SYSC_OMAP2_AUTOIDLE)>;
1399 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1402 <SYSC_IDLE_SMART_WKUP>;
1403 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1404 clocks = <&l4ls_clkctrl AM4_L4LS_UART4_CLKCTRL 0>;
1405 clock-names = "fck";
1406 #address-cells = <1>;
1408 ranges = <0x0 0xa6000 0x1000>;
1411 compatible = "ti,am4372-uart","ti,omap2-uart";
1413 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
1414 status = "disabled";
1418 target-module@a8000 { /* 0x481a8000, ap 42 20.0 */
1419 compatible = "ti,sysc-omap2", "ti,sysc";
1420 ti,hwmods = "uart5";
1421 reg = <0xa8050 0x4>,
1424 reg-names = "rev", "sysc", "syss";
1425 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1426 SYSC_OMAP2_SOFTRESET |
1427 SYSC_OMAP2_AUTOIDLE)>;
1428 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1431 <SYSC_IDLE_SMART_WKUP>;
1432 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1433 clocks = <&l4ls_clkctrl AM4_L4LS_UART5_CLKCTRL 0>;
1434 clock-names = "fck";
1435 #address-cells = <1>;
1437 ranges = <0x0 0xa8000 0x1000>;
1440 compatible = "ti,am4372-uart","ti,omap2-uart";
1442 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
1443 status = "disabled";
1447 target-module@aa000 { /* 0x481aa000, ap 44 12.0 */
1448 compatible = "ti,sysc-omap2", "ti,sysc";
1449 ti,hwmods = "uart6";
1450 reg = <0xaa050 0x4>,
1453 reg-names = "rev", "sysc", "syss";
1454 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1455 SYSC_OMAP2_SOFTRESET |
1456 SYSC_OMAP2_AUTOIDLE)>;
1457 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1460 <SYSC_IDLE_SMART_WKUP>;
1461 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1462 clocks = <&l4ls_clkctrl AM4_L4LS_UART6_CLKCTRL 0>;
1463 clock-names = "fck";
1464 #address-cells = <1>;
1466 ranges = <0x0 0xaa000 0x1000>;
1469 compatible = "ti,am4372-uart","ti,omap2-uart";
1471 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
1472 status = "disabled";
1476 target-module@ac000 { /* 0x481ac000, ap 46 30.0 */
1477 compatible = "ti,sysc-omap2", "ti,sysc";
1478 ti,hwmods = "gpio3";
1479 reg = <0xac000 0x4>,
1482 reg-names = "rev", "sysc", "syss";
1483 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1484 SYSC_OMAP2_SOFTRESET |
1485 SYSC_OMAP2_AUTOIDLE)>;
1486 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1489 <SYSC_IDLE_SMART_WKUP>;
1491 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1492 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 0>,
1493 <&l4ls_clkctrl AM4_L4LS_GPIO3_CLKCTRL 8>;
1494 clock-names = "fck", "dbclk";
1495 #address-cells = <1>;
1497 ranges = <0x0 0xac000 0x1000>;
1500 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1502 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
1505 interrupt-controller;
1506 #interrupt-cells = <2>;
1507 status = "disabled";
1511 target-module@ae000 { /* 0x481ae000, ap 48 32.0 */
1512 compatible = "ti,sysc-omap2", "ti,sysc";
1513 ti,hwmods = "gpio4";
1514 reg = <0xae000 0x4>,
1517 reg-names = "rev", "sysc", "syss";
1518 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
1519 SYSC_OMAP2_SOFTRESET |
1520 SYSC_OMAP2_AUTOIDLE)>;
1521 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1524 <SYSC_IDLE_SMART_WKUP>;
1526 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1527 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 0>,
1528 <&l4ls_clkctrl AM4_L4LS_GPIO4_CLKCTRL 8>;
1529 clock-names = "fck", "dbclk";
1530 #address-cells = <1>;
1532 ranges = <0x0 0xae000 0x1000>;
1535 compatible = "ti,am4372-gpio","ti,omap4-gpio";
1537 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
1540 interrupt-controller;
1541 #interrupt-cells = <2>;
1542 status = "disabled";
1546 target-module@c1000 { /* 0x481c1000, ap 94 68.0 */
1547 compatible = "ti,sysc-omap4-timer", "ti,sysc";
1548 ti,hwmods = "timer8";
1549 reg = <0xc1000 0x4>,
1552 reg-names = "rev", "sysc", "syss";
1553 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
1554 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1557 <SYSC_IDLE_SMART_WKUP>;
1558 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1559 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER8_CLKCTRL 0>;
1560 clock-names = "fck";
1561 #address-cells = <1>;
1563 ranges = <0x0 0xc1000 0x1000>;
1566 compatible = "ti,am4372-timer","ti,am335x-timer";
1568 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
1569 status = "disabled";
1573 target-module@cc000 { /* 0x481cc000, ap 50 46.0 */
1574 compatible = "ti,sysc-omap4", "ti,sysc";
1575 reg = <0xcc020 0x4>;
1577 ti,hwmods = "d_can0";
1578 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1579 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>,
1581 clock-names = "fck", "osc";
1582 #address-cells = <1>;
1584 ranges = <0x0 0xcc000 0x2000>;
1587 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1589 clocks = <&dcan0_fck>;
1590 clock-names = "fck";
1591 syscon-raminit = <&scm_conf 0x644 0>;
1592 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1593 status = "disabled";
1597 target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */
1598 compatible = "ti,sysc-omap4", "ti,sysc";
1599 reg = <0xd0020 0x4>;
1601 ti,hwmods = "d_can1";
1602 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1603 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>,
1605 clock-names = "fck", "osc";
1606 #address-cells = <1>;
1608 ranges = <0x0 0xd0000 0x2000>;
1611 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1613 clocks = <&dcan1_fck>;
1614 clock-names = "fck";
1615 syscon-raminit = <&scm_conf 0x644 1>;
1616 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1617 status = "disabled";
1621 target-module@d8000 { /* 0x481d8000, ap 54 5e.0 */
1622 compatible = "ti,sysc-omap2", "ti,sysc";
1624 reg = <0xd82fc 0x4>,
1627 reg-names = "rev", "sysc", "syss";
1628 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
1629 SYSC_OMAP2_ENAWAKEUP |
1630 SYSC_OMAP2_SOFTRESET |
1631 SYSC_OMAP2_AUTOIDLE)>;
1632 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1636 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1637 clocks = <&l4ls_clkctrl AM4_L4LS_MMC2_CLKCTRL 0>;
1638 clock-names = "fck";
1639 #address-cells = <1>;
1641 ranges = <0x0 0xd8000 0x1000>;
1644 compatible = "ti,omap4-hsmmc";
1646 ti,needs-special-reset;
1649 dma-names = "tx", "rx";
1650 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
1651 status = "disabled";
1656 segment@200000 { /* 0x48200000 */
1657 compatible = "simple-bus";
1658 #address-cells = <1>;
1662 segment@300000 { /* 0x48300000 */
1663 compatible = "simple-bus";
1664 #address-cells = <1>;
1666 ranges = <0x00000000 0x00300000 0x001000>, /* ap 56 */
1667 <0x00001000 0x00301000 0x001000>, /* ap 57 */
1668 <0x00002000 0x00302000 0x001000>, /* ap 58 */
1669 <0x00003000 0x00303000 0x001000>, /* ap 59 */
1670 <0x00004000 0x00304000 0x001000>, /* ap 60 */
1671 <0x00005000 0x00305000 0x001000>, /* ap 61 */
1672 <0x00018000 0x00318000 0x004000>, /* ap 62 */
1673 <0x0001c000 0x0031c000 0x001000>, /* ap 63 */
1674 <0x00010000 0x00310000 0x002000>, /* ap 64 */
1675 <0x00028000 0x00328000 0x001000>, /* ap 75 */
1676 <0x00029000 0x00329000 0x001000>, /* ap 76 */
1677 <0x00012000 0x00312000 0x001000>, /* ap 79 */
1678 <0x00020000 0x00320000 0x001000>, /* ap 82 */
1679 <0x00021000 0x00321000 0x001000>, /* ap 83 */
1680 <0x00026000 0x00326000 0x001000>, /* ap 86 */
1681 <0x00027000 0x00327000 0x001000>, /* ap 87 */
1682 <0x0002a000 0x0032a000 0x000400>, /* ap 88 */
1683 <0x0002c000 0x0032c000 0x001000>, /* ap 89 */
1684 <0x00013000 0x00313000 0x001000>, /* ap 90 */
1685 <0x00014000 0x00314000 0x001000>, /* ap 91 */
1686 <0x00006000 0x00306000 0x001000>, /* ap 96 */
1687 <0x00007000 0x00307000 0x001000>, /* ap 97 */
1688 <0x00008000 0x00308000 0x001000>, /* ap 98 */
1689 <0x00009000 0x00309000 0x001000>, /* ap 99 */
1690 <0x0000a000 0x0030a000 0x001000>, /* ap 100 */
1691 <0x0000b000 0x0030b000 0x001000>, /* ap 101 */
1692 <0x0003d000 0x0033d000 0x001000>, /* ap 102 */
1693 <0x0003e000 0x0033e000 0x001000>, /* ap 103 */
1694 <0x0003f000 0x0033f000 0x001000>, /* ap 104 */
1695 <0x00040000 0x00340000 0x001000>, /* ap 105 */
1696 <0x00041000 0x00341000 0x001000>, /* ap 106 */
1697 <0x00042000 0x00342000 0x001000>, /* ap 107 */
1698 <0x00045000 0x00345000 0x001000>, /* ap 108 */
1699 <0x00046000 0x00346000 0x001000>, /* ap 109 */
1700 <0x00047000 0x00347000 0x001000>, /* ap 110 */
1701 <0x00048000 0x00348000 0x001000>, /* ap 111 */
1702 <0x000f2000 0x003f2000 0x002000>, /* ap 112 */
1703 <0x000f4000 0x003f4000 0x001000>, /* ap 113 */
1704 <0x0004c000 0x0034c000 0x002000>, /* ap 114 */
1705 <0x0004e000 0x0034e000 0x001000>, /* ap 115 */
1706 <0x00022000 0x00322000 0x001000>, /* ap 116 */
1707 <0x00023000 0x00323000 0x001000>, /* ap 117 */
1708 <0x000f0000 0x003f0000 0x001000>, /* ap 118 */
1709 <0x0002a400 0x0032a400 0x000400>, /* ap 119 */
1710 <0x0002a800 0x0032a800 0x000400>, /* ap 120 */
1711 <0x0002ac00 0x0032ac00 0x000400>, /* ap 121 */
1712 <0x0002b000 0x0032b000 0x001000>, /* ap 122 */
1713 <0x00080000 0x00380000 0x020000>, /* ap 123 */
1714 <0x000a0000 0x003a0000 0x001000>, /* ap 124 */
1715 <0x000a8000 0x003a8000 0x008000>, /* ap 125 */
1716 <0x000b0000 0x003b0000 0x001000>, /* ap 126 */
1717 <0x000c0000 0x003c0000 0x020000>, /* ap 127 */
1718 <0x000e0000 0x003e0000 0x001000>, /* ap 128 */
1719 <0x000e8000 0x003e8000 0x008000>; /* ap 129 */
1721 target-module@0 { /* 0x48300000, ap 56 40.0 */
1722 compatible = "ti,sysc-omap4", "ti,sysc";
1723 ti,hwmods = "epwmss0";
1726 reg-names = "rev", "sysc";
1727 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1730 <SYSC_IDLE_SMART_WKUP>;
1731 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1734 <SYSC_IDLE_SMART_WKUP>;
1735 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1736 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS0_CLKCTRL 0>;
1737 clock-names = "fck";
1738 #address-cells = <1>;
1740 ranges = <0x0 0x0 0x1000>;
1743 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1745 #address-cells = <1>;
1747 ranges = <0 0 0x1000>;
1748 status = "disabled";
1751 compatible = "ti,am4372-ecap",
1756 clocks = <&l4ls_gclk>;
1757 clock-names = "fck";
1758 status = "disabled";
1762 compatible = "ti,am4372-ehrpwm",
1767 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
1768 clock-names = "tbclk", "fck";
1769 status = "disabled";
1774 target-module@2000 { /* 0x48302000, ap 58 4a.0 */
1775 compatible = "ti,sysc-omap4", "ti,sysc";
1776 ti,hwmods = "epwmss1";
1779 reg-names = "rev", "sysc";
1780 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1783 <SYSC_IDLE_SMART_WKUP>;
1784 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1787 <SYSC_IDLE_SMART_WKUP>;
1788 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1789 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS1_CLKCTRL 0>;
1790 clock-names = "fck";
1791 #address-cells = <1>;
1793 ranges = <0x0 0x2000 0x1000>;
1796 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1798 #address-cells = <1>;
1800 ranges = <0 0 0x1000>;
1801 status = "disabled";
1804 compatible = "ti,am4372-ecap",
1809 clocks = <&l4ls_gclk>;
1810 clock-names = "fck";
1811 status = "disabled";
1815 compatible = "ti,am4372-ehrpwm",
1820 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
1821 clock-names = "tbclk", "fck";
1822 status = "disabled";
1827 target-module@4000 { /* 0x48304000, ap 60 44.0 */
1828 compatible = "ti,sysc-omap4", "ti,sysc";
1829 ti,hwmods = "epwmss2";
1832 reg-names = "rev", "sysc";
1833 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1836 <SYSC_IDLE_SMART_WKUP>;
1837 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1840 <SYSC_IDLE_SMART_WKUP>;
1841 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1842 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS2_CLKCTRL 0>;
1843 clock-names = "fck";
1844 #address-cells = <1>;
1846 ranges = <0x0 0x4000 0x1000>;
1849 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1851 #address-cells = <1>;
1853 ranges = <0 0 0x1000>;
1854 status = "disabled";
1857 compatible = "ti,am4372-ecap",
1862 clocks = <&l4ls_gclk>;
1863 clock-names = "fck";
1864 status = "disabled";
1868 compatible = "ti,am4372-ehrpwm",
1873 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
1874 clock-names = "tbclk", "fck";
1875 status = "disabled";
1880 target-module@6000 { /* 0x48306000, ap 96 58.0 */
1881 compatible = "ti,sysc-omap4", "ti,sysc";
1882 ti,hwmods = "epwmss3";
1885 reg-names = "rev", "sysc";
1886 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1889 <SYSC_IDLE_SMART_WKUP>;
1890 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1893 <SYSC_IDLE_SMART_WKUP>;
1894 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1895 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS3_CLKCTRL 0>;
1896 clock-names = "fck";
1897 #address-cells = <1>;
1899 ranges = <0x0 0x6000 0x1000>;
1902 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1904 #address-cells = <1>;
1906 ranges = <0 0 0x1000>;
1907 status = "disabled";
1910 compatible = "ti,am4372-ehrpwm",
1915 clocks = <&ehrpwm3_tbclk>, <&l4ls_gclk>;
1916 clock-names = "tbclk", "fck";
1917 status = "disabled";
1922 target-module@8000 { /* 0x48308000, ap 98 54.0 */
1923 compatible = "ti,sysc-omap4", "ti,sysc";
1924 ti,hwmods = "epwmss4";
1927 reg-names = "rev", "sysc";
1928 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1931 <SYSC_IDLE_SMART_WKUP>;
1932 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1935 <SYSC_IDLE_SMART_WKUP>;
1936 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1937 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS4_CLKCTRL 0>;
1938 clock-names = "fck";
1939 #address-cells = <1>;
1941 ranges = <0x0 0x8000 0x1000>;
1944 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1946 #address-cells = <1>;
1948 ranges = <0 0 0x1000>;
1949 status = "disabled";
1951 ehrpwm4: pwm@48308200 {
1952 compatible = "ti,am4372-ehrpwm",
1957 clocks = <&ehrpwm4_tbclk>, <&l4ls_gclk>;
1958 clock-names = "tbclk", "fck";
1959 status = "disabled";
1964 target-module@a000 { /* 0x4830a000, ap 100 60.0 */
1965 compatible = "ti,sysc-omap4", "ti,sysc";
1966 ti,hwmods = "epwmss5";
1969 reg-names = "rev", "sysc";
1970 ti,sysc-midle = <SYSC_IDLE_FORCE>,
1973 <SYSC_IDLE_SMART_WKUP>;
1974 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
1977 <SYSC_IDLE_SMART_WKUP>;
1978 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1979 clocks = <&l4ls_clkctrl AM4_L4LS_EPWMSS5_CLKCTRL 0>;
1980 clock-names = "fck";
1981 #address-cells = <1>;
1983 ranges = <0x0 0xa000 0x1000>;
1986 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
1988 #address-cells = <1>;
1990 ranges = <0 0 0x1000>;
1991 status = "disabled";
1994 compatible = "ti,am4372-ehrpwm",
1999 clocks = <&ehrpwm5_tbclk>, <&l4ls_gclk>;
2000 clock-names = "tbclk", "fck";
2001 status = "disabled";
2006 target-module@10000 { /* 0x48310000, ap 64 4e.1 */
2007 compatible = "ti,sysc-omap2", "ti,sysc";
2009 reg = <0x11fe0 0x4>,
2011 reg-names = "rev", "sysc";
2012 ti,sysc-mask = <SYSC_OMAP2_AUTOIDLE>;
2013 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2015 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2016 clocks = <&l4ls_clkctrl AM4_L4LS_RNG_CLKCTRL 0>;
2017 clock-names = "fck";
2018 #address-cells = <1>;
2020 ranges = <0x0 0x10000 0x2000>;
2023 compatible = "ti,omap4-rng";
2025 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
2029 target-module@13000 { /* 0x48313000, ap 90 50.0 */
2030 compatible = "ti,sysc";
2031 status = "disabled";
2032 #address-cells = <1>;
2034 ranges = <0x0 0x13000 0x1000>;
2037 target-module@18000 { /* 0x48318000, ap 62 4c.0 */
2038 compatible = "ti,sysc";
2039 status = "disabled";
2040 #address-cells = <1>;
2042 ranges = <0x0 0x18000 0x4000>;
2045 target-module@20000 { /* 0x48320000, ap 82 34.0 */
2046 compatible = "ti,sysc-omap2", "ti,sysc";
2047 ti,hwmods = "gpio5";
2048 reg = <0x20000 0x4>,
2051 reg-names = "rev", "sysc", "syss";
2052 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2053 SYSC_OMAP2_SOFTRESET |
2054 SYSC_OMAP2_AUTOIDLE)>;
2055 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2058 <SYSC_IDLE_SMART_WKUP>;
2060 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2061 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 0>,
2062 <&l4ls_clkctrl AM4_L4LS_GPIO5_CLKCTRL 8>;
2063 clock-names = "fck", "dbclk";
2064 #address-cells = <1>;
2066 ranges = <0x0 0x20000 0x1000>;
2069 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2071 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
2074 interrupt-controller;
2075 #interrupt-cells = <2>;
2076 status = "disabled";
2080 gpio5_target: target-module@22000 { /* 0x48322000, ap 116 64.0 */
2081 compatible = "ti,sysc-omap2", "ti,sysc";
2082 ti,hwmods = "gpio6";
2083 reg = <0x22000 0x4>,
2086 reg-names = "rev", "sysc", "syss";
2087 ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
2088 SYSC_OMAP2_SOFTRESET |
2089 SYSC_OMAP2_AUTOIDLE)>;
2090 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2093 <SYSC_IDLE_SMART_WKUP>;
2095 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2096 clocks = <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 0>,
2097 <&l4ls_clkctrl AM4_L4LS_GPIO6_CLKCTRL 8>;
2098 clock-names = "fck", "dbclk";
2099 #address-cells = <1>;
2101 ranges = <0x0 0x22000 0x1000>;
2104 compatible = "ti,am4372-gpio","ti,omap4-gpio";
2106 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2109 interrupt-controller;
2110 #interrupt-cells = <2>;
2111 status = "disabled";
2115 target-module@26000 { /* 0x48326000, ap 86 66.0 */
2116 compatible = "ti,sysc-omap4", "ti,sysc";
2117 ti,hwmods = "vpfe0";
2118 reg = <0x26000 0x4>,
2120 reg-names = "rev", "sysc";
2121 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2124 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2127 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2128 clocks = <&l3s_clkctrl AM4_L3S_VPFE0_CLKCTRL 0>;
2129 clock-names = "fck";
2130 #address-cells = <1>;
2132 ranges = <0x0 0x26000 0x1000>;
2135 compatible = "ti,am437x-vpfe";
2137 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
2138 status = "disabled";
2142 target-module@28000 { /* 0x48328000, ap 75 0e.0 */
2143 compatible = "ti,sysc-omap4", "ti,sysc";
2144 ti,hwmods = "vpfe1";
2145 reg = <0x28000 0x4>,
2147 reg-names = "rev", "sysc";
2148 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2151 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2154 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2155 clocks = <&l3s_clkctrl AM4_L3S_VPFE1_CLKCTRL 0>;
2156 clock-names = "fck";
2157 #address-cells = <1>;
2159 ranges = <0x0 0x28000 0x1000>;
2162 compatible = "ti,am437x-vpfe";
2164 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
2165 status = "disabled";
2169 target-module@2a000 { /* 0x4832a000, ap 88 3c.0 */
2170 compatible = "ti,sysc-omap2", "ti,sysc";
2171 ti,hwmods = "dss_core";
2172 reg = <0x2a000 0x4>,
2175 reg-names = "rev", "sysc", "syss";
2176 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2177 SYSC_OMAP2_AUTOIDLE)>;
2179 /* Domains (P, C): per_pwrdm, dss_clkdm */
2180 clocks = <&dss_clkctrl AM4_DSS_DSS_CORE_CLKCTRL 0>;
2181 clock-names = "fck";
2182 #address-cells = <1>;
2184 ranges = <0x00000000 0x0002a000 0x00000400>,
2185 <0x00000400 0x0002a400 0x00000400>,
2186 <0x00000800 0x0002a800 0x00000400>,
2187 <0x00000c00 0x0002ac00 0x00000400>,
2188 <0x00001000 0x0002b000 0x00001000>;
2191 target-module@3d000 { /* 0x4833d000, ap 102 6e.0 */
2192 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2193 ti,hwmods = "timer9";
2194 reg = <0x3d000 0x4>,
2197 reg-names = "rev", "sysc", "syss";
2198 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2199 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2202 <SYSC_IDLE_SMART_WKUP>;
2203 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2204 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER9_CLKCTRL 0>;
2205 clock-names = "fck";
2206 #address-cells = <1>;
2208 ranges = <0x0 0x3d000 0x1000>;
2211 compatible = "ti,am4372-timer","ti,am335x-timer";
2213 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
2214 status = "disabled";
2218 target-module@3f000 { /* 0x4833f000, ap 104 5c.0 */
2219 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2220 ti,hwmods = "timer10";
2221 reg = <0x3f000 0x4>,
2224 reg-names = "rev", "sysc", "syss";
2225 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2226 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2229 <SYSC_IDLE_SMART_WKUP>;
2230 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2231 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER10_CLKCTRL 0>;
2232 clock-names = "fck";
2233 #address-cells = <1>;
2235 ranges = <0x0 0x3f000 0x1000>;
2238 compatible = "ti,am4372-timer","ti,am335x-timer";
2240 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
2241 status = "disabled";
2245 target-module@41000 { /* 0x48341000, ap 106 76.0 */
2246 compatible = "ti,sysc-omap4-timer", "ti,sysc";
2247 ti,hwmods = "timer11";
2248 reg = <0x41000 0x4>,
2251 reg-names = "rev", "sysc", "syss";
2252 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
2253 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2256 <SYSC_IDLE_SMART_WKUP>;
2257 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2258 clocks = <&l4ls_clkctrl AM4_L4LS_TIMER11_CLKCTRL 0>;
2259 clock-names = "fck";
2260 #address-cells = <1>;
2262 ranges = <0x0 0x41000 0x1000>;
2265 compatible = "ti,am4372-timer","ti,am335x-timer";
2267 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
2268 status = "disabled";
2272 target-module@45000 { /* 0x48345000, ap 108 6a.0 */
2273 compatible = "ti,sysc-omap2", "ti,sysc";
2275 reg = <0x45000 0x4>,
2278 reg-names = "rev", "sysc", "syss";
2279 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
2280 SYSC_OMAP2_SOFTRESET |
2281 SYSC_OMAP2_AUTOIDLE)>;
2282 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2286 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2287 clocks = <&l4ls_clkctrl AM4_L4LS_SPI4_CLKCTRL 0>;
2288 clock-names = "fck";
2289 #address-cells = <1>;
2291 ranges = <0x0 0x45000 0x1000>;
2294 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
2296 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
2297 #address-cells = <1>;
2299 status = "disabled";
2303 target-module@47000 { /* 0x48347000, ap 110 70.0 */
2304 compatible = "ti,sysc-omap2", "ti,sysc";
2305 ti,hwmods = "hdq1w";
2306 reg = <0x47000 0x4>,
2309 reg-names = "rev", "sysc", "syss";
2310 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
2311 SYSC_OMAP2_AUTOIDLE)>;
2312 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2313 clocks = <&l4ls_clkctrl AM4_L4LS_HDQ1W_CLKCTRL 0>;
2314 clock-names = "fck";
2315 #address-cells = <1>;
2317 ranges = <0x0 0x47000 0x1000>;
2320 compatible = "ti,am4372-hdq";
2322 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
2323 clocks = <&func_12m_clk>;
2324 clock-names = "fck";
2325 status = "disabled";
2329 target-module@4c000 { /* 0x4834c000, ap 114 72.0 */
2330 compatible = "ti,sysc";
2331 status = "disabled";
2332 #address-cells = <1>;
2334 ranges = <0x0 0x4c000 0x2000>;
2337 target-module@80000 { /* 0x48380000, ap 123 42.0 */
2338 compatible = "ti,sysc-omap4", "ti,sysc";
2339 ti,hwmods = "usb_otg_ss0";
2340 reg = <0x80000 0x4>,
2342 reg-names = "rev", "sysc";
2343 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2344 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2347 <SYSC_IDLE_SMART_WKUP>;
2348 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2351 <SYSC_IDLE_SMART_WKUP>;
2352 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2353 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 0>;
2354 clock-names = "fck";
2355 #address-cells = <1>;
2357 ranges = <0x0 0x80000 0x20000>;
2359 dwc3_1: omap_dwc3@0 {
2360 compatible = "ti,am437x-dwc3";
2361 reg = <0x0 0x10000>;
2362 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2363 #address-cells = <1>;
2366 ranges = <0 0 0x20000>;
2369 compatible = "synopsys,dwc3";
2370 reg = <0x10000 0x10000>;
2371 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2372 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
2373 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
2374 interrupt-names = "peripheral",
2377 phys = <&usb2_phy1>;
2378 phy-names = "usb2-phy";
2379 maximum-speed = "high-speed";
2381 status = "disabled";
2382 snps,dis_u3_susphy_quirk;
2383 snps,dis_u2_susphy_quirk;
2388 target-module@a8000 { /* 0x483a8000, ap 125 6c.0 */
2389 compatible = "ti,sysc-omap4", "ti,sysc";
2390 ti,hwmods = "ocp2scp0";
2391 reg = <0xa8000 0x4>;
2393 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2394 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP0_CLKCTRL 0>;
2395 clock-names = "fck";
2396 #address-cells = <1>;
2398 ranges = <0x0 0xa8000 0x8000>;
2400 ocp2scp0: ocp2scp@0 {
2401 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2402 #address-cells = <1>;
2404 ranges = <0 0 0x8000>;
2406 usb2_phy1: phy@8000 {
2407 compatible = "ti,am437x-usb2";
2409 syscon-phy-power = <&scm_conf 0x620>;
2410 clocks = <&usb_phy0_always_on_clk32k>,
2411 <&l3s_clkctrl AM4_L3S_USB_OTG_SS0_CLKCTRL 8>;
2412 clock-names = "wkupclk", "refclk";
2414 status = "disabled";
2419 target-module@c0000 { /* 0x483c0000, ap 127 7a.0 */
2420 compatible = "ti,sysc-omap4", "ti,sysc";
2421 ti,hwmods = "usb_otg_ss1";
2422 reg = <0xc0000 0x4>,
2424 reg-names = "rev", "sysc";
2425 ti,sysc-mask = <SYSC_OMAP4_DMADISABLE>;
2426 ti,sysc-midle = <SYSC_IDLE_FORCE>,
2429 <SYSC_IDLE_SMART_WKUP>;
2430 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
2433 <SYSC_IDLE_SMART_WKUP>;
2434 /* Domains (P, C): per_pwrdm, l3s_clkdm */
2435 clocks = <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 0>;
2436 clock-names = "fck";
2437 #address-cells = <1>;
2439 ranges = <0x0 0xc0000 0x20000>;
2441 dwc3_2: omap_dwc3@0 {
2442 compatible = "ti,am437x-dwc3";
2443 reg = <0x0 0x10000>;
2444 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2445 #address-cells = <1>;
2448 ranges = <0 0 0x20000>;
2451 compatible = "synopsys,dwc3";
2452 reg = <0x10000 0x10000>;
2453 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2454 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
2455 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
2456 interrupt-names = "peripheral",
2459 phys = <&usb2_phy2>;
2460 phy-names = "usb2-phy";
2461 maximum-speed = "high-speed";
2463 status = "disabled";
2464 snps,dis_u3_susphy_quirk;
2465 snps,dis_u2_susphy_quirk;
2470 target-module@e8000 { /* 0x483e8000, ap 129 78.0 */
2471 compatible = "ti,sysc-omap4", "ti,sysc";
2472 ti,hwmods = "ocp2scp1";
2473 reg = <0xe8000 0x4>;
2475 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
2476 clocks = <&l4ls_clkctrl AM4_L4LS_OCP2SCP1_CLKCTRL 0>;
2477 clock-names = "fck";
2478 #address-cells = <1>;
2480 ranges = <0x0 0xe8000 0x8000>;
2482 ocp2scp1: ocp2scp@0 {
2483 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
2484 #address-cells = <1>;
2486 ranges = <0 0 0x8000>;
2488 usb2_phy2: phy@8000 {
2489 compatible = "ti,am437x-usb2";
2491 syscon-phy-power = <&scm_conf 0x628>;
2492 clocks = <&usb_phy1_always_on_clk32k>,
2493 <&l3s_clkctrl AM4_L3S_USB_OTG_SS1_CLKCTRL 8>;
2494 clock-names = "wkupclk", "refclk";
2496 status = "disabled";
2501 target-module@f2000 { /* 0x483f2000, ap 112 5a.0 */
2502 compatible = "ti,sysc";
2503 status = "disabled";
2504 #address-cells = <1>;
2506 ranges = <0x0 0xf2000 0x2000>;