2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
13 #include <dt-bindings/clock/am3.h>
16 compatible = "ti,am33xx";
17 interrupt-parent = <&intc>;
38 ethernet0 = &cpsw_emac0;
39 ethernet1 = &cpsw_emac1;
51 compatible = "arm,cortex-a8";
55 operating-points-v2 = <&cpu0_opp_table>;
57 clocks = <&dpll_mpu_ck>;
60 clock-latency = <300000>; /* From omap-cpufreq driver */
64 cpu0_opp_table: opp-table {
65 compatible = "operating-points-v2-ti-cpu";
69 * The three following nodes are marked with opp-suspend
70 * because the can not be enabled simultaneously on a
74 opp-hz = /bits/ 64 <300000000>;
75 opp-microvolt = <950000 931000 969000>;
76 opp-supported-hw = <0x06 0x0010>;
81 opp-hz = /bits/ 64 <275000000>;
82 opp-microvolt = <1100000 1078000 1122000>;
83 opp-supported-hw = <0x01 0x00FF>;
88 opp-hz = /bits/ 64 <300000000>;
89 opp-microvolt = <1100000 1078000 1122000>;
90 opp-supported-hw = <0x06 0x0020>;
95 opp-hz = /bits/ 64 <500000000>;
96 opp-microvolt = <1100000 1078000 1122000>;
97 opp-supported-hw = <0x01 0xFFFF>;
101 opp-hz = /bits/ 64 <600000000>;
102 opp-microvolt = <1100000 1078000 1122000>;
103 opp-supported-hw = <0x06 0x0040>;
107 opp-hz = /bits/ 64 <600000000>;
108 opp-microvolt = <1200000 1176000 1224000>;
109 opp-supported-hw = <0x01 0xFFFF>;
113 opp-hz = /bits/ 64 <720000000>;
114 opp-microvolt = <1200000 1176000 1224000>;
115 opp-supported-hw = <0x06 0x0080>;
119 opp-hz = /bits/ 64 <720000000>;
120 opp-microvolt = <1260000 1234800 1285200>;
121 opp-supported-hw = <0x01 0xFFFF>;
125 opp-hz = /bits/ 64 <800000000>;
126 opp-microvolt = <1260000 1234800 1285200>;
127 opp-supported-hw = <0x06 0x0100>;
130 oppnitro-1000000000 {
131 opp-hz = /bits/ 64 <1000000000>;
132 opp-microvolt = <1325000 1298500 1351500>;
133 opp-supported-hw = <0x04 0x0200>;
138 compatible = "arm,cortex-a8-pmu";
140 reg = <0x4b000000 0x1000000>;
141 ti,hwmods = "debugss";
145 * The soc node represents the soc top level view. It is used for IPs
146 * that are not memory mapped in the MPU view or for the MPU itself.
149 compatible = "ti,omap-infra";
151 compatible = "ti,omap3-mpu";
153 pm-sram = <&pm_sram_code
159 * XXX: Use a flat representation of the AM33XX interconnect.
160 * The real AM33XX interconnect network is quite complex. Since
161 * it will not bring real advantage to represent that in DT
162 * for the moment, just use a fake OCP bus entry to represent
163 * the whole bus hierarchy.
166 compatible = "simple-bus";
167 #address-cells = <1>;
170 ti,hwmods = "l3_main";
172 l4_wkup: l4_wkup@44c00000 {
173 compatible = "ti,am3-l4-wkup", "simple-bus";
174 #address-cells = <1>;
176 ranges = <0 0x44c00000 0x280000>;
178 wkup_m3: wkup_m3@100000 {
179 compatible = "ti,am3352-wkup-m3";
180 reg = <0x100000 0x4000>,
182 reg-names = "umem", "dmem";
183 ti,hwmods = "wkup_m3";
184 ti,pm-firmware = "/*(DEBLOBBED)*/";
188 compatible = "ti,am3-prcm", "simple-bus";
189 reg = <0x200000 0x4000>;
190 #address-cells = <1>;
192 ranges = <0 0x200000 0x4000>;
194 prcm_clocks: clocks {
195 #address-cells = <1>;
199 prcm_clockdomains: clockdomains {
204 compatible = "ti,am3-scm", "simple-bus";
205 reg = <0x210000 0x2000>;
206 #address-cells = <1>;
208 #pinctrl-cells = <1>;
209 ranges = <0 0x210000 0x2000>;
211 am33xx_pinmux: pinmux@800 {
212 compatible = "pinctrl-single";
214 #address-cells = <1>;
216 #pinctrl-cells = <1>;
217 pinctrl-single,register-width = <32>;
218 pinctrl-single,function-mask = <0x7f>;
221 scm_conf: scm_conf@0 {
222 compatible = "syscon", "simple-bus";
224 #address-cells = <1>;
226 ranges = <0 0 0x800>;
229 #address-cells = <1>;
234 wkup_m3_ipc: wkup_m3_ipc@1324 {
235 compatible = "ti,am3352-wkup-m3-ipc";
238 ti,rproc = <&wkup_m3>;
239 mboxes = <&mailbox &mbox_wkupm3>;
242 edma_xbar: dma-router@f90 {
243 compatible = "ti,am335x-edma-crossbar";
247 dma-masters = <&edma>;
250 scm_clockdomains: clockdomains {
255 intc: interrupt-controller@48200000 {
256 compatible = "ti,am33xx-intc";
257 interrupt-controller;
258 #interrupt-cells = <1>;
259 reg = <0x48200000 0x1000>;
262 edma: edma@49000000 {
263 compatible = "ti,edma3-tpcc";
265 reg = <0x49000000 0x10000>;
266 reg-names = "edma3_cc";
267 interrupts = <12 13 14>;
268 interrupt-names = "edma3_ccint", "edma3_mperr",
273 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
276 ti,edma-memcpy-channels = <20 21>;
279 edma_tptc0: tptc@49800000 {
280 compatible = "ti,edma3-tptc";
282 reg = <0x49800000 0x100000>;
284 interrupt-names = "edma3_tcerrint";
287 edma_tptc1: tptc@49900000 {
288 compatible = "ti,edma3-tptc";
290 reg = <0x49900000 0x100000>;
292 interrupt-names = "edma3_tcerrint";
295 edma_tptc2: tptc@49a00000 {
296 compatible = "ti,edma3-tptc";
298 reg = <0x49a00000 0x100000>;
300 interrupt-names = "edma3_tcerrint";
303 gpio0: gpio@44e07000 {
304 compatible = "ti,omap4-gpio";
308 interrupt-controller;
309 #interrupt-cells = <2>;
310 reg = <0x44e07000 0x1000>;
314 gpio1: gpio@4804c000 {
315 compatible = "ti,omap4-gpio";
319 interrupt-controller;
320 #interrupt-cells = <2>;
321 reg = <0x4804c000 0x1000>;
325 gpio2: gpio@481ac000 {
326 compatible = "ti,omap4-gpio";
330 interrupt-controller;
331 #interrupt-cells = <2>;
332 reg = <0x481ac000 0x1000>;
336 gpio3: gpio@481ae000 {
337 compatible = "ti,omap4-gpio";
341 interrupt-controller;
342 #interrupt-cells = <2>;
343 reg = <0x481ae000 0x1000>;
347 uart0: serial@44e09000 {
348 compatible = "ti,am3352-uart", "ti,omap3-uart";
350 clock-frequency = <48000000>;
351 reg = <0x44e09000 0x2000>;
354 dmas = <&edma 26 0>, <&edma 27 0>;
355 dma-names = "tx", "rx";
358 uart1: serial@48022000 {
359 compatible = "ti,am3352-uart", "ti,omap3-uart";
361 clock-frequency = <48000000>;
362 reg = <0x48022000 0x2000>;
365 dmas = <&edma 28 0>, <&edma 29 0>;
366 dma-names = "tx", "rx";
369 uart2: serial@48024000 {
370 compatible = "ti,am3352-uart", "ti,omap3-uart";
372 clock-frequency = <48000000>;
373 reg = <0x48024000 0x2000>;
376 dmas = <&edma 30 0>, <&edma 31 0>;
377 dma-names = "tx", "rx";
380 uart3: serial@481a6000 {
381 compatible = "ti,am3352-uart", "ti,omap3-uart";
383 clock-frequency = <48000000>;
384 reg = <0x481a6000 0x2000>;
389 uart4: serial@481a8000 {
390 compatible = "ti,am3352-uart", "ti,omap3-uart";
392 clock-frequency = <48000000>;
393 reg = <0x481a8000 0x2000>;
398 uart5: serial@481aa000 {
399 compatible = "ti,am3352-uart", "ti,omap3-uart";
401 clock-frequency = <48000000>;
402 reg = <0x481aa000 0x2000>;
408 compatible = "ti,omap4-i2c";
409 #address-cells = <1>;
412 reg = <0x44e0b000 0x1000>;
418 compatible = "ti,omap4-i2c";
419 #address-cells = <1>;
422 reg = <0x4802a000 0x1000>;
428 compatible = "ti,omap4-i2c";
429 #address-cells = <1>;
432 reg = <0x4819c000 0x1000>;
438 compatible = "ti,omap4-hsmmc";
441 ti,needs-special-reset;
442 ti,needs-special-hs-handling;
443 dmas = <&edma_xbar 24 0 0
445 dma-names = "tx", "rx";
447 reg = <0x48060000 0x1000>;
452 compatible = "ti,omap4-hsmmc";
454 ti,needs-special-reset;
457 dma-names = "tx", "rx";
459 reg = <0x481d8000 0x1000>;
464 compatible = "ti,omap4-hsmmc";
466 ti,needs-special-reset;
468 reg = <0x47810000 0x1000>;
472 hwspinlock: spinlock@480ca000 {
473 compatible = "ti,omap4-hwspinlock";
474 reg = <0x480ca000 0x1000>;
475 ti,hwmods = "spinlock";
480 compatible = "ti,omap3-wdt";
481 ti,hwmods = "wd_timer2";
482 reg = <0x44e35000 0x1000>;
486 dcan0: can@481cc000 {
487 compatible = "ti,am3352-d_can";
488 ti,hwmods = "d_can0";
489 reg = <0x481cc000 0x2000>;
490 clocks = <&dcan0_fck>;
492 syscon-raminit = <&scm_conf 0x644 0>;
497 dcan1: can@481d0000 {
498 compatible = "ti,am3352-d_can";
499 ti,hwmods = "d_can1";
500 reg = <0x481d0000 0x2000>;
501 clocks = <&dcan1_fck>;
503 syscon-raminit = <&scm_conf 0x644 1>;
508 mailbox: mailbox@480c8000 {
509 compatible = "ti,omap4-mailbox";
510 reg = <0x480C8000 0x200>;
512 ti,hwmods = "mailbox";
514 ti,mbox-num-users = <4>;
515 ti,mbox-num-fifos = <8>;
516 mbox_wkupm3: wkup_m3 {
518 ti,mbox-tx = <0 0 0>;
519 ti,mbox-rx = <0 0 3>;
523 timer1: timer@44e31000 {
524 compatible = "ti,am335x-timer-1ms";
525 reg = <0x44e31000 0x400>;
527 ti,hwmods = "timer1";
529 clocks = <&timer1_fck>;
533 timer2: timer@48040000 {
534 compatible = "ti,am335x-timer";
535 reg = <0x48040000 0x400>;
537 ti,hwmods = "timer2";
538 clocks = <&timer2_fck>;
542 timer3: timer@48042000 {
543 compatible = "ti,am335x-timer";
544 reg = <0x48042000 0x400>;
546 ti,hwmods = "timer3";
549 timer4: timer@48044000 {
550 compatible = "ti,am335x-timer";
551 reg = <0x48044000 0x400>;
553 ti,hwmods = "timer4";
557 timer5: timer@48046000 {
558 compatible = "ti,am335x-timer";
559 reg = <0x48046000 0x400>;
561 ti,hwmods = "timer5";
565 timer6: timer@48048000 {
566 compatible = "ti,am335x-timer";
567 reg = <0x48048000 0x400>;
569 ti,hwmods = "timer6";
573 timer7: timer@4804a000 {
574 compatible = "ti,am335x-timer";
575 reg = <0x4804a000 0x400>;
577 ti,hwmods = "timer7";
582 compatible = "ti,am3352-rtc", "ti,da830-rtc";
583 reg = <0x44e3e000 0x1000>;
587 clocks = <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
588 clock-names = "int-clk";
592 compatible = "ti,omap4-mcspi";
593 #address-cells = <1>;
595 reg = <0x48030000 0x400>;
603 dma-names = "tx0", "rx0", "tx1", "rx1";
608 compatible = "ti,omap4-mcspi";
609 #address-cells = <1>;
611 reg = <0x481a0000 0x400>;
619 dma-names = "tx0", "rx0", "tx1", "rx1";
624 compatible = "ti,am33xx-usb";
625 reg = <0x47400000 0x1000>;
627 #address-cells = <1>;
629 ti,hwmods = "usb_otg_hs";
632 usb_ctrl_mod: control@44e10620 {
633 compatible = "ti,am335x-usb-ctrl-module";
634 reg = <0x44e10620 0x10
636 reg-names = "phy_ctrl", "wakeup";
640 usb0_phy: usb-phy@47401300 {
641 compatible = "ti,am335x-usb-phy";
642 reg = <0x47401300 0x100>;
645 ti,ctrl_mod = <&usb_ctrl_mod>;
650 compatible = "ti,musb-am33xx";
652 reg = <0x47401400 0x400
654 reg-names = "mc", "control";
657 interrupt-names = "mc";
659 mentor,multipoint = <1>;
660 mentor,num-eps = <16>;
661 mentor,ram-bits = <12>;
662 mentor,power = <500>;
665 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
666 &cppi41dma 2 0 &cppi41dma 3 0
667 &cppi41dma 4 0 &cppi41dma 5 0
668 &cppi41dma 6 0 &cppi41dma 7 0
669 &cppi41dma 8 0 &cppi41dma 9 0
670 &cppi41dma 10 0 &cppi41dma 11 0
671 &cppi41dma 12 0 &cppi41dma 13 0
672 &cppi41dma 14 0 &cppi41dma 0 1
673 &cppi41dma 1 1 &cppi41dma 2 1
674 &cppi41dma 3 1 &cppi41dma 4 1
675 &cppi41dma 5 1 &cppi41dma 6 1
676 &cppi41dma 7 1 &cppi41dma 8 1
677 &cppi41dma 9 1 &cppi41dma 10 1
678 &cppi41dma 11 1 &cppi41dma 12 1
679 &cppi41dma 13 1 &cppi41dma 14 1>;
681 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
682 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
684 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
685 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
689 usb1_phy: usb-phy@47401b00 {
690 compatible = "ti,am335x-usb-phy";
691 reg = <0x47401b00 0x100>;
694 ti,ctrl_mod = <&usb_ctrl_mod>;
699 compatible = "ti,musb-am33xx";
701 reg = <0x47401c00 0x400
703 reg-names = "mc", "control";
705 interrupt-names = "mc";
707 mentor,multipoint = <1>;
708 mentor,num-eps = <16>;
709 mentor,ram-bits = <12>;
710 mentor,power = <500>;
713 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
714 &cppi41dma 17 0 &cppi41dma 18 0
715 &cppi41dma 19 0 &cppi41dma 20 0
716 &cppi41dma 21 0 &cppi41dma 22 0
717 &cppi41dma 23 0 &cppi41dma 24 0
718 &cppi41dma 25 0 &cppi41dma 26 0
719 &cppi41dma 27 0 &cppi41dma 28 0
720 &cppi41dma 29 0 &cppi41dma 15 1
721 &cppi41dma 16 1 &cppi41dma 17 1
722 &cppi41dma 18 1 &cppi41dma 19 1
723 &cppi41dma 20 1 &cppi41dma 21 1
724 &cppi41dma 22 1 &cppi41dma 23 1
725 &cppi41dma 24 1 &cppi41dma 25 1
726 &cppi41dma 26 1 &cppi41dma 27 1
727 &cppi41dma 28 1 &cppi41dma 29 1>;
729 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
730 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
732 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
733 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
737 cppi41dma: dma-controller@47402000 {
738 compatible = "ti,am3359-cppi41";
739 reg = <0x47400000 0x1000
743 reg-names = "glue", "controller", "scheduler", "queuemgr";
745 interrupt-names = "glue";
747 #dma-channels = <30>;
748 #dma-requests = <256>;
753 epwmss0: epwmss@48300000 {
754 compatible = "ti,am33xx-pwmss";
755 reg = <0x48300000 0x10>;
756 ti,hwmods = "epwmss0";
757 #address-cells = <1>;
760 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
761 0x48300180 0x48300180 0x80 /* EQEP */
762 0x48300200 0x48300200 0x80>; /* EHRPWM */
764 ecap0: ecap@48300100 {
765 compatible = "ti,am3352-ecap",
768 reg = <0x48300100 0x80>;
769 clocks = <&l4ls_gclk>;
772 interrupt-names = "ecap0";
776 ehrpwm0: pwm@48300200 {
777 compatible = "ti,am3352-ehrpwm",
780 reg = <0x48300200 0x80>;
781 clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;
782 clock-names = "tbclk", "fck";
787 epwmss1: epwmss@48302000 {
788 compatible = "ti,am33xx-pwmss";
789 reg = <0x48302000 0x10>;
790 ti,hwmods = "epwmss1";
791 #address-cells = <1>;
794 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
795 0x48302180 0x48302180 0x80 /* EQEP */
796 0x48302200 0x48302200 0x80>; /* EHRPWM */
798 ecap1: ecap@48302100 {
799 compatible = "ti,am3352-ecap",
802 reg = <0x48302100 0x80>;
803 clocks = <&l4ls_gclk>;
806 interrupt-names = "ecap1";
810 ehrpwm1: pwm@48302200 {
811 compatible = "ti,am3352-ehrpwm",
814 reg = <0x48302200 0x80>;
815 clocks = <&ehrpwm1_tbclk>, <&l4ls_gclk>;
816 clock-names = "tbclk", "fck";
821 epwmss2: epwmss@48304000 {
822 compatible = "ti,am33xx-pwmss";
823 reg = <0x48304000 0x10>;
824 ti,hwmods = "epwmss2";
825 #address-cells = <1>;
828 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
829 0x48304180 0x48304180 0x80 /* EQEP */
830 0x48304200 0x48304200 0x80>; /* EHRPWM */
832 ecap2: ecap@48304100 {
833 compatible = "ti,am3352-ecap",
836 reg = <0x48304100 0x80>;
837 clocks = <&l4ls_gclk>;
840 interrupt-names = "ecap2";
844 ehrpwm2: pwm@48304200 {
845 compatible = "ti,am3352-ehrpwm",
848 reg = <0x48304200 0x80>;
849 clocks = <&ehrpwm2_tbclk>, <&l4ls_gclk>;
850 clock-names = "tbclk", "fck";
855 mac: ethernet@4a100000 {
856 compatible = "ti,am335x-cpsw","ti,cpsw";
857 ti,hwmods = "cpgmac0";
858 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
859 clock-names = "fck", "cpts";
860 cpdma_channels = <8>;
861 ale_entries = <1024>;
862 bd_ram_size = <0x2000>;
863 mac_control = <0x20>;
866 cpts_clock_mult = <0x80000000>;
867 cpts_clock_shift = <29>;
868 reg = <0x4a100000 0x800
870 #address-cells = <1>;
878 interrupts = <40 41 42 43>;
880 syscon = <&scm_conf>;
883 davinci_mdio: mdio@4a101000 {
884 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
885 #address-cells = <1>;
887 ti,hwmods = "davinci_mdio";
888 bus_freq = <1000000>;
889 reg = <0x4a101000 0x100>;
893 cpsw_emac0: slave@4a100200 {
894 /* Filled in by U-Boot */
895 mac-address = [ 00 00 00 00 00 00 ];
898 cpsw_emac1: slave@4a100300 {
899 /* Filled in by U-Boot */
900 mac-address = [ 00 00 00 00 00 00 ];
903 phy_sel: cpsw-phy-sel@44e10650 {
904 compatible = "ti,am3352-cpsw-phy-sel";
905 reg= <0x44e10650 0x4>;
906 reg-names = "gmii-sel";
910 ocmcram: ocmcram@40300000 {
911 compatible = "mmio-sram";
912 reg = <0x40300000 0x10000>; /* 64k */
913 ranges = <0x0 0x40300000 0x10000>;
914 #address-cells = <1>;
917 pm_sram_code: pm-sram-code@0 {
918 compatible = "ti,sram";
923 pm_sram_data: pm-sram-data@1000 {
924 compatible = "ti,sram";
925 reg = <0x1000 0x1000>;
931 compatible = "ti,am3352-elm";
932 reg = <0x48080000 0x2000>;
938 lcdc: lcdc@4830e000 {
939 compatible = "ti,am33xx-tilcdc";
940 reg = <0x4830e000 0x1000>;
946 tscadc: tscadc@44e0d000 {
947 compatible = "ti,am3359-tscadc";
948 reg = <0x44e0d000 0x1000>;
950 ti,hwmods = "adc_tsc";
952 dmas = <&edma 53 0>, <&edma 57 0>;
953 dma-names = "fifo0", "fifo1";
956 compatible = "ti,am3359-tsc";
959 #io-channel-cells = <1>;
960 compatible = "ti,am3359-adc";
964 emif: emif@4c000000 {
965 compatible = "ti,emif-am3352";
966 reg = <0x4c000000 0x1000000>;
969 sram = <&pm_sram_code
974 gpmc: gpmc@50000000 {
975 compatible = "ti,am3352-gpmc";
978 reg = <0x50000000 0x2000>;
983 gpmc,num-waitpins = <2>;
984 #address-cells = <2>;
986 interrupt-controller;
987 #interrupt-cells = <2>;
993 sham: sham@53100000 {
994 compatible = "ti,omap4-sham";
996 reg = <0x53100000 0x200>;
1003 compatible = "ti,omap4-aes";
1005 reg = <0x53500000 0xa0>;
1009 dma-names = "tx", "rx";
1012 mcasp0: mcasp@48038000 {
1013 compatible = "ti,am33xx-mcasp-audio";
1014 ti,hwmods = "mcasp0";
1015 reg = <0x48038000 0x2000>,
1016 <0x46000000 0x400000>;
1017 reg-names = "mpu", "dat";
1018 interrupts = <80>, <81>;
1019 interrupt-names = "tx", "rx";
1020 status = "disabled";
1023 dma-names = "tx", "rx";
1026 mcasp1: mcasp@4803c000 {
1027 compatible = "ti,am33xx-mcasp-audio";
1028 ti,hwmods = "mcasp1";
1029 reg = <0x4803C000 0x2000>,
1030 <0x46400000 0x400000>;
1031 reg-names = "mpu", "dat";
1032 interrupts = <82>, <83>;
1033 interrupt-names = "tx", "rx";
1034 status = "disabled";
1035 dmas = <&edma 10 2>,
1037 dma-names = "tx", "rx";
1041 compatible = "ti,omap4-rng";
1043 reg = <0x48310000 0x2000>;
1049 #include "am33xx-clocks.dtsi"