2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
44 compatible = "arm,cortex-a8";
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
60 voltage-tolerance = <2>; /* 2 percentage */
62 clocks = <&dpll_mpu_ck>;
65 clock-latency = <300000>; /* From omap-cpufreq driver */
70 compatible = "arm,cortex-a8-pmu";
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
79 compatible = "ti,omap-infra";
81 compatible = "ti,omap3-mpu";
87 * XXX: Use a flat representation of the AM33XX interconnect.
88 * The real AM33XX interconnect network is quite complex. Since
89 * it will not bring real advantage to represent that in DT
90 * for the moment, just use a fake OCP bus entry to represent
91 * the whole bus hierarchy.
94 compatible = "simple-bus";
98 ti,hwmods = "l3_main";
100 l4_wkup: l4_wkup@44c00000 {
101 compatible = "ti,am3-l4-wkup", "simple-bus";
102 #address-cells = <1>;
104 ranges = <0 0x44c00000 0x280000>;
106 wkup_m3: wkup_m3@100000 {
107 compatible = "ti,am3352-wkup-m3";
108 reg = <0x100000 0x4000>,
110 reg-names = "umem", "dmem";
111 ti,hwmods = "wkup_m3";
112 ti,pm-firmware = "/*(DEBLOBBED)*/";
116 compatible = "ti,am3-prcm";
117 reg = <0x200000 0x4000>;
119 prcm_clocks: clocks {
120 #address-cells = <1>;
124 prcm_clockdomains: clockdomains {
129 compatible = "ti,am3-scm", "simple-bus";
130 reg = <0x210000 0x2000>;
131 #address-cells = <1>;
133 ranges = <0 0x210000 0x2000>;
135 am33xx_pinmux: pinmux@800 {
136 compatible = "pinctrl-single";
138 #address-cells = <1>;
140 pinctrl-single,register-width = <32>;
141 pinctrl-single,function-mask = <0x7f>;
144 scm_conf: scm_conf@0 {
145 compatible = "syscon", "simple-bus";
147 #address-cells = <1>;
149 ranges = <0 0 0x800>;
152 #address-cells = <1>;
157 wkup_m3_ipc: wkup_m3_ipc@1324 {
158 compatible = "ti,am3352-wkup-m3-ipc";
161 ti,rproc = <&wkup_m3>;
162 mboxes = <&mailbox &mbox_wkupm3>;
165 scm_clockdomains: clockdomains {
170 intc: interrupt-controller@48200000 {
171 compatible = "ti,am33xx-intc";
172 interrupt-controller;
173 #interrupt-cells = <1>;
174 reg = <0x48200000 0x1000>;
177 edma: edma@49000000 {
178 compatible = "ti,edma3";
179 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
180 reg = <0x49000000 0x10000>,
182 interrupts = <12 13 14>;
186 gpio0: gpio@44e07000 {
187 compatible = "ti,omap4-gpio";
191 interrupt-controller;
192 #interrupt-cells = <2>;
193 reg = <0x44e07000 0x1000>;
197 gpio1: gpio@4804c000 {
198 compatible = "ti,omap4-gpio";
202 interrupt-controller;
203 #interrupt-cells = <2>;
204 reg = <0x4804c000 0x1000>;
208 gpio2: gpio@481ac000 {
209 compatible = "ti,omap4-gpio";
213 interrupt-controller;
214 #interrupt-cells = <2>;
215 reg = <0x481ac000 0x1000>;
219 gpio3: gpio@481ae000 {
220 compatible = "ti,omap4-gpio";
224 interrupt-controller;
225 #interrupt-cells = <2>;
226 reg = <0x481ae000 0x1000>;
230 uart0: serial@44e09000 {
231 compatible = "ti,am3352-uart", "ti,omap3-uart";
233 clock-frequency = <48000000>;
234 reg = <0x44e09000 0x2000>;
237 dmas = <&edma 26>, <&edma 27>;
238 dma-names = "tx", "rx";
241 uart1: serial@48022000 {
242 compatible = "ti,am3352-uart", "ti,omap3-uart";
244 clock-frequency = <48000000>;
245 reg = <0x48022000 0x2000>;
248 dmas = <&edma 28>, <&edma 29>;
249 dma-names = "tx", "rx";
252 uart2: serial@48024000 {
253 compatible = "ti,am3352-uart", "ti,omap3-uart";
255 clock-frequency = <48000000>;
256 reg = <0x48024000 0x2000>;
259 dmas = <&edma 30>, <&edma 31>;
260 dma-names = "tx", "rx";
263 uart3: serial@481a6000 {
264 compatible = "ti,am3352-uart", "ti,omap3-uart";
266 clock-frequency = <48000000>;
267 reg = <0x481a6000 0x2000>;
272 uart4: serial@481a8000 {
273 compatible = "ti,am3352-uart", "ti,omap3-uart";
275 clock-frequency = <48000000>;
276 reg = <0x481a8000 0x2000>;
281 uart5: serial@481aa000 {
282 compatible = "ti,am3352-uart", "ti,omap3-uart";
284 clock-frequency = <48000000>;
285 reg = <0x481aa000 0x2000>;
291 compatible = "ti,omap4-i2c";
292 #address-cells = <1>;
295 reg = <0x44e0b000 0x1000>;
301 compatible = "ti,omap4-i2c";
302 #address-cells = <1>;
305 reg = <0x4802a000 0x1000>;
311 compatible = "ti,omap4-i2c";
312 #address-cells = <1>;
315 reg = <0x4819c000 0x1000>;
321 compatible = "ti,omap4-hsmmc";
324 ti,needs-special-reset;
325 ti,needs-special-hs-handling;
328 dma-names = "tx", "rx";
330 interrupt-parent = <&intc>;
331 reg = <0x48060000 0x1000>;
336 compatible = "ti,omap4-hsmmc";
338 ti,needs-special-reset;
341 dma-names = "tx", "rx";
343 interrupt-parent = <&intc>;
344 reg = <0x481d8000 0x1000>;
349 compatible = "ti,omap4-hsmmc";
351 ti,needs-special-reset;
353 interrupt-parent = <&intc>;
354 reg = <0x47810000 0x1000>;
358 hwspinlock: spinlock@480ca000 {
359 compatible = "ti,omap4-hwspinlock";
360 reg = <0x480ca000 0x1000>;
361 ti,hwmods = "spinlock";
366 compatible = "ti,omap3-wdt";
367 ti,hwmods = "wd_timer2";
368 reg = <0x44e35000 0x1000>;
372 dcan0: can@481cc000 {
373 compatible = "ti,am3352-d_can";
374 ti,hwmods = "d_can0";
375 reg = <0x481cc000 0x2000>;
376 clocks = <&dcan0_fck>;
378 syscon-raminit = <&scm_conf 0x644 0>;
383 dcan1: can@481d0000 {
384 compatible = "ti,am3352-d_can";
385 ti,hwmods = "d_can1";
386 reg = <0x481d0000 0x2000>;
387 clocks = <&dcan1_fck>;
389 syscon-raminit = <&scm_conf 0x644 1>;
394 mailbox: mailbox@480C8000 {
395 compatible = "ti,omap4-mailbox";
396 reg = <0x480C8000 0x200>;
398 ti,hwmods = "mailbox";
400 ti,mbox-num-users = <4>;
401 ti,mbox-num-fifos = <8>;
402 mbox_wkupm3: wkup_m3 {
403 ti,mbox-tx = <0 0 0>;
404 ti,mbox-rx = <0 0 3>;
408 timer1: timer@44e31000 {
409 compatible = "ti,am335x-timer-1ms";
410 reg = <0x44e31000 0x400>;
412 ti,hwmods = "timer1";
416 timer2: timer@48040000 {
417 compatible = "ti,am335x-timer";
418 reg = <0x48040000 0x400>;
420 ti,hwmods = "timer2";
423 timer3: timer@48042000 {
424 compatible = "ti,am335x-timer";
425 reg = <0x48042000 0x400>;
427 ti,hwmods = "timer3";
430 timer4: timer@48044000 {
431 compatible = "ti,am335x-timer";
432 reg = <0x48044000 0x400>;
434 ti,hwmods = "timer4";
438 timer5: timer@48046000 {
439 compatible = "ti,am335x-timer";
440 reg = <0x48046000 0x400>;
442 ti,hwmods = "timer5";
446 timer6: timer@48048000 {
447 compatible = "ti,am335x-timer";
448 reg = <0x48048000 0x400>;
450 ti,hwmods = "timer6";
454 timer7: timer@4804a000 {
455 compatible = "ti,am335x-timer";
456 reg = <0x4804a000 0x400>;
458 ti,hwmods = "timer7";
463 compatible = "ti,am3352-rtc", "ti,da830-rtc";
464 reg = <0x44e3e000 0x1000>;
471 compatible = "ti,omap4-mcspi";
472 #address-cells = <1>;
474 reg = <0x48030000 0x400>;
482 dma-names = "tx0", "rx0", "tx1", "rx1";
487 compatible = "ti,omap4-mcspi";
488 #address-cells = <1>;
490 reg = <0x481a0000 0x400>;
498 dma-names = "tx0", "rx0", "tx1", "rx1";
503 compatible = "ti,am33xx-usb";
504 reg = <0x47400000 0x1000>;
506 #address-cells = <1>;
508 ti,hwmods = "usb_otg_hs";
511 usb_ctrl_mod: control@44e10620 {
512 compatible = "ti,am335x-usb-ctrl-module";
513 reg = <0x44e10620 0x10
515 reg-names = "phy_ctrl", "wakeup";
519 usb0_phy: usb-phy@47401300 {
520 compatible = "ti,am335x-usb-phy";
521 reg = <0x47401300 0x100>;
524 ti,ctrl_mod = <&usb_ctrl_mod>;
528 compatible = "ti,musb-am33xx";
530 reg = <0x47401400 0x400
532 reg-names = "mc", "control";
535 interrupt-names = "mc";
537 mentor,multipoint = <1>;
538 mentor,num-eps = <16>;
539 mentor,ram-bits = <12>;
540 mentor,power = <500>;
543 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
544 &cppi41dma 2 0 &cppi41dma 3 0
545 &cppi41dma 4 0 &cppi41dma 5 0
546 &cppi41dma 6 0 &cppi41dma 7 0
547 &cppi41dma 8 0 &cppi41dma 9 0
548 &cppi41dma 10 0 &cppi41dma 11 0
549 &cppi41dma 12 0 &cppi41dma 13 0
550 &cppi41dma 14 0 &cppi41dma 0 1
551 &cppi41dma 1 1 &cppi41dma 2 1
552 &cppi41dma 3 1 &cppi41dma 4 1
553 &cppi41dma 5 1 &cppi41dma 6 1
554 &cppi41dma 7 1 &cppi41dma 8 1
555 &cppi41dma 9 1 &cppi41dma 10 1
556 &cppi41dma 11 1 &cppi41dma 12 1
557 &cppi41dma 13 1 &cppi41dma 14 1>;
559 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
560 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
562 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
563 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
567 usb1_phy: usb-phy@47401b00 {
568 compatible = "ti,am335x-usb-phy";
569 reg = <0x47401b00 0x100>;
572 ti,ctrl_mod = <&usb_ctrl_mod>;
576 compatible = "ti,musb-am33xx";
578 reg = <0x47401c00 0x400
580 reg-names = "mc", "control";
582 interrupt-names = "mc";
584 mentor,multipoint = <1>;
585 mentor,num-eps = <16>;
586 mentor,ram-bits = <12>;
587 mentor,power = <500>;
590 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
591 &cppi41dma 17 0 &cppi41dma 18 0
592 &cppi41dma 19 0 &cppi41dma 20 0
593 &cppi41dma 21 0 &cppi41dma 22 0
594 &cppi41dma 23 0 &cppi41dma 24 0
595 &cppi41dma 25 0 &cppi41dma 26 0
596 &cppi41dma 27 0 &cppi41dma 28 0
597 &cppi41dma 29 0 &cppi41dma 15 1
598 &cppi41dma 16 1 &cppi41dma 17 1
599 &cppi41dma 18 1 &cppi41dma 19 1
600 &cppi41dma 20 1 &cppi41dma 21 1
601 &cppi41dma 22 1 &cppi41dma 23 1
602 &cppi41dma 24 1 &cppi41dma 25 1
603 &cppi41dma 26 1 &cppi41dma 27 1
604 &cppi41dma 28 1 &cppi41dma 29 1>;
606 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
607 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
609 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
610 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
614 cppi41dma: dma-controller@47402000 {
615 compatible = "ti,am3359-cppi41";
616 reg = <0x47400000 0x1000
620 reg-names = "glue", "controller", "scheduler", "queuemgr";
622 interrupt-names = "glue";
624 #dma-channels = <30>;
625 #dma-requests = <256>;
630 epwmss0: epwmss@48300000 {
631 compatible = "ti,am33xx-pwmss";
632 reg = <0x48300000 0x10>;
633 ti,hwmods = "epwmss0";
634 #address-cells = <1>;
637 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
638 0x48300180 0x48300180 0x80 /* EQEP */
639 0x48300200 0x48300200 0x80>; /* EHRPWM */
641 ecap0: ecap@48300100 {
642 compatible = "ti,am33xx-ecap";
644 reg = <0x48300100 0x80>;
646 interrupt-names = "ecap0";
651 ehrpwm0: ehrpwm@48300200 {
652 compatible = "ti,am33xx-ehrpwm";
654 reg = <0x48300200 0x80>;
655 ti,hwmods = "ehrpwm0";
660 epwmss1: epwmss@48302000 {
661 compatible = "ti,am33xx-pwmss";
662 reg = <0x48302000 0x10>;
663 ti,hwmods = "epwmss1";
664 #address-cells = <1>;
667 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
668 0x48302180 0x48302180 0x80 /* EQEP */
669 0x48302200 0x48302200 0x80>; /* EHRPWM */
671 ecap1: ecap@48302100 {
672 compatible = "ti,am33xx-ecap";
674 reg = <0x48302100 0x80>;
676 interrupt-names = "ecap1";
681 ehrpwm1: ehrpwm@48302200 {
682 compatible = "ti,am33xx-ehrpwm";
684 reg = <0x48302200 0x80>;
685 ti,hwmods = "ehrpwm1";
690 epwmss2: epwmss@48304000 {
691 compatible = "ti,am33xx-pwmss";
692 reg = <0x48304000 0x10>;
693 ti,hwmods = "epwmss2";
694 #address-cells = <1>;
697 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
698 0x48304180 0x48304180 0x80 /* EQEP */
699 0x48304200 0x48304200 0x80>; /* EHRPWM */
701 ecap2: ecap@48304100 {
702 compatible = "ti,am33xx-ecap";
704 reg = <0x48304100 0x80>;
706 interrupt-names = "ecap2";
711 ehrpwm2: ehrpwm@48304200 {
712 compatible = "ti,am33xx-ehrpwm";
714 reg = <0x48304200 0x80>;
715 ti,hwmods = "ehrpwm2";
720 mac: ethernet@4a100000 {
721 compatible = "ti,am335x-cpsw","ti,cpsw";
722 ti,hwmods = "cpgmac0";
723 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
724 clock-names = "fck", "cpts";
725 cpdma_channels = <8>;
726 ale_entries = <1024>;
727 bd_ram_size = <0x2000>;
730 mac_control = <0x20>;
733 cpts_clock_mult = <0x80000000>;
734 cpts_clock_shift = <29>;
735 reg = <0x4a100000 0x800
737 #address-cells = <1>;
739 interrupt-parent = <&intc>;
746 interrupts = <40 41 42 43>;
748 syscon = <&scm_conf>;
751 davinci_mdio: mdio@4a101000 {
752 compatible = "ti,davinci_mdio";
753 #address-cells = <1>;
755 ti,hwmods = "davinci_mdio";
756 bus_freq = <1000000>;
757 reg = <0x4a101000 0x100>;
761 cpsw_emac0: slave@4a100200 {
762 /* Filled in by U-Boot */
763 mac-address = [ 00 00 00 00 00 00 ];
766 cpsw_emac1: slave@4a100300 {
767 /* Filled in by U-Boot */
768 mac-address = [ 00 00 00 00 00 00 ];
771 phy_sel: cpsw-phy-sel@44e10650 {
772 compatible = "ti,am3352-cpsw-phy-sel";
773 reg= <0x44e10650 0x4>;
774 reg-names = "gmii-sel";
778 ocmcram: ocmcram@40300000 {
779 compatible = "mmio-sram";
780 reg = <0x40300000 0x10000>; /* 64k */
784 compatible = "ti,am3352-elm";
785 reg = <0x48080000 0x2000>;
791 lcdc: lcdc@4830e000 {
792 compatible = "ti,am33xx-tilcdc";
793 reg = <0x4830e000 0x1000>;
794 interrupt-parent = <&intc>;
800 tscadc: tscadc@44e0d000 {
801 compatible = "ti,am3359-tscadc";
802 reg = <0x44e0d000 0x1000>;
803 interrupt-parent = <&intc>;
805 ti,hwmods = "adc_tsc";
809 compatible = "ti,am3359-tsc";
812 #io-channel-cells = <1>;
813 compatible = "ti,am3359-adc";
817 gpmc: gpmc@50000000 {
818 compatible = "ti,am3352-gpmc";
821 reg = <0x50000000 0x2000>;
824 gpmc,num-waitpins = <2>;
825 #address-cells = <2>;
830 sham: sham@53100000 {
831 compatible = "ti,omap4-sham";
833 reg = <0x53100000 0x200>;
840 compatible = "ti,omap4-aes";
842 reg = <0x53500000 0xa0>;
846 dma-names = "tx", "rx";
849 mcasp0: mcasp@48038000 {
850 compatible = "ti,am33xx-mcasp-audio";
851 ti,hwmods = "mcasp0";
852 reg = <0x48038000 0x2000>,
853 <0x46000000 0x400000>;
854 reg-names = "mpu", "dat";
855 interrupts = <80>, <81>;
856 interrupt-names = "tx", "rx";
860 dma-names = "tx", "rx";
863 mcasp1: mcasp@4803C000 {
864 compatible = "ti,am33xx-mcasp-audio";
865 ti,hwmods = "mcasp1";
866 reg = <0x4803C000 0x2000>,
867 <0x46400000 0x400000>;
868 reg-names = "mpu", "dat";
869 interrupts = <82>, <83>;
870 interrupt-names = "tx", "rx";
874 dma-names = "tx", "rx";
878 compatible = "ti,omap4-rng";
880 reg = <0x48310000 0x2000>;
886 /include/ "am33xx-clocks.dtsi"