2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/bus/ti-sysc.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/pinctrl/am33xx.h>
14 #include <dt-bindings/clock/am3.h>
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
39 ethernet0 = &cpsw_emac0;
40 ethernet1 = &cpsw_emac1;
52 compatible = "arm,cortex-a8";
56 operating-points-v2 = <&cpu0_opp_table>;
58 clocks = <&dpll_mpu_ck>;
61 clock-latency = <300000>; /* From omap-cpufreq driver */
65 cpu0_opp_table: opp-table {
66 compatible = "operating-points-v2-ti-cpu";
70 * The three following nodes are marked with opp-suspend
71 * because the can not be enabled simultaneously on a
75 opp-hz = /bits/ 64 <300000000>;
76 opp-microvolt = <950000 931000 969000>;
77 opp-supported-hw = <0x06 0x0010>;
82 opp-hz = /bits/ 64 <275000000>;
83 opp-microvolt = <1100000 1078000 1122000>;
84 opp-supported-hw = <0x01 0x00FF>;
89 opp-hz = /bits/ 64 <300000000>;
90 opp-microvolt = <1100000 1078000 1122000>;
91 opp-supported-hw = <0x06 0x0020>;
96 opp-hz = /bits/ 64 <500000000>;
97 opp-microvolt = <1100000 1078000 1122000>;
98 opp-supported-hw = <0x01 0xFFFF>;
102 opp-hz = /bits/ 64 <600000000>;
103 opp-microvolt = <1100000 1078000 1122000>;
104 opp-supported-hw = <0x06 0x0040>;
108 opp-hz = /bits/ 64 <600000000>;
109 opp-microvolt = <1200000 1176000 1224000>;
110 opp-supported-hw = <0x01 0xFFFF>;
114 opp-hz = /bits/ 64 <720000000>;
115 opp-microvolt = <1200000 1176000 1224000>;
116 opp-supported-hw = <0x06 0x0080>;
120 opp-hz = /bits/ 64 <720000000>;
121 opp-microvolt = <1260000 1234800 1285200>;
122 opp-supported-hw = <0x01 0xFFFF>;
126 opp-hz = /bits/ 64 <800000000>;
127 opp-microvolt = <1260000 1234800 1285200>;
128 opp-supported-hw = <0x06 0x0100>;
131 oppnitro-1000000000 {
132 opp-hz = /bits/ 64 <1000000000>;
133 opp-microvolt = <1325000 1298500 1351500>;
134 opp-supported-hw = <0x04 0x0200>;
139 compatible = "arm,cortex-a8-pmu";
141 reg = <0x4b000000 0x1000000>;
142 ti,hwmods = "debugss";
146 * The soc node represents the soc top level view. It is used for IPs
147 * that are not memory mapped in the MPU view or for the MPU itself.
150 compatible = "ti,omap-infra";
152 compatible = "ti,omap3-mpu";
154 pm-sram = <&pm_sram_code
160 * XXX: Use a flat representation of the AM33XX interconnect.
161 * The real AM33XX interconnect network is quite complex. Since
162 * it will not bring real advantage to represent that in DT
163 * for the moment, just use a fake OCP bus entry to represent
164 * the whole bus hierarchy.
167 compatible = "simple-bus";
168 #address-cells = <1>;
171 ti,hwmods = "l3_main";
173 l4_wkup: interconnect@44c00000 {
174 wkup_m3: wkup_m3@100000 {
175 compatible = "ti,am3352-wkup-m3";
176 reg = <0x100000 0x4000>,
178 reg-names = "umem", "dmem";
179 ti,hwmods = "wkup_m3";
180 ti,pm-firmware = "/*(DEBLOBBED)*/";
183 l4_per: interconnect@48000000 {
185 l4_fw: interconnect@47c00000 {
187 l4_fast: interconnect@4a000000 {
189 l4_mpuss: interconnect@4b140000 {
192 intc: interrupt-controller@48200000 {
193 compatible = "ti,am33xx-intc";
194 interrupt-controller;
195 #interrupt-cells = <1>;
196 reg = <0x48200000 0x1000>;
199 edma: edma@49000000 {
200 compatible = "ti,edma3-tpcc";
202 reg = <0x49000000 0x10000>;
203 reg-names = "edma3_cc";
204 interrupts = <12 13 14>;
205 interrupt-names = "edma3_ccint", "edma3_mperr",
210 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
213 ti,edma-memcpy-channels = <20 21>;
216 edma_tptc0: tptc@49800000 {
217 compatible = "ti,edma3-tptc";
219 reg = <0x49800000 0x100000>;
221 interrupt-names = "edma3_tcerrint";
224 edma_tptc1: tptc@49900000 {
225 compatible = "ti,edma3-tptc";
227 reg = <0x49900000 0x100000>;
229 interrupt-names = "edma3_tcerrint";
232 edma_tptc2: tptc@49a00000 {
233 compatible = "ti,edma3-tptc";
235 reg = <0x49a00000 0x100000>;
237 interrupt-names = "edma3_tcerrint";
240 target-module@47810000 {
241 compatible = "ti,sysc-omap2", "ti,sysc";
243 reg = <0x478102fc 0x4>,
246 reg-names = "rev", "sysc", "syss";
247 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
248 SYSC_OMAP2_ENAWAKEUP |
249 SYSC_OMAP2_SOFTRESET |
250 SYSC_OMAP2_AUTOIDLE)>;
251 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
255 clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
257 #address-cells = <1>;
259 ranges = <0x0 0x47810000 0x1000>;
262 compatible = "ti,omap4-hsmmc";
263 ti,needs-special-reset;
270 compatible = "ti,am33xx-usb";
271 reg = <0x47400000 0x1000>;
273 #address-cells = <1>;
275 ti,hwmods = "usb_otg_hs";
278 usb_ctrl_mod: control@44e10620 {
279 compatible = "ti,am335x-usb-ctrl-module";
280 reg = <0x44e10620 0x10
282 reg-names = "phy_ctrl", "wakeup";
286 usb0_phy: usb-phy@47401300 {
287 compatible = "ti,am335x-usb-phy";
288 reg = <0x47401300 0x100>;
291 ti,ctrl_mod = <&usb_ctrl_mod>;
296 compatible = "ti,musb-am33xx";
298 reg = <0x47401400 0x400
300 reg-names = "mc", "control";
303 interrupt-names = "mc";
305 mentor,multipoint = <1>;
306 mentor,num-eps = <16>;
307 mentor,ram-bits = <12>;
308 mentor,power = <500>;
311 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
312 &cppi41dma 2 0 &cppi41dma 3 0
313 &cppi41dma 4 0 &cppi41dma 5 0
314 &cppi41dma 6 0 &cppi41dma 7 0
315 &cppi41dma 8 0 &cppi41dma 9 0
316 &cppi41dma 10 0 &cppi41dma 11 0
317 &cppi41dma 12 0 &cppi41dma 13 0
318 &cppi41dma 14 0 &cppi41dma 0 1
319 &cppi41dma 1 1 &cppi41dma 2 1
320 &cppi41dma 3 1 &cppi41dma 4 1
321 &cppi41dma 5 1 &cppi41dma 6 1
322 &cppi41dma 7 1 &cppi41dma 8 1
323 &cppi41dma 9 1 &cppi41dma 10 1
324 &cppi41dma 11 1 &cppi41dma 12 1
325 &cppi41dma 13 1 &cppi41dma 14 1>;
327 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
328 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
330 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
331 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
335 usb1_phy: usb-phy@47401b00 {
336 compatible = "ti,am335x-usb-phy";
337 reg = <0x47401b00 0x100>;
340 ti,ctrl_mod = <&usb_ctrl_mod>;
345 compatible = "ti,musb-am33xx";
347 reg = <0x47401c00 0x400
349 reg-names = "mc", "control";
351 interrupt-names = "mc";
353 mentor,multipoint = <1>;
354 mentor,num-eps = <16>;
355 mentor,ram-bits = <12>;
356 mentor,power = <500>;
359 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
360 &cppi41dma 17 0 &cppi41dma 18 0
361 &cppi41dma 19 0 &cppi41dma 20 0
362 &cppi41dma 21 0 &cppi41dma 22 0
363 &cppi41dma 23 0 &cppi41dma 24 0
364 &cppi41dma 25 0 &cppi41dma 26 0
365 &cppi41dma 27 0 &cppi41dma 28 0
366 &cppi41dma 29 0 &cppi41dma 15 1
367 &cppi41dma 16 1 &cppi41dma 17 1
368 &cppi41dma 18 1 &cppi41dma 19 1
369 &cppi41dma 20 1 &cppi41dma 21 1
370 &cppi41dma 22 1 &cppi41dma 23 1
371 &cppi41dma 24 1 &cppi41dma 25 1
372 &cppi41dma 26 1 &cppi41dma 27 1
373 &cppi41dma 28 1 &cppi41dma 29 1>;
375 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
376 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
378 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
379 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
383 cppi41dma: dma-controller@47402000 {
384 compatible = "ti,am3359-cppi41";
385 reg = <0x47400000 0x1000
389 reg-names = "glue", "controller", "scheduler", "queuemgr";
391 interrupt-names = "glue";
393 #dma-channels = <30>;
394 #dma-requests = <256>;
399 ocmcram: ocmcram@40300000 {
400 compatible = "mmio-sram";
401 reg = <0x40300000 0x10000>; /* 64k */
402 ranges = <0x0 0x40300000 0x10000>;
403 #address-cells = <1>;
406 pm_sram_code: pm-sram-code@0 {
407 compatible = "ti,sram";
412 pm_sram_data: pm-sram-data@1000 {
413 compatible = "ti,sram";
414 reg = <0x1000 0x1000>;
419 emif: emif@4c000000 {
420 compatible = "ti,emif-am3352";
421 reg = <0x4c000000 0x1000000>;
424 sram = <&pm_sram_code
429 gpmc: gpmc@50000000 {
430 compatible = "ti,am3352-gpmc";
433 reg = <0x50000000 0x2000>;
438 gpmc,num-waitpins = <2>;
439 #address-cells = <2>;
441 interrupt-controller;
442 #interrupt-cells = <2>;
448 sham: sham@53100000 {
449 compatible = "ti,omap4-sham";
451 reg = <0x53100000 0x200>;
458 compatible = "ti,omap4-aes";
460 reg = <0x53500000 0xa0>;
464 dma-names = "tx", "rx";
469 #include "am33xx-l4.dtsi"
470 #include "am33xx-clocks.dtsi"