arch/arm/boot/dts/am335x-wega.dtsi

   1 /*
   2  * Copyright (C) 2015 Phytec Messtechnik GmbH
   3  * Author: Teresa Remmet <t.remmet@phytec.de>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 / {
  11         model = "Phytec AM335x phyBOARD-WEGA";
  12         compatible = "phytec,am335x-wega", "phytec,am335x-phycore-som", "ti,am33xx";
  13
  14         sound: sound_iface {
  15                 compatible = "ti,da830-evm-audio";
  16         };
  17
  18         regulators {
  19                 compatible = "simple-bus";
  20
  21                 vcc3v3: fixedregulator1 {
  22                         compatible = "regulator-fixed";
  23                         regulator-name = "vcc3v3";
  24                         regulator-min-microvolt = <3300000>;
  25                         regulator-max-microvolt = <3300000>;
  26                         regulator-boot-on;
  27                 };
  28         };
  29 };
  30
  31 /* Audio */
  32 &am33xx_pinmux {
  33         mcasp0_pins: pinmux_mcasp0 {
  34                 pinctrl-single,pins = <
  35                         AM33XX_IOPAD(0x9AC, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_ahclkx.mcasp0_ahclkx */
  36                         AM33XX_IOPAD(0x990, PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_aclkx.mcasp0_aclkx */
  37                         AM33XX_IOPAD(0x994, PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_fsx.mcasp0_fsx */
  38                         AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE0)  /* mcasp0_axr0.mcasp0_axr0 */
  39                         AM33XX_IOPAD(0x9A8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp0_axr1.mcasp0_axr1 */
  40                 >;
  41         };
  42 };
  43
  44 &i2c0 {
  45         tlv320aic3007: tlv320aic3007@18 {
  46                 compatible = "ti,tlv320aic3007";
  47                 reg = <0x18>;
  48                 AVDD-supply = <&vcc3v3>;
  49                 IOVDD-supply = <&vcc3v3>;
  50                 DRVDD-supply = <&vcc3v3>;
  51                 DVDD-supply = <&vdig1_reg>;
  52                 status = "okay";
  53         };
  54 };
  55
  56 &mcasp0 {
  57         pinctrl-names = "default";
  58         pinctrl-0 = <&mcasp0_pins>;
  59         op-mode = <0>; /* DAVINCI_MCASP_IIS_MODE */
  60         tdm-slots = <2>;
  61         serial-dir = <
  62                 2 1 0 0 /* # 0: INACTIVE, 1: TX, 2: RX */
  63         >;
  64         tx-num-evt = <16>;
  65         rt-num-evt = <16>;
  66         status = "okay";
  67 };
  68
  69 &sound {
  70         ti,model = "AM335x-Wega";
  71         ti,audio-codec = <&tlv320aic3007>;
  72         ti,mcasp-controller = <&mcasp0>;
  73         ti,audio-routing =
  74                 "Line Out",             "LLOUT",
  75                 "Line Out",             "RLOUT",
  76                 "LINE1L",               "Line In",
  77                 "LINE1R",               "Line In";
  78         clocks = <&mcasp0_fck>;
  79         clock-names = "mclk";
  80         status = "okay";
  81 };
  82
  83 /* CAN Busses */
  84 &am33xx_pinmux {
  85         dcan1_pins: pinmux_dcan1 {
  86                 pinctrl-single,pins = <
  87                         AM33XX_IOPAD(0x968, PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
  88                         AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
  89                 >;
  90         };
  91 };
  92
  93 &dcan1 {
  94         pinctrl-names = "default";
  95         pinctrl-0 = <&dcan1_pins>;
  96         status = "okay";
  97 };
  98
  99 /* Ethernet */
 100 &am33xx_pinmux {
 101         ethernet1_pins: pinmux_ethernet1 {
 102                 pinctrl-single,pins = <
 103                         AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1)             /* gpmc_a0.mii2_txen */
 104                         AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a1.mii2_rxdv */
 105                         AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1)             /* gpmc_a2.mii2_txd3 */
 106                         AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1)             /* gpmc_a3.mii2_txd2 */
 107                         AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1)             /* gpmc_a4.mii2_txd1 */
 108                         AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1)             /* gpmc_a5.mii2_txd0 */
 109                         AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a6.mii2_txclk */
 110                         AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a7.mii2_rxclk */
 111                         AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a8.mii2_rxd3 */
 112                         AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a9.mii2_rxd2 */
 113                         AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a10.mii2_rxd1 */
 114                         AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_a11.mii2_rxd0 */
 115                         AM33XX_IOPAD(0x874, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_wpn.mii2_rxerr */
 116                         AM33XX_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* gpmc_ben1.mii2_col */
 117                 >;
 118         };
 119 };
 120
 121 &cpsw_emac1 {
 122         phy-handle = <&phy1>;
 123         phy-mode = "mii";
 124         dual_emac_res_vlan = <2>;
 125 };
 126
 127 &davinci_mdio {
 128         phy1: ethernet-phy@1 {
 129                 reg = <1>;
 130         };
 131 };
 132
 133 &mac {
 134         slaves = <2>;
 135         pinctrl-names = "default";
 136         pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
 137         dual_emac = <1>;
 138 };
 139
 140 /* MMC */
 141 &am33xx_pinmux {
 142         mmc1_pins: pinmux_mmc1 {
 143                 pinctrl-single,pins = <
 144                         AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat3.mmc0_dat3 */
 145                         AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat2.mmc0_dat2 */
 146                         AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat1.mmc0_dat1 */
 147                         AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat0.mmc0_dat0 */
 148                         AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_clk.mmc0_clk */
 149                         AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_cmd.mmc0_cmd */
 150                         AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE7)       /* spi0_cs1.mmc0_sdcd */
 151                 >;
 152         };
 153 };
 154
 155 &mmc1 {
 156         vmmc-supply = <&vcc3v3>;
 157         bus-width = <4>;
 158         pinctrl-names = "default";
 159         pinctrl-0 = <&mmc1_pins>;
 160         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 161         status = "okay";
 162 };
 163
 164 /* Power */
 165 &vdig1_reg {
 166         regulator-boot-on;
 167         regulator-always-on;
 168 };
 169
 170 /* UARTs */
 171 &am33xx_pinmux {
 172         uart0_pins: pinmux_uart0 {
 173                 pinctrl-single,pins = <
 174                         AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)    /* uart0_rxd.uart0_rxd */
 175                         AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
 176                 >;
 177         };
 178
 179         uart1_pins: pinmux_uart1_pins {
 180                 pinctrl-single,pins = <
 181                         AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
 182                         AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
 183                         AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0)              /* uart1_ctsn.uart1_ctsn */
 184                         AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_rtsn.uart1_rtsn */
 185                 >;
 186         };
 187 };
 188
 189 &uart0 {
 190         pinctrl-names = "default";
 191         pinctrl-0 = <&uart0_pins>;
 192         status = "okay";
 193 };
 194
 195 &uart1 {
 196         pinctrl-names = "default";
 197         pinctrl-0 = <&uart1_pins>;
 198         status = "okay";
 199 };
 200
 201 /* USB */
 202 &cppi41dma {
 203         status = "okay";
 204 };
 205
 206 &usb_ctrl_mod {
 207         status = "okay";
 208 };
 209
 210 &usb {
 211         status = "okay";
 212 };
 213
 214 &usb0 {
 215         status = "okay";
 216 };
 217
 218 &usb0_phy {
 219         status = "okay";
 220 };
 221
 222 &usb1 {
 223         dr_mode = "host";
 224         status = "okay";
 225 };
 226
 227 &usb1_phy {
 228         status = "okay";
 229 };