arch/arm/boot/dts/am335x-pdu001.dts

   1 /*
   2  * pdu001.dts
   3  *
   4  * EETS GmbH PDU001 board device tree file
   5  *
   6  * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
   7  *
   8  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
   9  *
  10  * SPDX-License-Identifier:  GPL-2.0+
  11  */
  12
  13 /dts-v1/;
  14
  15 #include "am33xx.dtsi"
  16 #include <dt-bindings/interrupt-controller/irq.h>
  17 #include <dt-bindings/leds/leds-pca9532.h>
  18
  19 / {
  20         model = "EETS,PDU001";
  21         compatible = "ti,am33xx";
  22
  23         chosen {
  24                 stdout-path = &uart3;
  25         };
  26
  27         cpus {
  28                 cpu@0 {
  29                         cpu0-supply = <&vdd1_reg>;
  30                 };
  31         };
  32
  33         memory {
  34                 device_type = "memory";
  35                 reg = <0x80000000 0x10000000>; /* 256 MB */
  36         };
  37
  38         vbat: fixedregulator@0 {
  39                 compatible = "regulator-fixed";
  40                 regulator-name = "vbat";
  41                 regulator-min-microvolt = <3600000>;
  42                 regulator-max-microvolt = <3600000>;
  43                 regulator-boot-on;
  44         };
  45
  46         lis3_reg: fixedregulator@1 {
  47                 compatible = "regulator-fixed";
  48                 regulator-name = "lis3_reg";
  49                 regulator-boot-on;
  50         };
  51
  52         panel {
  53                 compatible = "ti,tilcdc,panel";
  54                 status = "okay";
  55                 pinctrl-names = "default";
  56                 pinctrl-0 = <&lcd_pins_s0>;
  57                 panel-info {
  58                         ac-bias           = <255>;
  59                         ac-bias-intrpt    = <0>;
  60                         dma-burst-sz      = <16>;
  61                         bpp               = <16>;
  62                         fdd               = <0x80>;
  63                         sync-edge         = <0>;
  64                         sync-ctrl         = <1>;
  65                         raster-order      = <0>;
  66                         fifo-th           = <0>;
  67                 };
  68
  69                 display-timings {
  70                         240x320p16 {
  71                                 clock-frequency = <6500000>;
  72                                 hactive = <240>;
  73                                 vactive = <320>;
  74                                 hfront-porch = <6>;
  75                                 hback-porch = <6>;
  76                                 hsync-len = <1>;
  77                                 vback-porch = <6>;
  78                                 vfront-porch = <6>;
  79                                 vsync-len = <1>;
  80                                 hsync-active = <0>;
  81                                 vsync-active = <0>;
  82                                 pixelclk-active = <1>;
  83                                 de-active = <0>;
  84                         };
  85                 };
  86         };
  87 };
  88
  89 &am33xx_pinmux {
  90         pinctrl-names = "default";
  91         pinctrl-0 = <&clkout2_pin>;
  92
  93         i2c0_pins: pinmux_i2c0_pins {
  94                 pinctrl-single,pins = <
  95                         AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
  96                         AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
  97                 >;
  98         };
  99
 100         i2c1_pins: pinmux_i2c1_pins {
 101                 pinctrl-single,pins = <
 102                         AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_d1.i2c1_sda */
 103                         AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_cs0.i2c1_scl */
 104                 >;
 105         };
 106
 107         i2c2_pins: pinmux_i2c2_pins {
 108                 pinctrl-single,pins = <
 109                         AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_clk.i2c2_sda */
 110                         AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_d0.i2c2_scl */
 111                 >;
 112         };
 113
 114         spi1_pins: pinmux_spi1_pins {
 115                 pinctrl-single,pins = <
 116                         AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE3)             /* mcasp0_aclkx.spi1_sclk */
 117                         AM33XX_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3)             /* mcasp0_fsx.spi1_d0 */
 118                         AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE3)     /* mcasp0_axr0.spi1_d1 */
 119                         AM33XX_IOPAD(0x99C, PIN_OUTPUT | MUX_MODE3)             /* mcasp0_ahclkr.spi1_cs0 */
 120                 >;
 121         };
 122
 123         uart0_pins: pinmux_uart0_pins {
 124                 pinctrl-single,pins = <
 125                         AM33XX_IOPAD(0x96C, PIN_OUTPUT | MUX_MODE7)             /* uart0_rtsn.gpio1_9 */
 126                         AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
 127                         AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
 128                 >;
 129         };
 130
 131         uart1_pins: pinmux_uart1_pins {
 132                 pinctrl-single,pins = <
 133                         AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
 134                         AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
 135                 >;
 136         };
 137
 138         uart3_pins: pinmux_uart3_pins {
 139                 pinctrl-single,pins = <
 140                         AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE1)       /* spi0_cs1.uart3_rxd */
 141                         AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* ecap0_in_pwm0_out.uart3_txd */
 142                 >;
 143         };
 144
 145         clkout2_pin: pinmux_clkout2_pin {
 146                 pinctrl-single,pins = <
 147                         AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr1.clkout2 */
 148                 >;
 149         };
 150
 151         cpsw_default: cpsw_default {
 152                 pinctrl-single,pins = <
 153                         /* Port 1 (emac0) */
 154                         AM33XX_IOPAD(0x908, PIN_INPUT | MUX_MODE0)              /* mii1_col.mii1_col */
 155                         AM33XX_IOPAD(0x90C, PIN_INPUT | MUX_MODE0)              /* mii1_crs.mii1_crs */
 156                         AM33XX_IOPAD(0x910, PIN_INPUT | MUX_MODE0)              /* mii1_rxer.mii1_rxer */
 157                         AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE0)             /* mii1_txen.mii1_txen */
 158                         AM33XX_IOPAD(0x918, PIN_INPUT | MUX_MODE0)              /* mii1_rxdv.mii1_rxdv */
 159                         AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE0)             /* mii1_txd3.mii1_txd3 */
 160                         AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE0)             /* mii1_txd2.mii1_txd2 */
 161                         AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE0)             /* mii1_txd1.mii1_txd1 */
 162                         AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE0)             /* mii1_txd0.mii1_txd0 */
 163                         AM33XX_IOPAD(0x92c, PIN_INPUT | MUX_MODE0)              /* mii1_txclk.mii1_txclk */
 164                         AM33XX_IOPAD(0x930, PIN_INPUT | MUX_MODE0)              /* mii1_rxclk.mii1_rxclk */
 165                         AM33XX_IOPAD(0x934, PIN_INPUT | MUX_MODE0)              /* mii1_rxd3.mii1_rxd3 */
 166                         AM33XX_IOPAD(0x938, PIN_INPUT | MUX_MODE0)              /* mii1_rxd2.mii1_rxd2 */
 167                         AM33XX_IOPAD(0x93c, PIN_INPUT | MUX_MODE0)              /* mii1_rxd1.mii1_rxd1 */
 168                         AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE0)              /* mii1_rxd0.mii1_rxd0 */
 169
 170                         /* Port 2 (emac1) */
 171                         AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1)             /* mii2_txen.gpmc_a0 */
 172                         AM33XX_IOPAD(0x844, PIN_INPUT | MUX_MODE1)              /* mii2_rxdv.gpmc_a1 */
 173                         AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1)             /* mii2_txd3.gpmc_a2 */
 174                         AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1)             /* mii2_txd2.gpmc_a3 */
 175                         AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1)             /* mii2_txd1.gpmc_a4 */
 176                         AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1)             /* mii2_txd0.gpmc_a5 */
 177                         AM33XX_IOPAD(0x858, PIN_INPUT | MUX_MODE1)              /* mii2_txclk.gpmc_a6 */
 178                         AM33XX_IOPAD(0x85c, PIN_INPUT | MUX_MODE1)              /* mii2_rxclk.gpmc_a7 */
 179                         AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE1)              /* mii2_rxd3.gpmc_a8 */
 180                         AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE1)              /* mii2_rxd2.gpmc_a9 */
 181                         AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE1)              /* mii2_rxd1.gpmc_a10 */
 182                         AM33XX_IOPAD(0x86C, PIN_INPUT | MUX_MODE1)              /* mii2_rxd0.gpmc_a11 */
 183                         AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE1)              /* mii2_crs.gpmc_wait0 */
 184                         AM33XX_IOPAD(0x874, PIN_INPUT | MUX_MODE1)              /* mii2_rxer.gpmc_wpn */
 185                         AM33XX_IOPAD(0x878, PIN_INPUT | MUX_MODE1)              /* mii2_col.gpmc_ben1 */
 186                 >;
 187         };
 188
 189         davinci_mdio_default: davinci_mdio_default {
 190                 pinctrl-single,pins = <
 191                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 192                         AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 193                 >;
 194         };
 195
 196         mmc1_pins: pinmux_mmc1_pins {
 197                 /* eMMC */
 198                 pinctrl-single,pins = <
 199                         AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat3 */
 200                         AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat2 */
 201                         AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat1 */
 202                         AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_dat0 */
 203                         AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_clk */
 204                         AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)       /* mmc0_cmd */
 205                 >;
 206         };
 207
 208         mmc2_pins: pinmux_mmc2_pins {
 209                 /* SD cardcage */
 210                 pinctrl-single,pins = <
 211                         AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad3.mmc1_dat3 */
 212                         AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad2.mmc1_dat2 */
 213                         AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad1.mmc1_dat1 */
 214                         AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1)       /* gpmc_ad0.mmc1_dat0 */
 215                         AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2)       /* gpmc_csn1.mmc1_clk */
 216                         AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2)       /* gpmc_csn2.mmc1_cmd */
 217                         /* card change signal for frontpanel SD cardcage */
 218                         AM33XX_IOPAD(0x890, PIN_INPUT | MUX_MODE7)              /* gpmc_advn_ale.gpio2_2 */
 219                 >;
 220         };
 221
 222         lcd_pins_s0: lcd_pins_s0 {
 223                 pinctrl-single,pins = <
 224                         AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data0.lcd_data0 */
 225                         AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data1.lcd_data1 */
 226                         AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data2.lcd_data2 */
 227                         AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)             /* lcd_data3.lcd_data3 */
 228                         AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data4.lcd_data4 */
 229                         AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data5.lcd_data5 */
 230                         AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data6.lcd_data6 */
 231                         AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data7.lcd_data7 */
 232                         AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data8.lcd_data8 */
 233                         AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data9.lcd_data9 */
 234                         AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data10.lcd_data10 */
 235                         AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data11.lcd_data11 */
 236                         AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data12.lcd_data12 */
 237                         AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data13.lcd_data13 */
 238                         AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data14.lcd_data14 */
 239                         AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data15.lcd_data15 */
 240                         AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)             /* lcd_vsync.lcd_vsync */
 241                         AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)             /* lcd_hsync.lcd_hsync */
 242                         AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)             /* lcd_pclk.lcd_pclk */
 243                         AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)             /* lcd_ac_bias_en.lcd_ac_bias_en */
 244                 >;
 245         };
 246
 247         dcan0_pins: pinmux_dcan0_pins {
 248                 pinctrl-single,pins = <
 249                         AM33XX_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2)             /* uart1_ctsn.d_can0_tx */
 250                         AM33XX_IOPAD(0x97c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* uart1_rtsn.d_can0_rx */
 251                 >;
 252         };
 253 };
 254
 255 &uart0 {
 256         pinctrl-names = "default";
 257         pinctrl-0 = <&uart0_pins>;
 258
 259         rts-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
 260         rs485-rts-active-high;
 261         rs485-rts-delay = <0 0>;
 262         linux,rs485-enabled-at-boot-time;
 263
 264         status = "okay";
 265 };
 266
 267 &uart1 {
 268         pinctrl-names = "default";
 269         pinctrl-0 = <&uart1_pins>;
 270
 271         status = "okay";
 272 };
 273
 274 &uart3 {
 275         pinctrl-names = "default";
 276         pinctrl-0 = <&uart3_pins>;
 277
 278         status = "okay";
 279 };
 280
 281 &i2c0 {
 282         pinctrl-names = "default";
 283         pinctrl-0 = <&i2c0_pins>;
 284
 285         status = "okay";
 286         clock-frequency = <400000>;
 287
 288         tps: tps@2d {
 289                 reg = <0x2d>;
 290         };
 291
 292         m2_eeprom: m2_eeprom@50 {
 293                 compatible = "atmel,24c256";
 294                 reg = <0x50>;
 295                 status = "okay";
 296         };
 297 };
 298
 299 &i2c1 {
 300         pinctrl-names = "default";
 301         pinctrl-0 = <&i2c1_pins>;
 302
 303         status = "okay";
 304         clock-frequency = <100000>;
 305
 306         board_24aa025e48: board_24aa025e48@50 {
 307                 compatible = "atmel,24c02";
 308                 reg = <0x50>;
 309         };
 310
 311         backplane_24aa025e48: backplane_24aa025e48@53 {
 312                 compatible = "atmel,24c02";
 313                 reg = <0x53>;
 314         };
 315
 316         pca9532: pca9532@60 {
 317                 compatible = "nxp,pca9532";
 318                 reg = <0x60>;
 319                 psc0 = <0x97>;
 320                 pwm0 = <0x80>;
 321                 psc1 = <0x97>;
 322                 pwm1 = <0x10>;
 323
 324                 run.red@0 {
 325                         type = <PCA9532_TYPE_LED>;
 326                 };
 327                 run.green@1 {
 328                         type = <PCA9532_TYPE_LED>;
 329                         default-state = "on";
 330                 };
 331                 s2.red@2 {
 332                         type = <PCA9532_TYPE_LED>;
 333                 };
 334                 s2.green@3 {
 335                         type = <PCA9532_TYPE_LED>;
 336                 };
 337                 s1.yellow@4 {
 338                         type = <PCA9532_TYPE_LED>;
 339                 };
 340                 s1.green@5 {
 341                         type = <PCA9532_TYPE_LED>;
 342                 };
 343         };
 344
 345         pca9530: pca9530@61 {
 346                 compatible = "nxp,pca9530";
 347                 reg = <0x61>;
 348
 349                 tft-panel@0 {
 350                         type = <PCA9532_TYPE_LED>;
 351                         linux,default-trigger = "backlight";
 352                         default-state = "on";
 353                 };
 354         };
 355
 356         mcp79400: mcp79400@6f {
 357                 compatible = "microchip,mcp7940x";
 358                 reg = <0x6f>;
 359         };
 360 };
 361
 362 &i2c2 {
 363         pinctrl-names = "default";
 364         pinctrl-0 = <&i2c2_pins>;
 365
 366         status = "okay";
 367         clock-frequency = <100000>;
 368 };
 369
 370 &spi1 {
 371         pinctrl-names = "default";
 372         pinctrl-0 = <&spi1_pins>;
 373         ti,pindir-d0-out-d1-in;
 374         status = "okay";
 375
 376         display-controller@0 {
 377                 compatible = "orisetech,otm3225a";
 378                 reg = <0>;
 379                 spi-max-frequency = <1000000>;
 380                 // SPI mode 3
 381                 spi-cpol;
 382                 spi-cpha;
 383                 status = "okay";
 384         };
 385 };
 386
 387 &usb {
 388         status = "okay";
 389 };
 390
 391 &usb_ctrl_mod {
 392         status = "okay";
 393 };
 394
 395 &usb0_phy {
 396         status = "okay";
 397 };
 398
 399 &usb1_phy {
 400         status = "okay";
 401 };
 402
 403 &usb0 {
 404         status = "okay";
 405 };
 406
 407 &usb1 {
 408         status = "okay";
 409 };
 410
 411 &cppi41dma  {
 412         status = "okay";
 413 };
 414
 415 /*
 416  * Disable soc's rtc as we have no VBAT for it. This makes the board
 417  * rtc (Microchip MCP79400) the default rtc device 'rtc0'.
 418  */
 419 &rtc {
 420         status = "disabled";
 421 };
 422
 423 &lcdc {
 424         status = "okay";
 425 };
 426
 427 &elm {
 428         status = "okay";
 429 };
 430
 431 #include "tps65910.dtsi"
 432
 433 &tps {
 434         vcc1-supply = <&vbat>;
 435         vcc2-supply = <&vbat>;
 436         vcc3-supply = <&vbat>;
 437         vcc4-supply = <&vbat>;
 438         vcc5-supply = <&vbat>;
 439         vcc6-supply = <&vbat>;
 440         vcc7-supply = <&vbat>;
 441         vccio-supply = <&vbat>;
 442
 443         regulators {
 444                 vrtc_reg: regulator@0 {
 445                         regulator-name = "ldo_vrtc";
 446                         regulator-always-on;
 447                 };
 448
 449                 vio_reg: regulator@1 {
 450                         regulator-name = "buck_vdd_ddr";
 451                         regulator-always-on;
 452                 };
 453
 454                 vdd1_reg: regulator@2 {
 455                         /* VDD_MPU voltage limits */
 456                         regulator-name = "buck_vdd_mpu";
 457                         regulator-min-microvolt = <912500>;
 458                         regulator-max-microvolt = <1312500>;
 459                         regulator-boot-on;
 460                         regulator-always-on;
 461                 };
 462
 463                 vdd2_reg: regulator@3 {
 464                         /* VDD_CORE voltage limits */
 465                         regulator-name = "buck_vdd_core";
 466                         regulator-min-microvolt = <912500>;
 467                         regulator-max-microvolt = <1150000>;
 468                         regulator-boot-on;
 469                         regulator-always-on;
 470                 };
 471
 472                 vdd3_reg: regulator@4 {
 473                         regulator-name = "boost_res";
 474                         regulator-always-on;
 475                 };
 476
 477                 vdig1_reg: regulator@5 {
 478                         regulator-name = "ldo_vdig1";
 479                         regulator-always-on;
 480                 };
 481
 482                 vdig2_reg: regulator@6 {
 483                         regulator-name = "ldo_vdig2";
 484                         regulator-always-on;
 485                 };
 486
 487                 vpll_reg: regulator@7 {
 488                         regulator-name = "ldo_vpll";
 489                         regulator-always-on;
 490                 };
 491
 492                 vdac_reg: regulator@8 {
 493                         regulator-name = "ldo_vdac";
 494                         regulator-always-on;
 495                 };
 496
 497                 vaux1_reg: regulator@9 {
 498                         regulator-name = "ldo_vaux1";
 499                         regulator-always-on;
 500                 };
 501
 502                 vaux2_reg: regulator@10 {
 503                         regulator-name = "ldo_vaux2";
 504                         regulator-always-on;
 505                 };
 506
 507                 vaux33_reg: regulator@11 {
 508                         regulator-name = "ldo_vaux33";
 509                         regulator-always-on;
 510                 };
 511
 512                 vmmc_reg: regulator@12 {
 513                         regulator-name = "ldo_vmmc";
 514                         regulator-min-microvolt = <1800000>;
 515                         regulator-max-microvolt = <3300000>;
 516                         regulator-always-on;
 517                 };
 518
 519                 vbb_reg: regulator@13 {
 520                         regulator-name = "bat_vbb";
 521                 };
 522         };
 523 };
 524
 525 &mac {
 526         pinctrl-names = "default";
 527         pinctrl-0 = <&cpsw_default>;
 528         dual_emac;                      /* no switch, two distinct MACs */
 529         status = "okay";
 530 };
 531
 532 &davinci_mdio {
 533         pinctrl-names = "default";
 534         pinctrl-0 = <&davinci_mdio_default>;
 535         status = "okay";
 536 };
 537
 538 &cpsw_emac0 {
 539         phy_id = <&davinci_mdio>, <0>;
 540         phy-mode = "mii";
 541         dual_emac_res_vlan = <1>;
 542 };
 543
 544 &cpsw_emac1 {
 545         phy_id = <&davinci_mdio>, <1>;
 546         phy-mode = "mii";
 547         dual_emac_res_vlan = <2>;
 548 };
 549
 550 &tscadc {
 551         status = "okay";
 552         tsc {
 553                 ti,wires = <4>;
 554                 ti,x-plate-resistance = <200>;
 555                 ti,coordinate-readouts = <5>;
 556                 ti,wire-config = <0x01 0x10 0x22 0x33>;
 557                 ti,charge-delay = <0x400>;
 558         };
 559
 560         adc {
 561                 ti,adc-channels = <4 5 6 7>;
 562         };
 563 };
 564
 565 &mmc1 {
 566         status = "okay";
 567         vmmc-supply = <&vmmc_reg>;
 568         bus-width = <4>;
 569         pinctrl-names = "default";
 570         pinctrl-0 = <&mmc1_pins>;
 571         non-removable;
 572 };
 573
 574 &mmc2 {
 575         status = "okay";
 576         vmmc-supply = <&vmmc_reg>;
 577         bus-width = <4>;
 578         pinctrl-names = "default";
 579         pinctrl-0 = <&mmc2_pins>;
 580         cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
 581 };
 582
 583 &sham {
 584         status = "okay";
 585 };
 586
 587 &aes {
 588         status = "okay";
 589 };
 590
 591 &dcan0 {
 592         status = "okay";
 593         pinctrl-names = "default";
 594         pinctrl-0 = <&dcan0_pins>;
 595 };