1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 * Author: Robert Nelson <robertcnelson@gmail.com>
11 cpu0-supply = <&dcdc2_reg>;
16 device_type = "memory";
17 reg = <0x80000000 0x20000000>; /* 512 MB */
24 * The EFUSE_SMA register is not programmed for any of the AM335x wafers
25 * we get and we are not programming them during our production test.
26 * Therefore, from a DEVICE_ID revision point of view, the silicon looks
27 * like it is Revision 2.1. However, from an EFUSE_SMA point of view for
28 * the HW OPP table, the silicon looks like it is Revision 1.0 (ie the
29 * EFUSE_SMA register reads as all zeros).
32 opp-supported-hw = <0x06 0x0100>;
37 i2c0_pins: pinmux-i2c0-pins {
38 pinctrl-single,pins = <
39 AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* (C17) I2C0_SDA.I2C0_SDA */
40 AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* (C16) I2C0_SCL.I2C0_SCL */
46 pinctrl-names = "default";
47 pinctrl-0 = <&i2c0_pins>;
50 clock-frequency = <400000>;
57 /include/ "tps65217.dtsi"
60 interrupts = <7>; /* NMI */
61 interrupt-parent = <&intc>;
63 ti,pmic-shutdown-controller;
71 dcdc1_reg: regulator@0 {
72 regulator-name = "vdds_dpr";
76 dcdc2_reg: regulator@1 {
77 /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
78 regulator-name = "vdd_mpu";
79 regulator-min-microvolt = <925000>;
80 regulator-max-microvolt = <1351500>;
85 dcdc3_reg: regulator@2 {
86 /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
87 regulator-name = "vdd_core";
88 regulator-min-microvolt = <925000>;
89 regulator-max-microvolt = <1150000>;
94 ldo1_reg: regulator@3 {
95 regulator-name = "vio,vrtc,vdds";
99 ldo2_reg: regulator@4 {
100 regulator-name = "vdd_3v3aux";
104 ldo3_reg: regulator@5 {
105 regulator-name = "vdd_1v8";
106 regulator-min-microvolt = <1800000>;
107 regulator-max-microvolt = <1800000>;
111 ldo4_reg: regulator@6 {
112 regulator-name = "vdd_3v3a";