arch/arm/boot/dts/am335x-evm.dts

   1 /*
   2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8 /dts-v1/;
   9
  10 #include "am33xx.dtsi"
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12
  13 / {
  14         model = "TI AM335x EVM";
  15         compatible = "ti,am335x-evm", "ti,am33xx";
  16
  17         cpus {
  18                 cpu@0 {
  19                         cpu0-supply = <&vdd1_reg>;
  20                 };
  21         };
  22
  23         memory@80000000 {
  24                 device_type = "memory";
  25                 reg = <0x80000000 0x10000000>; /* 256 MB */
  26         };
  27
  28         chosen {
  29                 stdout-path = &uart0;
  30         };
  31
  32         vbat: fixedregulator0 {
  33                 compatible = "regulator-fixed";
  34                 regulator-name = "vbat";
  35                 regulator-min-microvolt = <5000000>;
  36                 regulator-max-microvolt = <5000000>;
  37                 regulator-boot-on;
  38         };
  39
  40         lis3_reg: fixedregulator1 {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "lis3_reg";
  43                 regulator-boot-on;
  44         };
  45
  46         wlan_en_reg: fixedregulator2 {
  47                 compatible = "regulator-fixed";
  48                 regulator-name = "wlan-en-regulator";
  49                 regulator-min-microvolt = <1800000>;
  50                 regulator-max-microvolt = <1800000>;
  51
  52                 /* WLAN_EN GPIO for this board - Bank1, pin16 */
  53                 gpio = <&gpio1 16 0>;
  54
  55                 /* WLAN card specific delay */
  56                 startup-delay-us = <70000>;
  57                 enable-active-high;
  58         };
  59
  60         /* TPS79501 */
  61         v1_8d_reg: fixedregulator-v1_8d {
  62                 compatible = "regulator-fixed";
  63                 regulator-name = "v1_8d";
  64                 vin-supply = <&vbat>;
  65                 regulator-min-microvolt = <1800000>;
  66                 regulator-max-microvolt = <1800000>;
  67         };
  68
  69         /* TPS79501 */
  70         v3_3d_reg: fixedregulator-v3_3d {
  71                 compatible = "regulator-fixed";
  72                 regulator-name = "v3_3d";
  73                 vin-supply = <&vbat>;
  74                 regulator-min-microvolt = <3300000>;
  75                 regulator-max-microvolt = <3300000>;
  76         };
  77
  78         matrix_keypad: matrix_keypad0 {
  79                 compatible = "gpio-matrix-keypad";
  80                 debounce-delay-ms = <5>;
  81                 col-scan-delay-us = <2>;
  82
  83                 row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH         /* Bank1, pin25 */
  84                              &gpio1 26 GPIO_ACTIVE_HIGH         /* Bank1, pin26 */
  85                              &gpio1 27 GPIO_ACTIVE_HIGH>;       /* Bank1, pin27 */
  86
  87                 col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH         /* Bank1, pin21 */
  88                              &gpio1 22 GPIO_ACTIVE_HIGH>;       /* Bank1, pin22 */
  89
  90                 linux,keymap = <0x0000008b      /* MENU */
  91                                 0x0100009e      /* BACK */
  92                                 0x02000069      /* LEFT */
  93                                 0x0001006a      /* RIGHT */
  94                                 0x0101001c      /* ENTER */
  95                                 0x0201006c>;    /* DOWN */
  96         };
  97
  98         gpio_keys: volume_keys0 {
  99                 compatible = "gpio-keys";
 100                 #address-cells = <1>;
 101                 #size-cells = <0>;
 102                 autorepeat;
 103
 104                 switch9 {
 105                         label = "volume-up";
 106                         linux,code = <115>;
 107                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
 108                         wakeup-source;
 109                 };
 110
 111                 switch10 {
 112                         label = "volume-down";
 113                         linux,code = <114>;
 114                         gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
 115                         wakeup-source;
 116                 };
 117         };
 118
 119         backlight {
 120                 compatible = "pwm-backlight";
 121                 pwms = <&ecap0 0 50000 0>;
 122                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
 123                 default-brightness-level = <8>;
 124         };
 125
 126         panel {
 127                 compatible = "ti,tilcdc,panel";
 128                 status = "okay";
 129                 pinctrl-names = "default";
 130                 pinctrl-0 = <&lcd_pins_s0>;
 131                 panel-info {
 132                         ac-bias           = <255>;
 133                         ac-bias-intrpt    = <0>;
 134                         dma-burst-sz      = <16>;
 135                         bpp               = <32>;
 136                         fdd               = <0x80>;
 137                         sync-edge         = <0>;
 138                         sync-ctrl         = <1>;
 139                         raster-order      = <0>;
 140                         fifo-th           = <0>;
 141                 };
 142
 143                 display-timings {
 144                         800x480p62 {
 145                                 clock-frequency = <30000000>;
 146                                 hactive = <800>;
 147                                 vactive = <480>;
 148                                 hfront-porch = <39>;
 149                                 hback-porch = <39>;
 150                                 hsync-len = <47>;
 151                                 vback-porch = <29>;
 152                                 vfront-porch = <13>;
 153                                 vsync-len = <2>;
 154                                 hsync-active = <1>;
 155                                 vsync-active = <1>;
 156                         };
 157                 };
 158         };
 159
 160         sound {
 161                 compatible = "simple-audio-card";
 162                 simple-audio-card,name = "AM335x-EVM";
 163                 simple-audio-card,widgets =
 164                         "Headphone", "Headphone Jack",
 165                         "Line", "Line In";
 166                 simple-audio-card,routing =
 167                         "Headphone Jack",       "HPLOUT",
 168                         "Headphone Jack",       "HPROUT",
 169                         "LINE1L",               "Line In",
 170                         "LINE1R",               "Line In";
 171                 simple-audio-card,format = "dsp_b";
 172                 simple-audio-card,bitclock-master = <&sound_master>;
 173                 simple-audio-card,frame-master = <&sound_master>;
 174                 simple-audio-card,bitclock-inversion;
 175
 176                 simple-audio-card,cpu {
 177                         sound-dai = <&mcasp1>;
 178                 };
 179
 180                 sound_master: simple-audio-card,codec {
 181                         sound-dai = <&tlv320aic3106>;
 182                         system-clock-frequency = <12000000>;
 183                 };
 184         };
 185 };
 186
 187 &am33xx_pinmux {
 188         pinctrl-names = "default";
 189         pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
 190
 191         matrix_keypad_s0: matrix_keypad_s0 {
 192                 pinctrl-single,pins = <
 193                         AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a5.gpio1_21 */
 194                         AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a6.gpio1_22 */
 195                         AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a9.gpio1_25 */
 196                         AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a10.gpio1_26 */
 197                         AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a11.gpio1_27 */
 198                 >;
 199         };
 200
 201         volume_keys_s0: volume_keys_s0 {
 202                 pinctrl-single,pins = <
 203                         AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* spi0_sclk.gpio0_2 */
 204                         AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* spi0_d0.gpio0_3 */
 205                 >;
 206         };
 207
 208         i2c0_pins: pinmux_i2c0_pins {
 209                 pinctrl-single,pins = <
 210                         AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
 211                         AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
 212                 >;
 213         };
 214
 215         i2c1_pins: pinmux_i2c1_pins {
 216                 pinctrl-single,pins = <
 217                         AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_d1.i2c1_sda */
 218                         AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2)       /* spi0_cs0.i2c1_scl */
 219                 >;
 220         };
 221
 222         uart0_pins: pinmux_uart0_pins {
 223                 pinctrl-single,pins = <
 224                         AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
 225                         AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
 226                 >;
 227         };
 228
 229         uart1_pins: pinmux_uart1_pins {
 230                 pinctrl-single,pins = <
 231                         AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0)              /* uart1_ctsn.uart1_ctsn */
 232                         AM33XX_IOPAD(0x97C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_rtsn.uart1_rtsn */
 233                         AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart1_rxd.uart1_rxd */
 234                         AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart1_txd.uart1_txd */
 235                 >;
 236         };
 237
 238         clkout2_pin: pinmux_clkout2_pin {
 239                 pinctrl-single,pins = <
 240                         AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)    /* xdma_event_intr1.clkout2 */
 241                 >;
 242         };
 243
 244         nandflash_pins_s0: nandflash_pins_s0 {
 245                 pinctrl-single,pins = <
 246                         AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad0.gpmc_ad0 */
 247                         AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad1.gpmc_ad1 */
 248                         AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad2.gpmc_ad2 */
 249                         AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad3.gpmc_ad3 */
 250                         AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad4.gpmc_ad4 */
 251                         AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad5.gpmc_ad5 */
 252                         AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad6.gpmc_ad6 */
 253                         AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad7.gpmc_ad7 */
 254                         AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
 255                         AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7)       /* gpmc_wpn.gpio0_30 */
 256                         AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
 257                         AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
 258                         AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
 259                         AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
 260                         AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
 261                 >;
 262         };
 263
 264         ecap0_pins: backlight_pins {
 265                 pinctrl-single,pins = <
 266                         AM33XX_IOPAD(0x964, MUX_MODE0)  /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
 267                 >;
 268         };
 269
 270         cpsw_default: cpsw_default {
 271                 pinctrl-single,pins = <
 272                         /* Slave 1 */
 273                         AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_tctl */
 274                         AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rctl */
 275                         AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd3.rgmii1_td3 */
 276                         AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd2.rgmii1_td2 */
 277                         AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
 278                         AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
 279                         AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rgmii1_tclk */
 280                         AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rgmii1_rclk */
 281                         AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd3.rgmii1_rd3 */
 282                         AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd2.rgmii1_rd2 */
 283                         AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd1 */
 284                         AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd0 */
 285                 >;
 286         };
 287
 288         cpsw_sleep: cpsw_sleep {
 289                 pinctrl-single,pins = <
 290                         /* Slave 1 reset value */
 291                         AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 292                         AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 293                         AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 294                         AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
 295                         AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 296                         AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 297                         AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 298                         AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
 299                         AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
 300                         AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
 301                         AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 302                         AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 303                 >;
 304         };
 305
 306         davinci_mdio_default: davinci_mdio_default {
 307                 pinctrl-single,pins = <
 308                         /* MDIO */
 309                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 310                         AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 311                 >;
 312         };
 313
 314         davinci_mdio_sleep: davinci_mdio_sleep {
 315                 pinctrl-single,pins = <
 316                         /* MDIO reset value */
 317                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 318                         AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 319                 >;
 320         };
 321
 322         mmc1_pins: pinmux_mmc1_pins {
 323                 pinctrl-single,pins = <
 324                         AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 325                 >;
 326         };
 327
 328         mmc3_pins: pinmux_mmc3_pins {
 329                 pinctrl-single,pins = <
 330                         AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_a1.mmc2_dat0, INPUT_PULLUP | MODE3 */
 331                         AM33XX_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_a2.mmc2_dat1, INPUT_PULLUP | MODE3 */
 332                         AM33XX_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_a3.mmc2_dat2, INPUT_PULLUP | MODE3 */
 333                         AM33XX_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_ben1.mmc2_dat3, INPUT_PULLUP | MODE3 */
 334                         AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_csn3.mmc2_cmd, INPUT_PULLUP | MODE3 */
 335                         AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_clk.mmc2_clk, INPUT_PULLUP | MODE3 */
 336                 >;
 337         };
 338
 339         wlan_pins: pinmux_wlan_pins {
 340                 pinctrl-single,pins = <
 341                         AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a0.gpio1_16 */
 342                         AM33XX_IOPAD(0x99c, PIN_INPUT | MUX_MODE7)              /* mcasp0_ahclkr.gpio3_17 */
 343                         AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* mcasp0_ahclkx.gpio3_21 */
 344                 >;
 345         };
 346
 347         lcd_pins_s0: lcd_pins_s0 {
 348                 pinctrl-single,pins = <
 349                         AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad8.lcd_data23 */
 350                         AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad9.lcd_data22 */
 351                         AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad10.lcd_data21 */
 352                         AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad11.lcd_data20 */
 353                         AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad12.lcd_data19 */
 354                         AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad13.lcd_data18 */
 355                         AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad14.lcd_data17 */
 356                         AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)             /* gpmc_ad15.lcd_data16 */
 357                         AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data0.lcd_data0 */
 358                         AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data1.lcd_data1 */
 359                         AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data2.lcd_data2 */
 360                         AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)             /* lcd_data3.lcd_data3 */
 361                         AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data4.lcd_data4 */
 362                         AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data5.lcd_data5 */
 363                         AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data6.lcd_data6 */
 364                         AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data7.lcd_data7 */
 365                         AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data8.lcd_data8 */
 366                         AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data9.lcd_data9 */
 367                         AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data10.lcd_data10 */
 368                         AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data11.lcd_data11 */
 369                         AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)             /* lcd_data12.lcd_data12 */
 370                         AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)             /* lcd_data13.lcd_data13 */
 371                         AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)             /* lcd_data14.lcd_data14 */
 372                         AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)             /* lcd_data15.lcd_data15 */
 373                         AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)             /* lcd_vsync.lcd_vsync */
 374                         AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)             /* lcd_hsync.lcd_hsync */
 375                         AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)             /* lcd_pclk.lcd_pclk */
 376                         AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)             /* lcd_ac_bias_en.lcd_ac_bias_en */
 377                 >;
 378         };
 379
 380         mcasp1_pins: mcasp1_pins {
 381                 pinctrl-single,pins = <
 382                         AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
 383                         AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
 384                         AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
 385                         AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
 386                 >;
 387         };
 388
 389         mcasp1_pins_sleep: mcasp1_pins_sleep {
 390                 pinctrl-single,pins = <
 391                         AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 392                         AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
 393                         AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
 394                         AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
 395                 >;
 396         };
 397
 398         dcan1_pins_default: dcan1_pins_default {
 399                 pinctrl-single,pins = <
 400                         AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE2) /* uart0_ctsn.d_can1_tx */
 401                         AM33XX_IOPAD(0x96c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart0_rtsn.d_can1_rx */
 402                 >;
 403         };
 404 };
 405
 406 &uart0 {
 407         pinctrl-names = "default";
 408         pinctrl-0 = <&uart0_pins>;
 409
 410         status = "okay";
 411 };
 412
 413 &uart1 {
 414         pinctrl-names = "default";
 415         pinctrl-0 = <&uart1_pins>;
 416
 417         status = "okay";
 418 };
 419
 420 &i2c0 {
 421         pinctrl-names = "default";
 422         pinctrl-0 = <&i2c0_pins>;
 423
 424         status = "okay";
 425         clock-frequency = <400000>;
 426
 427         tps: tps@2d {
 428                 reg = <0x2d>;
 429         };
 430 };
 431
 432 &usb {
 433         status = "okay";
 434 };
 435
 436 &usb_ctrl_mod {
 437         status = "okay";
 438 };
 439
 440 &usb0_phy {
 441         status = "okay";
 442 };
 443
 444 &usb1_phy {
 445         status = "okay";
 446 };
 447
 448 &usb0 {
 449         status = "okay";
 450 };
 451
 452 &usb1 {
 453         status = "okay";
 454         dr_mode = "host";
 455 };
 456
 457 &cppi41dma  {
 458         status = "okay";
 459 };
 460
 461 &i2c1 {
 462         pinctrl-names = "default";
 463         pinctrl-0 = <&i2c1_pins>;
 464
 465         status = "okay";
 466         clock-frequency = <100000>;
 467
 468         lis331dlh: lis331dlh@18 {
 469                 compatible = "st,lis331dlh", "st,lis3lv02d";
 470                 reg = <0x18>;
 471                 Vdd-supply = <&lis3_reg>;
 472                 Vdd_IO-supply = <&lis3_reg>;
 473
 474                 st,click-single-x;
 475                 st,click-single-y;
 476                 st,click-single-z;
 477                 st,click-thresh-x = <10>;
 478                 st,click-thresh-y = <10>;
 479                 st,click-thresh-z = <10>;
 480                 st,irq1-click;
 481                 st,irq2-click;
 482                 st,wakeup-x-lo;
 483                 st,wakeup-x-hi;
 484                 st,wakeup-y-lo;
 485                 st,wakeup-y-hi;
 486                 st,wakeup-z-lo;
 487                 st,wakeup-z-hi;
 488                 st,min-limit-x = <120>;
 489                 st,min-limit-y = <120>;
 490                 st,min-limit-z = <140>;
 491                 st,max-limit-x = <550>;
 492                 st,max-limit-y = <550>;
 493                 st,max-limit-z = <750>;
 494         };
 495
 496         tsl2550: tsl2550@39 {
 497                 compatible = "taos,tsl2550";
 498                 reg = <0x39>;
 499         };
 500
 501         tmp275: tmp275@48 {
 502                 compatible = "ti,tmp275";
 503                 reg = <0x48>;
 504         };
 505
 506         tlv320aic3106: tlv320aic3106@1b {
 507                 #sound-dai-cells = <0>;
 508                 compatible = "ti,tlv320aic3106";
 509                 reg = <0x1b>;
 510                 status = "okay";
 511
 512                 /* Regulators */
 513                 AVDD-supply = <&v3_3d_reg>;
 514                 IOVDD-supply = <&v3_3d_reg>;
 515                 DRVDD-supply = <&v3_3d_reg>;
 516                 DVDD-supply = <&v1_8d_reg>;
 517         };
 518 };
 519
 520 &lcdc {
 521         status = "okay";
 522
 523         blue-and-red-wiring = "crossed";
 524 };
 525
 526 &elm {
 527         status = "okay";
 528 };
 529
 530 &epwmss0 {
 531         status = "okay";
 532
 533         ecap0: ecap@48300100 {
 534                 status = "okay";
 535                 pinctrl-names = "default";
 536                 pinctrl-0 = <&ecap0_pins>;
 537         };
 538 };
 539
 540 &gpmc {
 541         status = "okay";
 542         pinctrl-names = "default";
 543         pinctrl-0 = <&nandflash_pins_s0>;
 544         ranges = <0 0 0x08000000 0x1000000>;    /* CS0: 16MB for NAND */
 545         nand@0,0 {
 546                 compatible = "ti,omap2-nand";
 547                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 548                 interrupt-parent = <&gpmc>;
 549                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 550                              <1 IRQ_TYPE_NONE>; /* termcount */
 551                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
 552                 ti,nand-xfer-type = "prefetch-dma";
 553                 ti,nand-ecc-opt = "bch8";
 554                 ti,elm-id = <&elm>;
 555                 nand-bus-width = <8>;
 556                 gpmc,device-width = <1>;
 557                 gpmc,sync-clk-ps = <0>;
 558                 gpmc,cs-on-ns = <0>;
 559                 gpmc,cs-rd-off-ns = <44>;
 560                 gpmc,cs-wr-off-ns = <44>;
 561                 gpmc,adv-on-ns = <6>;
 562                 gpmc,adv-rd-off-ns = <34>;
 563                 gpmc,adv-wr-off-ns = <44>;
 564                 gpmc,we-on-ns = <0>;
 565                 gpmc,we-off-ns = <40>;
 566                 gpmc,oe-on-ns = <0>;
 567                 gpmc,oe-off-ns = <54>;
 568                 gpmc,access-ns = <64>;
 569                 gpmc,rd-cycle-ns = <82>;
 570                 gpmc,wr-cycle-ns = <82>;
 571                 gpmc,bus-turnaround-ns = <0>;
 572                 gpmc,cycle2cycle-delay-ns = <0>;
 573                 gpmc,clk-activation-ns = <0>;
 574                 gpmc,wr-access-ns = <40>;
 575                 gpmc,wr-data-mux-bus-ns = <0>;
 576                 /* MTD partition table */
 577                 /* All SPL-* partitions are sized to minimal length
 578                  * which can be independently programmable. For
 579                  * NAND flash this is equal to size of erase-block */
 580                 #address-cells = <1>;
 581                 #size-cells = <1>;
 582                 partition@0 {
 583                         label = "NAND.SPL";
 584                         reg = <0x00000000 0x000020000>;
 585                 };
 586                 partition@1 {
 587                         label = "NAND.SPL.backup1";
 588                         reg = <0x00020000 0x00020000>;
 589                 };
 590                 partition@2 {
 591                         label = "NAND.SPL.backup2";
 592                         reg = <0x00040000 0x00020000>;
 593                 };
 594                 partition@3 {
 595                         label = "NAND.SPL.backup3";
 596                         reg = <0x00060000 0x00020000>;
 597                 };
 598                 partition@4 {
 599                         label = "NAND.u-boot-spl-os";
 600                         reg = <0x00080000 0x00040000>;
 601                 };
 602                 partition@5 {
 603                         label = "NAND.u-boot";
 604                         reg = <0x000C0000 0x00100000>;
 605                 };
 606                 partition@6 {
 607                         label = "NAND.u-boot-env";
 608                         reg = <0x001C0000 0x00020000>;
 609                 };
 610                 partition@7 {
 611                         label = "NAND.u-boot-env.backup1";
 612                         reg = <0x001E0000 0x00020000>;
 613                 };
 614                 partition@8 {
 615                         label = "NAND.kernel";
 616                         reg = <0x00200000 0x00800000>;
 617                 };
 618                 partition@9 {
 619                         label = "NAND.file-system";
 620                         reg = <0x00A00000 0x0F600000>;
 621                 };
 622         };
 623 };
 624
 625 #include "tps65910.dtsi"
 626
 627 &mcasp1 {
 628         #sound-dai-cells = <0>;
 629         pinctrl-names = "default", "sleep";
 630         pinctrl-0 = <&mcasp1_pins>;
 631         pinctrl-1 = <&mcasp1_pins_sleep>;
 632
 633         status = "okay";
 634
 635         op-mode = <0>;          /* MCASP_IIS_MODE */
 636         tdm-slots = <2>;
 637         /* 4 serializers */
 638         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
 639                 0 0 1 2
 640         >;
 641         tx-num-evt = <32>;
 642         rx-num-evt = <32>;
 643 };
 644
 645 &tps {
 646         vcc1-supply = <&vbat>;
 647         vcc2-supply = <&vbat>;
 648         vcc3-supply = <&vbat>;
 649         vcc4-supply = <&vbat>;
 650         vcc5-supply = <&vbat>;
 651         vcc6-supply = <&vbat>;
 652         vcc7-supply = <&vbat>;
 653         vccio-supply = <&vbat>;
 654
 655         regulators {
 656                 vrtc_reg: regulator@0 {
 657                         regulator-always-on;
 658                 };
 659
 660                 vio_reg: regulator@1 {
 661                         regulator-always-on;
 662                 };
 663
 664                 vdd1_reg: regulator@2 {
 665                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 666                         regulator-name = "vdd_mpu";
 667                         regulator-min-microvolt = <912500>;
 668                         regulator-max-microvolt = <1351500>;
 669                         regulator-boot-on;
 670                         regulator-always-on;
 671                 };
 672
 673                 vdd2_reg: regulator@3 {
 674                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
 675                         regulator-name = "vdd_core";
 676                         regulator-min-microvolt = <912500>;
 677                         regulator-max-microvolt = <1150000>;
 678                         regulator-boot-on;
 679                         regulator-always-on;
 680                 };
 681
 682                 vdd3_reg: regulator@4 {
 683                         regulator-always-on;
 684                 };
 685
 686                 vdig1_reg: regulator@5 {
 687                         regulator-always-on;
 688                 };
 689
 690                 vdig2_reg: regulator@6 {
 691                         regulator-always-on;
 692                 };
 693
 694                 vpll_reg: regulator@7 {
 695                         regulator-always-on;
 696                 };
 697
 698                 vdac_reg: regulator@8 {
 699                         regulator-always-on;
 700                 };
 701
 702                 vaux1_reg: regulator@9 {
 703                         regulator-always-on;
 704                 };
 705
 706                 vaux2_reg: regulator@10 {
 707                         regulator-always-on;
 708                 };
 709
 710                 vaux33_reg: regulator@11 {
 711                         regulator-always-on;
 712                 };
 713
 714                 vmmc_reg: regulator@12 {
 715                         regulator-min-microvolt = <1800000>;
 716                         regulator-max-microvolt = <3300000>;
 717                         regulator-always-on;
 718                 };
 719         };
 720 };
 721
 722 &mac {
 723         pinctrl-names = "default", "sleep";
 724         pinctrl-0 = <&cpsw_default>;
 725         pinctrl-1 = <&cpsw_sleep>;
 726         status = "okay";
 727         slaves = <1>;
 728 };
 729
 730 &davinci_mdio {
 731         pinctrl-names = "default", "sleep";
 732         pinctrl-0 = <&davinci_mdio_default>;
 733         pinctrl-1 = <&davinci_mdio_sleep>;
 734         status = "okay";
 735
 736         ethphy0: ethernet-phy@0 {
 737                 reg = <0>;
 738         };
 739 };
 740
 741 &cpsw_emac0 {
 742         phy-handle = <&ethphy0>;
 743         phy-mode = "rgmii-txid";
 744 };
 745
 746 &tscadc {
 747         status = "okay";
 748         tsc {
 749                 ti,wires = <4>;
 750                 ti,x-plate-resistance = <200>;
 751                 ti,coordinate-readouts = <5>;
 752                 ti,wire-config = <0x00 0x11 0x22 0x33>;
 753                 ti,charge-delay = <0x400>;
 754         };
 755
 756         adc {
 757                 ti,adc-channels = <4 5 6 7>;
 758         };
 759 };
 760
 761 &mmc1 {
 762         status = "okay";
 763         vmmc-supply = <&vmmc_reg>;
 764         bus-width = <4>;
 765         pinctrl-names = "default";
 766         pinctrl-0 = <&mmc1_pins>;
 767         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 768 };
 769
 770 &mmc3 {
 771         /* these are on the crossbar and are outlined in the
 772            xbar-event-map element */
 773         dmas = <&edma_xbar 12 0 1
 774                 &edma_xbar 13 0 2>;
 775         dma-names = "tx", "rx";
 776         status = "okay";
 777         vmmc-supply = <&wlan_en_reg>;
 778         bus-width = <4>;
 779         pinctrl-names = "default";
 780         pinctrl-0 = <&mmc3_pins &wlan_pins>;
 781         ti,non-removable;
 782         ti,needs-special-hs-handling;
 783         cap-power-off-card;
 784         keep-power-in-suspend;
 785
 786         #address-cells = <1>;
 787         #size-cells = <0>;
 788         wlcore: wlcore@0 {
 789                 compatible = "ti,wl1835";
 790                 reg = <2>;
 791                 interrupt-parent = <&gpio3>;
 792                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
 793         };
 794 };
 795
 796 &sham {
 797         status = "okay";
 798 };
 799
 800 &aes {
 801         status = "okay";
 802 };
 803
 804 &dcan1 {
 805         status = "disabled";    /* Enable only if Profile 1 is selected */
 806         pinctrl-names = "default";
 807         pinctrl-0 = <&dcan1_pins_default>;
 808 };
 809
 810 &rtc {
 811         clocks = <&clk_32768_ck>, <&clkdiv32k_ick>;
 812         clock-names = "ext-clk", "int-clk";
 813 };