GNU Linux-libre 6.1.90-gnu
[releases.git] / arch / arm / boot / dts / am335x-baltos-ir5221.dts
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
4  */
5
6 /*
7  * VScom OnRISC
8  * http://www.vscom.de
9  */
10
11 /dts-v1/;
12
13 #include "am335x-baltos.dtsi"
14 #include "am335x-baltos-leds.dtsi"
15
16 / {
17         model = "OnRISC Baltos iR 5221";
18 };
19
20 &am33xx_pinmux {
21         tca6416_pins: pinmux_tca6416_pins {
22                 pinctrl-single,pins = <
23                         AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7)      /* xdma_event_intr1.gpio0[20] tca6416 stuff */
24                 >;
25         };
26
27
28         dcan1_pins: pinmux_dcan1_pins {
29                 pinctrl-single,pins = <
30                         AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2)      /* uart0_ctsn.dcan1_tx_mux0 */
31                         AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2)      /* uart0_rtsn.dcan1_rx_mux0 */
32                 >;
33         };
34
35         uart1_pins: pinmux_uart1_pins {
36                 pinctrl-single,pins = <
37                         AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT, MUX_MODE0)
38                         AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT, MUX_MODE0)
39                         AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0)
40                         AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
41                         AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* lcd_vsync.gpio2[22] DTR */
42                         AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_hsync.gpio2[23] DSR */
43                         AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_pclk.gpio2[24] DCD */
44                         AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* lcd_ac_bias_en.gpio2[25] RI */
45                 >;
46         };
47
48         uart2_pins: pinmux_uart2_pins {
49                 pinctrl-single,pins = <
50                         AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1)      /* spi0_sclk.uart2_rxd_mux3 */
51                         AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1)      /* spi0_d0.uart2_txd_mux3 */
52                         AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2)      /* i2c0_sda.uart2_ctsn_mux0 */
53                         AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2)      /* i2c0_scl.uart2_rtsn_mux0 */
54                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT_PULLDOWN, MUX_MODE7)      /* gpmc_ad12.gpio1[12] DTR */
55                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* gpmc_ad13.gpio1[13] DSR */
56                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7)      /* gpmc_ad14.gpio1[14] DCD */
57                         AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7)     /* gpmc_ad15.gpio1[15] RI */
58
59                         AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7)      /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
60                 >;
61         };
62
63         mmc1_pins: pinmux_mmc1_pins {
64                 pinctrl-single,pins = <
65                         AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7)     /* MMC1 CD */
66                 >;
67         };
68 };
69
70 &uart1 {
71         pinctrl-names = "default";
72         pinctrl-0 = <&uart1_pins>;
73         dtr-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
74         dsr-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
75         dcd-gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
76         rng-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
77
78         status = "okay";
79 };
80
81 &uart2 {
82         pinctrl-names = "default";
83         pinctrl-0 = <&uart2_pins>;
84         dtr-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
85         dsr-gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
86         dcd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
87         rng-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
88
89         status = "okay";
90 };
91
92 &i2c1 {
93         tca6416: gpio@20 {
94                 compatible = "ti,tca6416";
95                 reg = <0x20>;
96                 gpio-controller;
97                 #gpio-cells = <2>;
98                 interrupt-parent = <&gpio0>;
99                 interrupts = <20 IRQ_TYPE_EDGE_RISING>;
100                 pinctrl-names = "default";
101                 pinctrl-0 = <&tca6416_pins>;
102                 gpio-line-names = "GP_IN0", "GP_IN1", "GP_IN2", "GP_IN3",
103                                   "GP_OUT0", "GP_OUT1", "GP_OUT2", "GP_OUT3",
104                                   "ModeA0", "ModeA1", "ModeA2", "ModeA3",
105                                   "ModeB0", "ModeB1", "ModeB2", "ModeB3";
106         };
107 };
108
109 &usb0_phy {
110         status = "okay";
111 };
112
113 &usb1_phy {
114         status = "okay";
115 };
116
117 &usb0 {
118         status = "okay";
119         dr_mode = "host";
120 };
121
122 &usb1 {
123         status = "okay";
124         dr_mode = "host";
125 };
126
127 &cpsw_port1 {
128         phy-mode = "rmii";
129         ti,dual-emac-pvid = <1>;
130         fixed-link {
131                 speed = <100>;
132                 full-duplex;
133         };
134 };
135
136 &cpsw_port2 {
137         phy-mode = "rgmii-id";
138         ti,dual-emac-pvid = <2>;
139         phy-handle = <&phy1>;
140 };
141
142 &dcan1 {
143         pinctrl-names = "default";
144         pinctrl-0 = <&dcan1_pins>;
145
146         status = "okay";
147 };
148
149 &mmc1 {
150         pinctrl-names = "default";
151         pinctrl-0 = <&mmc1_pins>;
152         cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
153 };
154
155 &gpio0 {
156         gpio-line-names =
157                 "MDIO",
158                 "MDC",
159                 "UART2_RX",
160                 "UART2_TX",
161                 "I2C1_SDA",
162                 "I2C1_SCL",
163                 "WLAN_BTN",
164                 "W_DISABLE",
165                 "NC",
166                 "NC",
167                 "NC",
168                 "NC",
169                 "UART1_CTSN",
170                 "UART1_RTSN",
171                 "UART1_RX",
172                 "UART1_TX",
173                 "onrisc:blue:wlan",
174                 "onrisc:green:app",
175                 "USB0_DRVVBUS",
176                 "ETH2_INT",
177                 "TCA6416_INT",
178                 "RMII1_TXD1",
179                 "MMC1_DAT0",
180                 "MMC1_DAT1",
181                 "NC",
182                 "NC",
183                 "MMC1_DAT2",
184                 "MMC1_DAT3",
185                 "RMII1_TXD0",
186                 "NC",
187                 "GPMC_WAIT0",
188                 "GPMC_WP_N";
189 };
190
191 &gpio1 {
192         gpio-line-names =
193                 "GPMC_AD0",
194                 "GPMC_AD1",
195                 "GPMC_AD2",
196                 "GPMC_AD3",
197                 "GPMC_AD4",
198                 "GPMC_AD5",
199                 "GPMC_AD6",
200                 "GPMC_AD7",
201                 "DCAN1_TX",
202                 "DCAN1_RX",
203                 "CONSOLE_RX",
204                 "CONSOLE_TX",
205                 "UART2_DTR",
206                 "UART2_DSR",
207                 "UART2_DCD",
208                 "UART2_RI",
209                 "RGMII2_TCTL",
210                 "RGMII2_RCTL",
211                 "RGMII2_TD3",
212                 "RGMII2_TD2",
213                 "RGMII2_TD1",
214                 "RGMII2_TD0",
215                 "RGMII2_TCLK",
216                 "RGMII2_RCLK",
217                 "RGMII2_RD3",
218                 "RGMII2_RD2",
219                 "RGMII2_RD1",
220                 "RGMII2_RD0",
221                 "PMIC_INT1",
222                 "GPMC_CSN0_Flash",
223                 "MMC1_CLK",
224                 "MMC1_CMD";
225 };
226
227 &gpio2 {
228         gpio-line-names =
229                 "GPMC_CSN3_BUS",
230                 "GPMC_CLK",
231                 "GPMC_ADVN_ALE",
232                 "GPMC_OEN_RE_N",
233                 "GPMC_WE_N",
234                 "GPMC_BEN0_CLE",
235                 "NC",
236                 "NC",
237                 "NC",
238                 "NC",
239                 "NC",
240                 "NC",
241                 "NC",
242                 "NC",
243                 "NC",
244                 "NC",
245                 "NC",
246                 "NC",
247                 "SD_CD",
248                 "SD_WP",
249                 "RMII1_RXD1",
250                 "RMII1_RXD0",
251                 "UART1_DTR",
252                 "UART1_DSR",
253                 "UART1_DCD",
254                 "UART1_RI",
255                 "MMC0_DAT3",
256                 "MMC0_DAT2",
257                 "MMC0_DAT1",
258                 "MMC0_DAT0",
259                 "MMC0_CLK",
260                 "MMC0_CMD";
261 };
262
263 &gpio3 {
264         gpio-line-names =
265                 "onrisc:red:power",
266                 "RMII1_CRS_DV",
267                 "RMII1_RXER",
268                 "RMII1_TXEN",
269                 "3G_PWR_EN",
270                 "UART2_CTSN",
271                 "UART2_RTSN",
272                 "WLAN_IRQ",
273                 "WLAN_EN",
274                 "NC",
275                 "NC",
276                 "NC",
277                 "NC",
278                 "USB1_DRVVBUS",
279                 "NC",
280                 "NC",
281                 "NC",
282                 "NC",
283                 "NC",
284                 "NC",
285                 "NC",
286                 "NC",
287                 "NC",
288                 "NC",
289                 "NC",
290                 "NC",
291                 "NC",
292                 "NC",
293                 "NC",
294                 "NC",
295                 "NC",
296                 "NC";
297 };