arch/arc/kernel/setup.c

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/seq_file.h>
  10 #include <linux/fs.h>
  11 #include <linux/delay.h>
  12 #include <linux/root_dev.h>
  13 #include <linux/clk.h>
  14 #include <linux/clk-provider.h>
  15 #include <linux/clocksource.h>
  16 #include <linux/console.h>
  17 #include <linux/module.h>
  18 #include <linux/sizes.h>
  19 #include <linux/cpu.h>
  20 #include <linux/of_fdt.h>
  21 #include <linux/of.h>
  22 #include <linux/cache.h>
  23 #include <asm/sections.h>
  24 #include <asm/arcregs.h>
  25 #include <asm/tlb.h>
  26 #include <asm/setup.h>
  27 #include <asm/page.h>
  28 #include <asm/irq.h>
  29 #include <asm/unwind.h>
  30 #include <asm/mach_desc.h>
  31 #include <asm/smp.h>
  32
  33 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  34
  35 unsigned int intr_to_DE_cnt;
  36
  37 /* Part of U-boot ABI: see head.S */
  38 int __initdata uboot_tag;
  39 int __initdata uboot_magic;
  40 char __initdata *uboot_arg;
  41
  42 const struct machine_desc *machine_desc;
  43
  44 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  45
  46 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  47
  48 static const struct id_to_str arc_cpu_rel[] = {
  49 #ifdef CONFIG_ISA_ARCOMPACT
  50         { 0x34, "R4.10"},
  51         { 0x35, "R4.11"},
  52 #else
  53         { 0x51, "R2.0" },
  54         { 0x52, "R2.1" },
  55         { 0x53, "R3.0" },
  56         { 0x54, "R4.0" },
  57 #endif
  58         { 0x00, NULL   }
  59 };
  60
  61 static const struct id_to_str arc_cpu_nm[] = {
  62 #ifdef CONFIG_ISA_ARCOMPACT
  63         { 0x20, "ARC 600"   },
  64         { 0x30, "ARC 770"   },  /* 750 identified seperately */
  65 #else
  66         { 0x40, "ARC EM"  },
  67         { 0x50, "ARC HS38"  },
  68         { 0x54, "ARC HS48"  },
  69 #endif
  70         { 0x00, "Unknown"   }
  71 };
  72
  73 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
  74 {
  75         if (is_isa_arcompact()) {
  76                 struct bcr_iccm_arcompact iccm;
  77                 struct bcr_dccm_arcompact dccm;
  78
  79                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  80                 if (iccm.ver) {
  81                         cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
  82                         cpu->iccm.base_addr = iccm.base << 16;
  83                 }
  84
  85                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  86                 if (dccm.ver) {
  87                         unsigned long base;
  88                         cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
  89
  90                         base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
  91                         cpu->dccm.base_addr = base & ~0xF;
  92                 }
  93         } else {
  94                 struct bcr_iccm_arcv2 iccm;
  95                 struct bcr_dccm_arcv2 dccm;
  96                 unsigned long region;
  97
  98                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  99                 if (iccm.ver) {
 100                         cpu->iccm.sz = 256 << iccm.sz00;        /* 512B to 16M */
 101                         if (iccm.sz00 == 0xF && iccm.sz01 > 0)
 102                                 cpu->iccm.sz <<= iccm.sz01;
 103
 104                         region = read_aux_reg(ARC_REG_AUX_ICCM);
 105                         cpu->iccm.base_addr = region & 0xF0000000;
 106                 }
 107
 108                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
 109                 if (dccm.ver) {
 110                         cpu->dccm.sz = 256 << dccm.sz0;
 111                         if (dccm.sz0 == 0xF && dccm.sz1 > 0)
 112                                 cpu->dccm.sz <<= dccm.sz1;
 113
 114                         region = read_aux_reg(ARC_REG_AUX_DCCM);
 115                         cpu->dccm.base_addr = region & 0xF0000000;
 116                 }
 117         }
 118 }
 119
 120 static void read_arc_build_cfg_regs(void)
 121 {
 122         struct bcr_timer timer;
 123         struct bcr_generic bcr;
 124         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 125         const struct id_to_str *tbl;
 126         struct bcr_isa_arcv2 isa;
 127
 128         FIX_PTR(cpu);
 129
 130         READ_BCR(AUX_IDENTITY, cpu->core);
 131
 132         for (tbl = &arc_cpu_rel[0]; tbl->id != 0; tbl++) {
 133                 if (cpu->core.family == tbl->id) {
 134                         cpu->details = tbl->str;
 135                         break;
 136                 }
 137         }
 138
 139         for (tbl = &arc_cpu_nm[0]; tbl->id != 0; tbl++) {
 140                 if ((cpu->core.family & 0xF4) == tbl->id)
 141                         break;
 142         }
 143         cpu->name = tbl->str;
 144
 145         READ_BCR(ARC_REG_TIMERS_BCR, timer);
 146         cpu->extn.timer0 = timer.t0;
 147         cpu->extn.timer1 = timer.t1;
 148         cpu->extn.rtc = timer.rtc;
 149
 150         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 151
 152         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 153
 154         cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
 155         cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
 156         cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
 157         cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
 158         cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
 159         cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
 160                                 IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
 161
 162         READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
 163
 164         /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
 165         read_decode_ccm_bcr(cpu);
 166
 167         read_decode_mmu_bcr();
 168         read_decode_cache_bcr();
 169
 170         if (is_isa_arcompact()) {
 171                 struct bcr_fp_arcompact sp, dp;
 172                 struct bcr_bpu_arcompact bpu;
 173
 174                 READ_BCR(ARC_REG_FP_BCR, sp);
 175                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 176                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 177                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 178
 179                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 180                 cpu->bpu.ver = bpu.ver;
 181                 cpu->bpu.full = bpu.fam ? 1 : 0;
 182                 if (bpu.ent) {
 183                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 184                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 185                 }
 186         } else {
 187                 struct bcr_fp_arcv2 spdp;
 188                 struct bcr_bpu_arcv2 bpu;
 189
 190                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 191                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 192                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 193
 194                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 195                 cpu->bpu.ver = bpu.ver;
 196                 cpu->bpu.full = bpu.ft;
 197                 cpu->bpu.num_cache = 256 << bpu.bce;
 198                 cpu->bpu.num_pred = 2048 << bpu.pte;
 199
 200                 if (cpu->core.family >= 0x54) {
 201                         unsigned int exec_ctrl;
 202
 203                         READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
 204                         cpu->extn.dual_iss_exist = 1;
 205                         cpu->extn.dual_iss_enb = exec_ctrl & 1;
 206                 }
 207         }
 208
 209         READ_BCR(ARC_REG_AP_BCR, bcr);
 210         cpu->extn.ap = bcr.ver ? 1 : 0;
 211
 212         READ_BCR(ARC_REG_SMART_BCR, bcr);
 213         cpu->extn.smart = bcr.ver ? 1 : 0;
 214
 215         READ_BCR(ARC_REG_RTT_BCR, bcr);
 216         cpu->extn.rtt = bcr.ver ? 1 : 0;
 217
 218         cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
 219
 220         READ_BCR(ARC_REG_ISA_CFG_BCR, isa);
 221
 222         /* some hacks for lack of feature BCR info in old ARC700 cores */
 223         if (is_isa_arcompact()) {
 224                 if (!isa.ver)   /* ISA BCR absent, use Kconfig info */
 225                         cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 226                 else {
 227                         /* ARC700_BUILD only has 2 bits of isa info */
 228                         struct bcr_generic bcr = *(struct bcr_generic *)&isa;
 229                         cpu->isa.atomic = bcr.info & 1;
 230                 }
 231
 232                 cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 233
 234                  /* there's no direct way to distinguish 750 vs. 770 */
 235                 if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3))
 236                         cpu->name = "ARC750";
 237         } else {
 238                 cpu->isa = isa;
 239         }
 240 }
 241
 242 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 243 {
 244         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 245         struct bcr_identity *core = &cpu->core;
 246         int i, n = 0;
 247
 248         FIX_PTR(cpu);
 249
 250         n += scnprintf(buf + n, len - n,
 251                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 252                        core->family, core->cpu_id, core->chip_id);
 253
 254         n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s%s%s\n",
 255                        cpu_id, cpu->name, cpu->details,
 256                        is_isa_arcompact() ? "ARCompact" : "ARCv2",
 257                        IS_AVAIL1(cpu->isa.be, "[Big-Endian]"),
 258                        IS_AVAIL3(cpu->extn.dual_iss_exist, cpu->extn.dual_iss_enb, " Dual-Issue"));
 259
 260         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",
 261                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 262                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 263                        IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
 264                        IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
 265
 266         n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
 267                            IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 268                            IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 269                            IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
 270
 271         if (i)
 272                 n += scnprintf(buf + n, len - n, "\n\t\t: ");
 273
 274         if (cpu->extn_mpy.ver) {
 275                 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
 276                         n += scnprintf(buf + n, len - n, "mpy ");
 277                 } else {
 278                         int opt = 2;    /* stock MPY/MPYH */
 279
 280                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 281                                 opt = cpu->extn_mpy.dsp + 6;
 282
 283                         n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
 284                 }
 285         }
 286
 287         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 288                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
 289                        IS_AVAIL1(cpu->extn.norm, "norm "),
 290                        IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
 291                        IS_AVAIL1(cpu->extn.swap, "swap "),
 292                        IS_AVAIL1(cpu->extn.minmax, "minmax "),
 293                        IS_AVAIL1(cpu->extn.crc, "crc "),
 294                        IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
 295
 296         if (cpu->bpu.ver)
 297                 n += scnprintf(buf + n, len - n,
 298                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
 299                               IS_AVAIL1(cpu->bpu.full, "full"),
 300                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 301                               cpu->bpu.num_cache, cpu->bpu.num_pred);
 302
 303         return buf;
 304 }
 305
 306 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 307 {
 308         int n = 0;
 309         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 310
 311         FIX_PTR(cpu);
 312
 313         n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
 314
 315         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 316                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 317                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 318                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 319
 320         if (cpu->extn.debug)
 321                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
 322                                IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
 323                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 324                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 325
 326         if (cpu->dccm.sz || cpu->iccm.sz)
 327                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 328                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 329                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 330
 331         n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
 332                         EF_ARC_OSABI_CURRENT >> 8,
 333                         EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
 334                         "no-legacy-syscalls" : "64-bit data any register aligned");
 335
 336         return buf;
 337 }
 338
 339 static void arc_chk_core_config(void)
 340 {
 341         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 342         int saved = 0, present = 0;
 343         char *opt_nm = NULL;;
 344
 345         if (!cpu->extn.timer0)
 346                 panic("Timer0 is not present!\n");
 347
 348         if (!cpu->extn.timer1)
 349                 panic("Timer1 is not present!\n");
 350
 351 #ifdef CONFIG_ARC_HAS_DCCM
 352         /*
 353          * DCCM can be arbit placed in hardware.
 354          * Make sure it's placement/sz matches what Linux is built with
 355          */
 356         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 357                 panic("Linux built with incorrect DCCM Base address\n");
 358
 359         if (CONFIG_ARC_DCCM_SZ * SZ_1K != cpu->dccm.sz)
 360                 panic("Linux built with incorrect DCCM Size\n");
 361 #endif
 362
 363 #ifdef CONFIG_ARC_HAS_ICCM
 364         if (CONFIG_ARC_ICCM_SZ * SZ_1K != cpu->iccm.sz)
 365                 panic("Linux built with incorrect ICCM Size\n");
 366 #endif
 367
 368         /*
 369          * FP hardware/software config sanity
 370          * -If hardware present, kernel needs to save/restore FPU state
 371          * -If not, it will crash trying to save/restore the non-existant regs
 372          */
 373
 374         if (is_isa_arcompact()) {
 375                 opt_nm = "CONFIG_ARC_FPU_SAVE_RESTORE";
 376                 saved = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
 377
 378                 /* only DPDP checked since SP has no arch visible regs */
 379                 present = cpu->extn.fpu_dp;
 380         } else {
 381                 opt_nm = "CONFIG_ARC_HAS_ACCL_REGS";
 382                 saved = IS_ENABLED(CONFIG_ARC_HAS_ACCL_REGS);
 383
 384                 /* Accumulator Low:High pair (r58:59) present if DSP MPY or FPU */
 385                 present = cpu->extn_mpy.dsp | cpu->extn.fpu_sp | cpu->extn.fpu_dp;
 386         }
 387
 388         if (present && !saved)
 389                 pr_warn("Enable %s for working apps\n", opt_nm);
 390         else if (!present && saved)
 391                 panic("Disable %s, hardware NOT present\n", opt_nm);
 392 }
 393
 394 /*
 395  * Initialize and setup the processor core
 396  * This is called by all the CPUs thus should not do special case stuff
 397  *    such as only for boot CPU etc
 398  */
 399
 400 void setup_processor(void)
 401 {
 402         char str[512];
 403         int cpu_id = smp_processor_id();
 404
 405         read_arc_build_cfg_regs();
 406         arc_init_IRQ();
 407
 408         pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 409
 410         arc_mmu_init();
 411         arc_cache_init();
 412
 413         pr_info("%s", arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 414         pr_info("%s", arc_platform_smp_cpuinfo());
 415
 416         arc_chk_core_config();
 417 }
 418
 419 static inline bool uboot_arg_invalid(unsigned long addr)
 420 {
 421         /*
 422          * Check that it is a untranslated address (although MMU is not enabled
 423          * yet, it being a high address ensures this is not by fluke)
 424          */
 425         if (addr < PAGE_OFFSET)
 426                 return true;
 427
 428         /* Check that address doesn't clobber resident kernel image */
 429         return addr >= (unsigned long)_stext && addr <= (unsigned long)_end;
 430 }
 431
 432 #define IGNORE_ARGS             "Ignore U-boot args: "
 433
 434 /* uboot_tag values for U-boot - kernel ABI revision 0; see head.S */
 435 #define UBOOT_TAG_NONE          0
 436 #define UBOOT_TAG_CMDLINE       1
 437 #define UBOOT_TAG_DTB           2
 438 /* We always pass 0 as magic from U-boot */
 439 #define UBOOT_MAGIC_VALUE       0
 440
 441 void __init handle_uboot_args(void)
 442 {
 443         bool use_embedded_dtb = true;
 444         bool append_cmdline = false;
 445
 446 #ifdef CONFIG_ARC_UBOOT_SUPPORT
 447         /* check that we know this tag */
 448         if (uboot_tag != UBOOT_TAG_NONE &&
 449             uboot_tag != UBOOT_TAG_CMDLINE &&
 450             uboot_tag != UBOOT_TAG_DTB) {
 451                 pr_warn(IGNORE_ARGS "invalid uboot tag: '%08x'\n", uboot_tag);
 452                 goto ignore_uboot_args;
 453         }
 454
 455         if (uboot_magic != UBOOT_MAGIC_VALUE) {
 456                 pr_warn(IGNORE_ARGS "non zero uboot magic\n");
 457                 goto ignore_uboot_args;
 458         }
 459
 460         if (uboot_tag != UBOOT_TAG_NONE &&
 461             uboot_arg_invalid((unsigned long)uboot_arg)) {
 462                 pr_warn(IGNORE_ARGS "invalid uboot arg: '%px'\n", uboot_arg);
 463                 goto ignore_uboot_args;
 464         }
 465
 466         /* see if U-boot passed an external Device Tree blob */
 467         if (uboot_tag == UBOOT_TAG_DTB) {
 468                 machine_desc = setup_machine_fdt((void *)uboot_arg);
 469
 470                 /* external Device Tree blob is invalid - use embedded one */
 471                 use_embedded_dtb = !machine_desc;
 472         }
 473
 474         if (uboot_tag == UBOOT_TAG_CMDLINE)
 475                 append_cmdline = true;
 476
 477 ignore_uboot_args:
 478 #endif
 479
 480         if (use_embedded_dtb) {
 481                 machine_desc = setup_machine_fdt(__dtb_start);
 482                 if (!machine_desc)
 483                         panic("Embedded DT invalid\n");
 484         }
 485
 486         /*
 487          * NOTE: @boot_command_line is populated by setup_machine_fdt() so this
 488          * append processing can only happen after.
 489          */
 490         if (append_cmdline) {
 491                 /* Ensure a whitespace between the 2 cmdlines */
 492                 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 493                 strlcat(boot_command_line, uboot_arg, COMMAND_LINE_SIZE);
 494         }
 495 }
 496
 497 void __init setup_arch(char **cmdline_p)
 498 {
 499         handle_uboot_args();
 500
 501         /* Save unparsed command line copy for /proc/cmdline */
 502         *cmdline_p = boot_command_line;
 503
 504         /* To force early parsing of things like mem=xxx */
 505         parse_early_param();
 506
 507         /* Platform/board specific: e.g. early console registration */
 508         if (machine_desc->init_early)
 509                 machine_desc->init_early();
 510
 511         smp_init_cpus();
 512
 513         setup_processor();
 514         setup_arch_memory();
 515
 516         /* copy flat DT out of .init and then unflatten it */
 517         unflatten_and_copy_device_tree();
 518
 519         /* Can be issue if someone passes cmd line arg "ro"
 520          * But that is unlikely so keeping it as it is
 521          */
 522         root_mountflags &= ~MS_RDONLY;
 523
 524 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 525         conswitchp = &dummy_con;
 526 #endif
 527
 528         arc_unwind_init();
 529 }
 530
 531 /*
 532  * Called from start_kernel() - boot CPU only
 533  */
 534 void __init time_init(void)
 535 {
 536         of_clk_init(NULL);
 537         timer_probe();
 538 }
 539
 540 static int __init customize_machine(void)
 541 {
 542         if (machine_desc->init_machine)
 543                 machine_desc->init_machine();
 544
 545         return 0;
 546 }
 547 arch_initcall(customize_machine);
 548
 549 static int __init init_late_machine(void)
 550 {
 551         if (machine_desc->init_late)
 552                 machine_desc->init_late();
 553
 554         return 0;
 555 }
 556 late_initcall(init_late_machine);
 557 /*
 558  *  Get CPU information for use by the procfs.
 559  */
 560
 561 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 562 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 563
 564 static int show_cpuinfo(struct seq_file *m, void *v)
 565 {
 566         char *str;
 567         int cpu_id = ptr_to_cpu(v);
 568         struct device *cpu_dev = get_cpu_device(cpu_id);
 569         struct clk *cpu_clk;
 570         unsigned long freq = 0;
 571
 572         if (!cpu_online(cpu_id)) {
 573                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 574                 goto done;
 575         }
 576
 577         str = (char *)__get_free_page(GFP_KERNEL);
 578         if (!str)
 579                 goto done;
 580
 581         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 582
 583         cpu_clk = clk_get(cpu_dev, NULL);
 584         if (IS_ERR(cpu_clk)) {
 585                 seq_printf(m, "CPU speed \t: Cannot get clock for processor [%d]\n",
 586                            cpu_id);
 587         } else {
 588                 freq = clk_get_rate(cpu_clk);
 589         }
 590         if (freq)
 591                 seq_printf(m, "CPU speed\t: %lu.%02lu Mhz\n",
 592                            freq / 1000000, (freq / 10000) % 100);
 593
 594         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 595                    loops_per_jiffy / (500000 / HZ),
 596                    (loops_per_jiffy / (5000 / HZ)) % 100);
 597
 598         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 599         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 600         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 601         seq_printf(m, arc_platform_smp_cpuinfo());
 602
 603         free_page((unsigned long)str);
 604 done:
 605         seq_printf(m, "\n");
 606
 607         return 0;
 608 }
 609
 610 static void *c_start(struct seq_file *m, loff_t *pos)
 611 {
 612         /*
 613          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 614          * However since NULL is also a valid cpu-id (0), we use a round-about
 615          * way to pass it w/o having to kmalloc/free a 2 byte string.
 616          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 617          */
 618         return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
 619 }
 620
 621 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 622 {
 623         ++*pos;
 624         return c_start(m, pos);
 625 }
 626
 627 static void c_stop(struct seq_file *m, void *v)
 628 {
 629 }
 630
 631 const struct seq_operations cpuinfo_op = {
 632         .start  = c_start,
 633         .next   = c_next,
 634         .stop   = c_stop,
 635         .show   = show_cpuinfo
 636 };
 637
 638 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 639
 640 static int __init topology_init(void)
 641 {
 642         int cpu;
 643
 644         for_each_present_cpu(cpu)
 645             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 646
 647         return 0;
 648 }
 649
 650 subsys_initcall(topology_init);