arch/arc/kernel/setup.c

   1 /*
   2  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <linux/seq_file.h>
  10 #include <linux/fs.h>
  11 #include <linux/delay.h>
  12 #include <linux/root_dev.h>
  13 #include <linux/clk.h>
  14 #include <linux/clk-provider.h>
  15 #include <linux/clocksource.h>
  16 #include <linux/console.h>
  17 #include <linux/module.h>
  18 #include <linux/sizes.h>
  19 #include <linux/cpu.h>
  20 #include <linux/of_fdt.h>
  21 #include <linux/of.h>
  22 #include <linux/cache.h>
  23 #include <asm/sections.h>
  24 #include <asm/arcregs.h>
  25 #include <asm/tlb.h>
  26 #include <asm/setup.h>
  27 #include <asm/page.h>
  28 #include <asm/irq.h>
  29 #include <asm/unwind.h>
  30 #include <asm/mach_desc.h>
  31 #include <asm/smp.h>
  32
  33 #define FIX_PTR(x)  __asm__ __volatile__(";" : "+r"(x))
  34
  35 unsigned int intr_to_DE_cnt;
  36
  37 /* Part of U-boot ABI: see head.S */
  38 int __initdata uboot_tag;
  39 int __initdata uboot_magic;
  40 char __initdata *uboot_arg;
  41
  42 const struct machine_desc *machine_desc;
  43
  44 struct task_struct *_current_task[NR_CPUS];     /* For stack switching */
  45
  46 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
  47
  48 static const struct id_to_str arc_cpu_rel[] = {
  49 #ifdef CONFIG_ISA_ARCOMPACT
  50         { 0x34, "R4.10"},
  51         { 0x35, "R4.11"},
  52 #else
  53         { 0x51, "R2.0" },
  54         { 0x52, "R2.1" },
  55         { 0x53, "R3.0" },
  56         { 0x54, "R3.10a" },
  57 #endif
  58         { 0x00, NULL   }
  59 };
  60
  61 static const struct id_to_str arc_cpu_nm[] = {
  62 #ifdef CONFIG_ISA_ARCOMPACT
  63         { 0x20, "ARC 600"   },
  64         { 0x30, "ARC 770"   },  /* 750 identified seperately */
  65 #else
  66         { 0x40, "ARC EM"  },
  67         { 0x50, "ARC HS38"  },
  68         { 0x54, "ARC HS48"  },
  69 #endif
  70         { 0x00, "Unknown"   }
  71 };
  72
  73 static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
  74 {
  75         if (is_isa_arcompact()) {
  76                 struct bcr_iccm_arcompact iccm;
  77                 struct bcr_dccm_arcompact dccm;
  78
  79                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  80                 if (iccm.ver) {
  81                         cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
  82                         cpu->iccm.base_addr = iccm.base << 16;
  83                 }
  84
  85                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
  86                 if (dccm.ver) {
  87                         unsigned long base;
  88                         cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
  89
  90                         base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
  91                         cpu->dccm.base_addr = base & ~0xF;
  92                 }
  93         } else {
  94                 struct bcr_iccm_arcv2 iccm;
  95                 struct bcr_dccm_arcv2 dccm;
  96                 unsigned long region;
  97
  98                 READ_BCR(ARC_REG_ICCM_BUILD, iccm);
  99                 if (iccm.ver) {
 100                         cpu->iccm.sz = 256 << iccm.sz00;        /* 512B to 16M */
 101                         if (iccm.sz00 == 0xF && iccm.sz01 > 0)
 102                                 cpu->iccm.sz <<= iccm.sz01;
 103
 104                         region = read_aux_reg(ARC_REG_AUX_ICCM);
 105                         cpu->iccm.base_addr = region & 0xF0000000;
 106                 }
 107
 108                 READ_BCR(ARC_REG_DCCM_BUILD, dccm);
 109                 if (dccm.ver) {
 110                         cpu->dccm.sz = 256 << dccm.sz0;
 111                         if (dccm.sz0 == 0xF && dccm.sz1 > 0)
 112                                 cpu->dccm.sz <<= dccm.sz1;
 113
 114                         region = read_aux_reg(ARC_REG_AUX_DCCM);
 115                         cpu->dccm.base_addr = region & 0xF0000000;
 116                 }
 117         }
 118 }
 119
 120 static void read_arc_build_cfg_regs(void)
 121 {
 122         struct bcr_timer timer;
 123         struct bcr_generic bcr;
 124         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 125         const struct id_to_str *tbl;
 126         struct bcr_isa_arcv2 isa;
 127
 128         FIX_PTR(cpu);
 129
 130         READ_BCR(AUX_IDENTITY, cpu->core);
 131
 132         for (tbl = &arc_cpu_rel[0]; tbl->id != 0; tbl++) {
 133                 if (cpu->core.family == tbl->id) {
 134                         cpu->details = tbl->str;
 135                         break;
 136                 }
 137         }
 138
 139         for (tbl = &arc_cpu_nm[0]; tbl->id != 0; tbl++) {
 140                 if ((cpu->core.family & 0xF4) == tbl->id)
 141                         break;
 142         }
 143         cpu->name = tbl->str;
 144
 145         READ_BCR(ARC_REG_TIMERS_BCR, timer);
 146         cpu->extn.timer0 = timer.t0;
 147         cpu->extn.timer1 = timer.t1;
 148         cpu->extn.rtc = timer.rtc;
 149
 150         cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
 151
 152         READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
 153
 154         cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
 155         cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
 156         cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0;        /* 1,3 */
 157         cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
 158         cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
 159         cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
 160                                 IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
 161
 162         READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
 163
 164         /* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
 165         read_decode_ccm_bcr(cpu);
 166
 167         read_decode_mmu_bcr();
 168         read_decode_cache_bcr();
 169
 170         if (is_isa_arcompact()) {
 171                 struct bcr_fp_arcompact sp, dp;
 172                 struct bcr_bpu_arcompact bpu;
 173
 174                 READ_BCR(ARC_REG_FP_BCR, sp);
 175                 READ_BCR(ARC_REG_DPFP_BCR, dp);
 176                 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
 177                 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
 178
 179                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 180                 cpu->bpu.ver = bpu.ver;
 181                 cpu->bpu.full = bpu.fam ? 1 : 0;
 182                 if (bpu.ent) {
 183                         cpu->bpu.num_cache = 256 << (bpu.ent - 1);
 184                         cpu->bpu.num_pred = 256 << (bpu.ent - 1);
 185                 }
 186         } else {
 187                 struct bcr_fp_arcv2 spdp;
 188                 struct bcr_bpu_arcv2 bpu;
 189
 190                 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
 191                 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
 192                 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
 193
 194                 READ_BCR(ARC_REG_BPU_BCR, bpu);
 195                 cpu->bpu.ver = bpu.ver;
 196                 cpu->bpu.full = bpu.ft;
 197                 cpu->bpu.num_cache = 256 << bpu.bce;
 198                 cpu->bpu.num_pred = 2048 << bpu.pte;
 199
 200                 if (cpu->core.family >= 0x54) {
 201
 202                         struct bcr_uarch_build_arcv2 uarch;
 203
 204                         /*
 205                          * The first 0x54 core (uarch maj:min 0:1 or 0:2) was
 206                          * dual issue only (HS4x). But next uarch rev (1:0)
 207                          * allows it be configured for single issue (HS3x)
 208                          * Ensure we fiddle with dual issue only on HS4x
 209                          */
 210                         READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch);
 211
 212                         if (uarch.prod == 4) {
 213                                 unsigned int exec_ctrl;
 214
 215                                 /* dual issue hardware always present */
 216                                 cpu->extn.dual = 1;
 217
 218                                 READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
 219
 220                                 /* dual issue hardware enabled ? */
 221                                 cpu->extn.dual_enb = !(exec_ctrl & 1);
 222
 223                         }
 224                 }
 225         }
 226
 227         READ_BCR(ARC_REG_AP_BCR, bcr);
 228         cpu->extn.ap = bcr.ver ? 1 : 0;
 229
 230         READ_BCR(ARC_REG_SMART_BCR, bcr);
 231         cpu->extn.smart = bcr.ver ? 1 : 0;
 232
 233         READ_BCR(ARC_REG_RTT_BCR, bcr);
 234         cpu->extn.rtt = bcr.ver ? 1 : 0;
 235
 236         cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
 237
 238         READ_BCR(ARC_REG_ISA_CFG_BCR, isa);
 239
 240         /* some hacks for lack of feature BCR info in old ARC700 cores */
 241         if (is_isa_arcompact()) {
 242                 if (!isa.ver)   /* ISA BCR absent, use Kconfig info */
 243                         cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
 244                 else {
 245                         /* ARC700_BUILD only has 2 bits of isa info */
 246                         struct bcr_generic bcr = *(struct bcr_generic *)&isa;
 247                         cpu->isa.atomic = bcr.info & 1;
 248                 }
 249
 250                 cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
 251
 252                  /* there's no direct way to distinguish 750 vs. 770 */
 253                 if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3))
 254                         cpu->name = "ARC750";
 255         } else {
 256                 cpu->isa = isa;
 257         }
 258 }
 259
 260 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
 261 {
 262         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 263         struct bcr_identity *core = &cpu->core;
 264         int i, n = 0;
 265
 266         FIX_PTR(cpu);
 267
 268         n += scnprintf(buf + n, len - n,
 269                        "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
 270                        core->family, core->cpu_id, core->chip_id);
 271
 272         n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s%s%s\n",
 273                        cpu_id, cpu->name, cpu->details,
 274                        is_isa_arcompact() ? "ARCompact" : "ARCv2",
 275                        IS_AVAIL1(cpu->isa.be, "[Big-Endian]"),
 276                        IS_AVAIL3(cpu->extn.dual, cpu->extn.dual_enb, " Dual-Issue "));
 277
 278         n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",
 279                        IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
 280                        IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
 281                        IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
 282                        IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
 283
 284         n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
 285                            IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
 286                            IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
 287                            IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
 288
 289         if (i)
 290                 n += scnprintf(buf + n, len - n, "\n\t\t: ");
 291
 292         if (cpu->extn_mpy.ver) {
 293                 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
 294                         n += scnprintf(buf + n, len - n, "mpy ");
 295                 } else {
 296                         int opt = 2;    /* stock MPY/MPYH */
 297
 298                         if (cpu->extn_mpy.dsp)  /* OPT 7-9 */
 299                                 opt = cpu->extn_mpy.dsp + 6;
 300
 301                         n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
 302                 }
 303         }
 304
 305         n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
 306                        IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
 307                        IS_AVAIL1(cpu->extn.norm, "norm "),
 308                        IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
 309                        IS_AVAIL1(cpu->extn.swap, "swap "),
 310                        IS_AVAIL1(cpu->extn.minmax, "minmax "),
 311                        IS_AVAIL1(cpu->extn.crc, "crc "),
 312                        IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
 313
 314         if (cpu->bpu.ver)
 315                 n += scnprintf(buf + n, len - n,
 316                               "BPU\t\t: %s%s match, cache:%d, Predict Table:%d",
 317                               IS_AVAIL1(cpu->bpu.full, "full"),
 318                               IS_AVAIL1(!cpu->bpu.full, "partial"),
 319                               cpu->bpu.num_cache, cpu->bpu.num_pred);
 320
 321         if (is_isa_arcv2()) {
 322                 struct bcr_lpb lpb;
 323
 324                 READ_BCR(ARC_REG_LPB_BUILD, lpb);
 325                 if (lpb.ver) {
 326                         unsigned int ctl;
 327                         ctl = read_aux_reg(ARC_REG_LPB_CTRL);
 328
 329                         n += scnprintf(buf + n, len - n, " Loop Buffer:%d %s",
 330                                 lpb.entries,
 331                                 IS_DISABLED_RUN(!ctl));
 332                 }
 333         }
 334
 335         n += scnprintf(buf + n, len - n, "\n");
 336         return buf;
 337 }
 338
 339 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
 340 {
 341         int n = 0;
 342         struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
 343
 344         FIX_PTR(cpu);
 345
 346         n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
 347
 348         if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
 349                 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
 350                                IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
 351                                IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
 352
 353         if (cpu->extn.debug)
 354                 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
 355                                IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
 356                                IS_AVAIL1(cpu->extn.smart, "smaRT "),
 357                                IS_AVAIL1(cpu->extn.rtt, "RTT "));
 358
 359         if (cpu->dccm.sz || cpu->iccm.sz)
 360                 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
 361                                cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
 362                                cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
 363
 364         if (is_isa_arcv2()) {
 365
 366                 /* Error Protection: ECC/Parity */
 367                 struct bcr_erp erp;
 368                 READ_BCR(ARC_REG_ERP_BUILD, erp);
 369
 370                 if (erp.ver) {
 371                         struct  ctl_erp ctl;
 372                         READ_BCR(ARC_REG_ERP_CTRL, ctl);
 373
 374                         /* inverted bits: 0 means enabled */
 375                         n += scnprintf(buf + n, len - n, "Extn [ECC]\t: %s%s%s%s%s%s\n",
 376                                 IS_AVAIL3(erp.ic,  !ctl.dpi, "IC "),
 377                                 IS_AVAIL3(erp.dc,  !ctl.dpd, "DC "),
 378                                 IS_AVAIL3(erp.mmu, !ctl.mpd, "MMU "));
 379                 }
 380         }
 381
 382         n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
 383                         EF_ARC_OSABI_CURRENT >> 8,
 384                         EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
 385                         "no-legacy-syscalls" : "64-bit data any register aligned");
 386
 387         return buf;
 388 }
 389
 390 static void arc_chk_core_config(void)
 391 {
 392         struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
 393         int saved = 0, present = 0;
 394         char *opt_nm = NULL;
 395
 396         if (!cpu->extn.timer0)
 397                 panic("Timer0 is not present!\n");
 398
 399         if (!cpu->extn.timer1)
 400                 panic("Timer1 is not present!\n");
 401
 402 #ifdef CONFIG_ARC_HAS_DCCM
 403         /*
 404          * DCCM can be arbit placed in hardware.
 405          * Make sure it's placement/sz matches what Linux is built with
 406          */
 407         if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
 408                 panic("Linux built with incorrect DCCM Base address\n");
 409
 410         if (CONFIG_ARC_DCCM_SZ * SZ_1K != cpu->dccm.sz)
 411                 panic("Linux built with incorrect DCCM Size\n");
 412 #endif
 413
 414 #ifdef CONFIG_ARC_HAS_ICCM
 415         if (CONFIG_ARC_ICCM_SZ * SZ_1K != cpu->iccm.sz)
 416                 panic("Linux built with incorrect ICCM Size\n");
 417 #endif
 418
 419         /*
 420          * FP hardware/software config sanity
 421          * -If hardware present, kernel needs to save/restore FPU state
 422          * -If not, it will crash trying to save/restore the non-existant regs
 423          */
 424
 425         if (is_isa_arcompact()) {
 426                 opt_nm = "CONFIG_ARC_FPU_SAVE_RESTORE";
 427                 saved = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
 428
 429                 /* only DPDP checked since SP has no arch visible regs */
 430                 present = cpu->extn.fpu_dp;
 431         } else {
 432                 opt_nm = "CONFIG_ARC_HAS_ACCL_REGS";
 433                 saved = IS_ENABLED(CONFIG_ARC_HAS_ACCL_REGS);
 434
 435                 /* Accumulator Low:High pair (r58:59) present if DSP MPY or FPU */
 436                 present = cpu->extn_mpy.dsp | cpu->extn.fpu_sp | cpu->extn.fpu_dp;
 437         }
 438
 439         if (present && !saved)
 440                 pr_warn("Enable %s for working apps\n", opt_nm);
 441         else if (!present && saved)
 442                 panic("Disable %s, hardware NOT present\n", opt_nm);
 443 }
 444
 445 /*
 446  * Initialize and setup the processor core
 447  * This is called by all the CPUs thus should not do special case stuff
 448  *    such as only for boot CPU etc
 449  */
 450
 451 void setup_processor(void)
 452 {
 453         char str[512];
 454         int cpu_id = smp_processor_id();
 455
 456         read_arc_build_cfg_regs();
 457         arc_init_IRQ();
 458
 459         pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
 460
 461         arc_mmu_init();
 462         arc_cache_init();
 463
 464         pr_info("%s", arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
 465         pr_info("%s", arc_platform_smp_cpuinfo());
 466
 467         arc_chk_core_config();
 468 }
 469
 470 static inline bool uboot_arg_invalid(unsigned long addr)
 471 {
 472         /*
 473          * Check that it is a untranslated address (although MMU is not enabled
 474          * yet, it being a high address ensures this is not by fluke)
 475          */
 476         if (addr < PAGE_OFFSET)
 477                 return true;
 478
 479         /* Check that address doesn't clobber resident kernel image */
 480         return addr >= (unsigned long)_stext && addr <= (unsigned long)_end;
 481 }
 482
 483 #define IGNORE_ARGS             "Ignore U-boot args: "
 484
 485 /* uboot_tag values for U-boot - kernel ABI revision 0; see head.S */
 486 #define UBOOT_TAG_NONE          0
 487 #define UBOOT_TAG_CMDLINE       1
 488 #define UBOOT_TAG_DTB           2
 489 /* We always pass 0 as magic from U-boot */
 490 #define UBOOT_MAGIC_VALUE       0
 491
 492 void __init handle_uboot_args(void)
 493 {
 494         bool use_embedded_dtb = true;
 495         bool append_cmdline = false;
 496
 497         /* check that we know this tag */
 498         if (uboot_tag != UBOOT_TAG_NONE &&
 499             uboot_tag != UBOOT_TAG_CMDLINE &&
 500             uboot_tag != UBOOT_TAG_DTB) {
 501                 pr_warn(IGNORE_ARGS "invalid uboot tag: '%08x'\n", uboot_tag);
 502                 goto ignore_uboot_args;
 503         }
 504
 505         if (uboot_magic != UBOOT_MAGIC_VALUE) {
 506                 pr_warn(IGNORE_ARGS "non zero uboot magic\n");
 507                 goto ignore_uboot_args;
 508         }
 509
 510         if (uboot_tag != UBOOT_TAG_NONE &&
 511             uboot_arg_invalid((unsigned long)uboot_arg)) {
 512                 pr_warn(IGNORE_ARGS "invalid uboot arg: '%px'\n", uboot_arg);
 513                 goto ignore_uboot_args;
 514         }
 515
 516         /* see if U-boot passed an external Device Tree blob */
 517         if (uboot_tag == UBOOT_TAG_DTB) {
 518                 machine_desc = setup_machine_fdt((void *)uboot_arg);
 519
 520                 /* external Device Tree blob is invalid - use embedded one */
 521                 use_embedded_dtb = !machine_desc;
 522         }
 523
 524         if (uboot_tag == UBOOT_TAG_CMDLINE)
 525                 append_cmdline = true;
 526
 527 ignore_uboot_args:
 528
 529         if (use_embedded_dtb) {
 530                 machine_desc = setup_machine_fdt(__dtb_start);
 531                 if (!machine_desc)
 532                         panic("Embedded DT invalid\n");
 533         }
 534
 535         /*
 536          * NOTE: @boot_command_line is populated by setup_machine_fdt() so this
 537          * append processing can only happen after.
 538          */
 539         if (append_cmdline) {
 540                 /* Ensure a whitespace between the 2 cmdlines */
 541                 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
 542                 strlcat(boot_command_line, uboot_arg, COMMAND_LINE_SIZE);
 543         }
 544 }
 545
 546 void __init setup_arch(char **cmdline_p)
 547 {
 548         handle_uboot_args();
 549
 550         /* Save unparsed command line copy for /proc/cmdline */
 551         *cmdline_p = boot_command_line;
 552
 553         /* To force early parsing of things like mem=xxx */
 554         parse_early_param();
 555
 556         /* Platform/board specific: e.g. early console registration */
 557         if (machine_desc->init_early)
 558                 machine_desc->init_early();
 559
 560         smp_init_cpus();
 561
 562         setup_processor();
 563         setup_arch_memory();
 564
 565         /* copy flat DT out of .init and then unflatten it */
 566         unflatten_and_copy_device_tree();
 567
 568         /* Can be issue if someone passes cmd line arg "ro"
 569          * But that is unlikely so keeping it as it is
 570          */
 571         root_mountflags &= ~MS_RDONLY;
 572
 573 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
 574         conswitchp = &dummy_con;
 575 #endif
 576
 577         arc_unwind_init();
 578 }
 579
 580 /*
 581  * Called from start_kernel() - boot CPU only
 582  */
 583 void __init time_init(void)
 584 {
 585         of_clk_init(NULL);
 586         timer_probe();
 587 }
 588
 589 static int __init customize_machine(void)
 590 {
 591         if (machine_desc->init_machine)
 592                 machine_desc->init_machine();
 593
 594         return 0;
 595 }
 596 arch_initcall(customize_machine);
 597
 598 static int __init init_late_machine(void)
 599 {
 600         if (machine_desc->init_late)
 601                 machine_desc->init_late();
 602
 603         return 0;
 604 }
 605 late_initcall(init_late_machine);
 606 /*
 607  *  Get CPU information for use by the procfs.
 608  */
 609
 610 #define cpu_to_ptr(c)   ((void *)(0xFFFF0000 | (unsigned int)(c)))
 611 #define ptr_to_cpu(p)   (~0xFFFF0000UL & (unsigned int)(p))
 612
 613 static int show_cpuinfo(struct seq_file *m, void *v)
 614 {
 615         char *str;
 616         int cpu_id = ptr_to_cpu(v);
 617         struct device *cpu_dev = get_cpu_device(cpu_id);
 618         struct clk *cpu_clk;
 619         unsigned long freq = 0;
 620
 621         if (!cpu_online(cpu_id)) {
 622                 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
 623                 goto done;
 624         }
 625
 626         str = (char *)__get_free_page(GFP_KERNEL);
 627         if (!str)
 628                 goto done;
 629
 630         seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 631
 632         cpu_clk = clk_get(cpu_dev, NULL);
 633         if (IS_ERR(cpu_clk)) {
 634                 seq_printf(m, "CPU speed \t: Cannot get clock for processor [%d]\n",
 635                            cpu_id);
 636         } else {
 637                 freq = clk_get_rate(cpu_clk);
 638         }
 639         if (freq)
 640                 seq_printf(m, "CPU speed\t: %lu.%02lu Mhz\n",
 641                            freq / 1000000, (freq / 10000) % 100);
 642
 643         seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
 644                    loops_per_jiffy / (500000 / HZ),
 645                    (loops_per_jiffy / (5000 / HZ)) % 100);
 646
 647         seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
 648         seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
 649         seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
 650         seq_printf(m, arc_platform_smp_cpuinfo());
 651
 652         free_page((unsigned long)str);
 653 done:
 654         seq_printf(m, "\n");
 655
 656         return 0;
 657 }
 658
 659 static void *c_start(struct seq_file *m, loff_t *pos)
 660 {
 661         /*
 662          * Callback returns cpu-id to iterator for show routine, NULL to stop.
 663          * However since NULL is also a valid cpu-id (0), we use a round-about
 664          * way to pass it w/o having to kmalloc/free a 2 byte string.
 665          * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
 666          */
 667         return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
 668 }
 669
 670 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
 671 {
 672         ++*pos;
 673         return c_start(m, pos);
 674 }
 675
 676 static void c_stop(struct seq_file *m, void *v)
 677 {
 678 }
 679
 680 const struct seq_operations cpuinfo_op = {
 681         .start  = c_start,
 682         .next   = c_next,
 683         .stop   = c_stop,
 684         .show   = show_cpuinfo
 685 };
 686
 687 static DEFINE_PER_CPU(struct cpu, cpu_topology);
 688
 689 static int __init topology_init(void)
 690 {
 691         int cpu;
 692
 693         for_each_present_cpu(cpu)
 694             register_cpu(&per_cpu(cpu_topology, cpu), cpu);
 695
 696         return 0;
 697 }
 698
 699 subsys_initcall(topology_init);