2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/sizes.h>
16 #include <linux/cpu.h>
17 #include <linux/clk-provider.h>
18 #include <linux/of_fdt.h>
19 #include <linux/of_platform.h>
20 #include <linux/cache.h>
21 #include <asm/sections.h>
22 #include <asm/arcregs.h>
24 #include <asm/setup.h>
27 #include <asm/unwind.h>
29 #include <asm/mach_desc.h>
32 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
34 unsigned int intr_to_DE_cnt;
36 /* Part of U-boot ABI: see head.S */
37 int __initdata uboot_tag;
38 char __initdata *uboot_arg;
40 const struct machine_desc *machine_desc;
42 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
44 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
46 static void read_arc_build_cfg_regs(void)
48 struct bcr_perip uncached_space;
49 struct bcr_generic bcr;
50 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
51 unsigned long perip_space;
54 READ_BCR(AUX_IDENTITY, cpu->core);
55 READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
57 READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
58 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
60 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
61 if (uncached_space.ver < 3)
62 perip_space = uncached_space.start << 24;
64 perip_space = read_aux_reg(AUX_NON_VOL) & 0xF0000000;
66 BUG_ON(perip_space != ARC_UNCACHED_ADDR_SPACE);
68 READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
70 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
71 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
72 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
73 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
74 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
76 /* Note that we read the CCM BCRs independent of kernel config
77 * This is to catch the cases where user doesn't know that
78 * CCMs are present in hardware build
83 struct bcr_dccm_base dccm_base;
84 unsigned int bcr_32bit_val;
86 bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
88 iccm = *((struct bcr_iccm *)&bcr_32bit_val);
89 cpu->iccm.base_addr = iccm.base << 16;
90 cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
93 bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
95 dccm = *((struct bcr_dccm *)&bcr_32bit_val);
96 cpu->dccm.sz = 0x800 << (dccm.sz);
98 READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
99 cpu->dccm.base_addr = dccm_base.addr << 8;
103 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
105 read_decode_mmu_bcr();
106 read_decode_cache_bcr();
108 if (is_isa_arcompact()) {
109 struct bcr_fp_arcompact sp, dp;
110 struct bcr_bpu_arcompact bpu;
112 READ_BCR(ARC_REG_FP_BCR, sp);
113 READ_BCR(ARC_REG_DPFP_BCR, dp);
114 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
115 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
117 READ_BCR(ARC_REG_BPU_BCR, bpu);
118 cpu->bpu.ver = bpu.ver;
119 cpu->bpu.full = bpu.fam ? 1 : 0;
121 cpu->bpu.num_cache = 256 << (bpu.ent - 1);
122 cpu->bpu.num_pred = 256 << (bpu.ent - 1);
125 struct bcr_fp_arcv2 spdp;
126 struct bcr_bpu_arcv2 bpu;
128 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
129 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
130 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
132 READ_BCR(ARC_REG_BPU_BCR, bpu);
133 cpu->bpu.ver = bpu.ver;
134 cpu->bpu.full = bpu.ft;
135 cpu->bpu.num_cache = 256 << bpu.bce;
136 cpu->bpu.num_pred = 2048 << bpu.pte;
139 READ_BCR(ARC_REG_AP_BCR, bcr);
140 cpu->extn.ap = bcr.ver ? 1 : 0;
142 READ_BCR(ARC_REG_SMART_BCR, bcr);
143 cpu->extn.smart = bcr.ver ? 1 : 0;
145 READ_BCR(ARC_REG_RTT_BCR, bcr);
146 cpu->extn.rtt = bcr.ver ? 1 : 0;
148 cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
151 static const struct cpuinfo_data arc_cpu_tbl[] = {
152 #ifdef CONFIG_ISA_ARCOMPACT
153 { {0x20, "ARC 600" }, 0x2F},
154 { {0x30, "ARC 700" }, 0x33},
155 { {0x34, "ARC 700 R4.10"}, 0x34},
156 { {0x35, "ARC 700 R4.11"}, 0x35},
158 { {0x50, "ARC HS38 R2.0"}, 0x51},
159 { {0x52, "ARC HS38 R2.1"}, 0x52},
165 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
167 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
168 struct bcr_identity *core = &cpu->core;
169 const struct cpuinfo_data *tbl;
176 if (is_isa_arcompact()) {
177 isa_nm = "ARCompact";
178 be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
180 atomic = cpu->isa.atomic1;
181 if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
182 atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
186 atomic = cpu->isa.atomic;
189 n += scnprintf(buf + n, len - n,
190 "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
191 core->family, core->cpu_id, core->chip_id);
193 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
194 if ((core->family >= tbl->info.id) &&
195 (core->family <= tbl->up_range)) {
196 n += scnprintf(buf + n, len - n,
197 "processor [%d]\t: %s (%s ISA) %s\n",
198 cpu_id, tbl->info.str, isa_nm,
199 IS_AVAIL1(be, "[Big-Endian]"));
204 if (tbl->info.id == 0)
205 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
207 n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
208 (unsigned int)(arc_get_core_freq() / 1000000),
209 (unsigned int)(arc_get_core_freq() / 10000) % 100);
211 n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
212 IS_AVAIL1(cpu->timers.t0, "Timer0 "),
213 IS_AVAIL1(cpu->timers.t1, "Timer1 "),
214 IS_AVAIL2(cpu->timers.rtc, "64-bit RTC ",
215 CONFIG_ARC_HAS_RTC));
217 n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
218 IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
219 IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
220 IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
223 n += scnprintf(buf + n, len - n, "\n\t\t: ");
225 if (cpu->extn_mpy.ver) {
226 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
227 n += scnprintf(buf + n, len - n, "mpy ");
229 int opt = 2; /* stock MPY/MPYH */
231 if (cpu->extn_mpy.dsp) /* OPT 7-9 */
232 opt = cpu->extn_mpy.dsp + 6;
234 n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
238 n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
239 IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
240 IS_AVAIL1(cpu->extn.norm, "norm "),
241 IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
242 IS_AVAIL1(cpu->extn.swap, "swap "),
243 IS_AVAIL1(cpu->extn.minmax, "minmax "),
244 IS_AVAIL1(cpu->extn.crc, "crc "),
245 IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
248 n += scnprintf(buf + n, len - n,
249 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
250 IS_AVAIL1(cpu->bpu.full, "full"),
251 IS_AVAIL1(!cpu->bpu.full, "partial"),
252 cpu->bpu.num_cache, cpu->bpu.num_pred);
257 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
260 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
264 n += scnprintf(buf + n, len - n,
265 "Vector Table\t: %#x\nUncached Base\t: %#x\n",
266 cpu->vec_base, ARC_UNCACHED_ADDR_SPACE);
268 if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
269 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
270 IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
271 IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
274 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
275 IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
276 IS_AVAIL1(cpu->extn.smart, "smaRT "),
277 IS_AVAIL1(cpu->extn.rtt, "RTT "));
279 if (cpu->dccm.sz || cpu->iccm.sz)
280 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
281 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
282 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
284 n += scnprintf(buf + n, len - n,
285 "OS ABI [v3]\t: no-legacy-syscalls\n");
290 static void arc_chk_core_config(void)
292 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
296 panic("Timer0 is not present!\n");
299 panic("Timer1 is not present!\n");
301 if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->timers.rtc)
302 panic("RTC is not present\n");
304 #ifdef CONFIG_ARC_HAS_DCCM
306 * DCCM can be arbit placed in hardware.
307 * Make sure it's placement/sz matches what Linux is built with
309 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
310 panic("Linux built with incorrect DCCM Base address\n");
312 if (CONFIG_ARC_DCCM_SZ * SZ_1K != cpu->dccm.sz)
313 panic("Linux built with incorrect DCCM Size\n");
316 #ifdef CONFIG_ARC_HAS_ICCM
317 if (CONFIG_ARC_ICCM_SZ * SZ_1K != cpu->iccm.sz)
318 panic("Linux built with incorrect ICCM Size\n");
322 * FP hardware/software config sanity
323 * -If hardware contains DPFP, kernel needs to save/restore FPU state
324 * -If not, it will crash trying to save/restore the non-existant regs
326 * (only DPDP checked since SP has no arch visible regs)
328 fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
330 if (cpu->extn.fpu_dp && !fpu_enabled)
331 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
332 else if (!cpu->extn.fpu_dp && fpu_enabled)
333 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
337 * Initialize and setup the processor core
338 * This is called by all the CPUs thus should not do special case stuff
339 * such as only for boot CPU etc
342 void setup_processor(void)
345 int cpu_id = smp_processor_id();
347 read_arc_build_cfg_regs();
350 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
355 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
356 printk(arc_platform_smp_cpuinfo());
358 arc_chk_core_config();
361 static inline int is_kernel(unsigned long addr)
363 if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
368 void __init setup_arch(char **cmdline_p)
370 #ifdef CONFIG_ARC_UBOOT_SUPPORT
371 /* make sure that uboot passed pointer to cmdline/dtb is valid */
372 if (uboot_tag && is_kernel((unsigned long)uboot_arg))
373 panic("Invalid uboot arg\n");
375 /* See if u-boot passed an external Device Tree blob */
376 machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
380 /* No, so try the embedded one */
381 machine_desc = setup_machine_fdt(__dtb_start);
383 panic("Embedded DT invalid\n");
386 * If we are here, it is established that @uboot_arg didn't
387 * point to DT blob. Instead if u-boot says it is cmdline,
388 * Appent to embedded DT cmdline.
389 * setup_machine_fdt() would have populated @boot_command_line
391 if (uboot_tag == 1) {
392 /* Ensure a whitespace between the 2 cmdlines */
393 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
394 strlcat(boot_command_line, uboot_arg,
399 /* Save unparsed command line copy for /proc/cmdline */
400 *cmdline_p = boot_command_line;
402 /* To force early parsing of things like mem=xxx */
405 /* Platform/board specific: e.g. early console registration */
406 if (machine_desc->init_early)
407 machine_desc->init_early();
414 /* copy flat DT out of .init and then unflatten it */
415 unflatten_and_copy_device_tree();
417 /* Can be issue if someone passes cmd line arg "ro"
418 * But that is unlikely so keeping it as it is
420 root_mountflags &= ~MS_RDONLY;
422 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
423 conswitchp = &dummy_con;
429 static int __init customize_machine(void)
433 * Traverses flattened DeviceTree - registering platform devices
434 * (if any) complete with their resources
436 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
438 if (machine_desc->init_machine)
439 machine_desc->init_machine();
443 arch_initcall(customize_machine);
445 static int __init init_late_machine(void)
447 if (machine_desc->init_late)
448 machine_desc->init_late();
452 late_initcall(init_late_machine);
454 * Get CPU information for use by the procfs.
457 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
458 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
460 static int show_cpuinfo(struct seq_file *m, void *v)
463 int cpu_id = ptr_to_cpu(v);
465 if (!cpu_online(cpu_id)) {
466 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
470 str = (char *)__get_free_page(GFP_TEMPORARY);
474 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
476 seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
477 loops_per_jiffy / (500000 / HZ),
478 (loops_per_jiffy / (5000 / HZ)) % 100);
480 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
481 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
482 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
483 seq_printf(m, arc_platform_smp_cpuinfo());
485 free_page((unsigned long)str);
492 static void *c_start(struct seq_file *m, loff_t *pos)
495 * Callback returns cpu-id to iterator for show routine, NULL to stop.
496 * However since NULL is also a valid cpu-id (0), we use a round-about
497 * way to pass it w/o having to kmalloc/free a 2 byte string.
498 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
500 return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
503 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
506 return c_start(m, pos);
509 static void c_stop(struct seq_file *m, void *v)
513 const struct seq_operations cpuinfo_op = {
520 static DEFINE_PER_CPU(struct cpu, cpu_topology);
522 static int __init topology_init(void)
526 for_each_present_cpu(cpu)
527 register_cpu(&per_cpu(cpu_topology, cpu), cpu);
532 subsys_initcall(topology_init);