1 /* SPDX-License-Identifier: GPL-2.0 */
3 #ifndef __ASM_ARC_ENTRY_ARCV2_H
4 #define __ASM_ARC_ENTRY_ARCV2_H
6 #include <asm/asm-offsets.h>
7 #include <asm/dsp-impl.h>
8 #include <asm/irqflags-arcv2.h>
9 #include <asm/thread_info.h> /* For THREAD_SIZE */
12 * Interrupt/Exception stack layout (pt_regs) for ARCv2
13 * (End of struct aligned to end of page [unless nested])
17 * manual --------------------- manual
28 * hw autosave ---------------------
42 * ---------------------
43 * hw autosave | pc / eret |
44 * mandatory | stat32 / erstatus |
45 * ---------------------
48 /*------------------------------------------------------------------------*/
49 .macro INTERRUPT_PROLOGUE
51 ; Before jumping to Interrupt Vector, hardware micro-ops did following:
52 ; 1. SP auto-switched to kernel mode stack
53 ; 2. STATUS32.Z flag set if in U mode at time of interrupt (U:1,K:0)
54 ; 3. Auto save: (mandatory) Push PC and STAT32 on stack
55 ; hardware does even if CONFIG_ARC_IRQ_NO_AUTOSAVE
56 ; 4a. Auto save: (optional) r0-r11, blink, LPE,LPS,LPC, JLI,LDI,EI
59 ; 4b. If Auto-save (optional) not enabled in hw, manually save them
60 ; 5. Manually save: r12,r30, sp,fp,gp, ACCL pair
62 ; At the end, SP points to pt_regs
64 #ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
65 ; carve pt_regs on stack (case #3), PC/STAT32 already on stack
66 sub sp, sp, SZ_PT_REGS - 8
70 ; carve pt_regs on stack (case #4), which grew partially already
77 /*------------------------------------------------------------------------*/
78 .macro EXCEPTION_PROLOGUE_KEEP_AE
80 ; Before jumping to Exception Vector, hardware micro-ops did following:
81 ; 1. SP auto-switched to kernel mode stack
82 ; 2. STATUS32.Z flag set if in U mode at time of exception (U:1,K:0)
84 ; Now manually save rest of reg file
85 ; At the end, SP points to pt_regs
87 sub sp, sp, SZ_PT_REGS ; carve space for pt_regs
89 ; _HARD saves r10 clobbered by _SOFT as scratch hence comes first
102 ST2 r10, r11, PT_event
104 ; OUTPUT: r10 has ECR expected by EV_Trap
107 .macro EXCEPTION_PROLOGUE
109 EXCEPTION_PROLOGUE_KEEP_AE ; return ECR in r10
114 FAKE_RET_FROM_EXCPN ; clobbers r9
117 /*------------------------------------------------------------------------
118 * This macro saves the registers manually which would normally be autosaved
119 * by hardware on taken interrupts. It is used by
120 * - exception handlers (which don't have autosave)
121 * - interrupt autosave disabled due to CONFIG_ARC_IRQ_NO_AUTOSAVE
123 .macro __SAVE_REGFILE_HARD
132 st blink, [sp, PT_blink]
138 st lp_count, [sp, PT_lpc]
140 ; skip JLI, LDI, EI for now
143 /*------------------------------------------------------------------------
144 * This macros saves a bunch of other registers which can't be autosaved for
146 * - r12: the last caller saved scratch reg since hardware saves in pairs so r0-r11
147 * - r30: free reg, used by gcc as scratch
148 * - ACCL/ACCH pair when they exist
150 .macro __SAVE_REGFILE_SOFT
152 st fp, [sp, PT_fp] ; r27
155 st r26, [sp, PT_r26] ; gp
157 ; Saving pt_regs->sp correctly requires some extra work due to the way
158 ; Auto stack switch works
159 ; - U mode: retrieve it from AUX_USER_SP
160 ; - K mode: add the offset from current SP where H/w starts auto push
162 ; 1. Utilize the fact that Z bit is set if Intr taken in U mode
163 ; 2. Upon entry SP is always saved (for any inspection, unwinding etc),
164 ; but on return, restored only if U mode
166 lr r10, [AUX_USER_SP] ; U mode SP
168 ; ISA requires ADD.nz to have same dest and src reg operands
170 add2.nz r10, r10, SZ_PT_REGS/4 ; K mode SP
172 st r10, [sp, PT_sp] ; SP (pt_regs->sp)
174 #ifdef CONFIG_ARC_HAS_ACCL_REGS
178 /* clobbers r10, r11 registers pair */
181 #ifdef CONFIG_ARC_CURR_IN_REG
182 GET_CURR_TASK_ON_CPU gp
187 /*------------------------------------------------------------------------*/
188 .macro __RESTORE_REGFILE_SOFT
195 ; Restore SP (into AUX_USER_SP) only if returning to U mode
196 ; - for K mode, it will be implicitly restored as stack is unwound
197 ; - Z flag set on K is inverse of what hardware does on interrupt entry
198 ; but that doesn't really matter
201 ld r10, [sp, PT_sp] ; SP (pt_regs->sp)
202 sr r10, [AUX_USER_SP]
205 /* clobbers r10, r11 registers pair */
206 DSP_RESTORE_REGFILE_IRQ
208 #ifdef CONFIG_ARC_HAS_ACCL_REGS
213 /*------------------------------------------------------------------------*/
214 .macro __RESTORE_REGFILE_HARD
216 ld blink, [sp, PT_blink]
222 ld r10, [sp, PT_lpc] ; lp_count can't be target of LD
234 /*------------------------------------------------------------------------*/
235 .macro INTERRUPT_EPILOGUE
237 ; INPUT: r0 has STAT32 of calling context
238 ; INPUT: Z flag set if returning to K mode
240 ; _SOFT clobbers r10 restored by _HARD hence the order
242 __RESTORE_REGFILE_SOFT
244 #ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
245 __RESTORE_REGFILE_HARD
247 ; SP points to PC/STAT32: hw restores them despite NO_AUTOSAVE
248 add sp, sp, SZ_PT_REGS - 8
255 /*------------------------------------------------------------------------*/
256 .macro EXCEPTION_EPILOGUE
258 ; INPUT: r0 has STAT32 of calling context
260 btst r0, STATUS_U_BIT ; Z flag set if K, used in restoring SP
269 __RESTORE_REGFILE_SOFT
270 __RESTORE_REGFILE_HARD
272 add sp, sp, SZ_PT_REGS
275 .macro FAKE_RET_FROM_EXCPN
277 bclr r9, r9, STATUS_AE_BIT
278 bset r9, r9, STATUS_IE_BIT
282 /* Get thread_info of "current" tsk */
283 .macro GET_CURR_THR_INFO_FROM_SP reg
284 bmskn \reg, sp, THREAD_SHIFT - 1
287 /* Get CPU-ID of this core */
288 .macro GET_CPU_ID reg
290 xbfu \reg, \reg, 0xE8 /* 00111 01000 */
294 .macro SAVE_ABI_CALLEE_REGS
310 .macro RESTORE_ABI_CALLEE_REGS