1 /* SPDX-License-Identifier: GPL-2.0 */
3 #ifndef __ASM_ARC_ENTRY_ARCV2_H
4 #define __ASM_ARC_ENTRY_ARCV2_H
6 #include <asm/asm-offsets.h>
7 #include <asm/irqflags-arcv2.h>
8 #include <asm/thread_info.h> /* For THREAD_SIZE */
11 * Interrupt/Exception stack layout (pt_regs) for ARCv2
12 * (End of struct aligned to end of page [unless nested])
16 * manual --------------------- manual
28 * hw autosave ---------------------
42 * ---------------------
43 * hw autosave | pc / eret |
44 * mandatory | stat32 / erstatus |
45 * ---------------------
48 /*------------------------------------------------------------------------*/
49 .macro INTERRUPT_PROLOGUE
51 ; (A) Before jumping to Interrupt Vector, hardware micro-ops did following:
52 ; 1. SP auto-switched to kernel mode stack
53 ; 2. STATUS32.Z flag set if in U mode at time of interrupt (U:1,K:0)
54 ; 3. Auto save: (mandatory) Push PC and STAT32 on stack
55 ; hardware does even if CONFIG_ARC_IRQ_NO_AUTOSAVE
56 ; 4. Auto save: (optional) r0-r11, blink, LPE,LPS,LPC, JLI,LDI,EI
58 ; (B) Manually saved some regs: r12,r25,r30, sp,fp,gp, ACCL pair
60 #ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
61 ; carve pt_regs on stack (case #3), PC/STAT32 already on stack
62 sub sp, sp, SZ_PT_REGS - 8
66 ; carve pt_regs on stack (case #4), which grew partially already
73 /*------------------------------------------------------------------------*/
74 .macro EXCEPTION_PROLOGUE
76 ; (A) Before jumping to Exception Vector, hardware micro-ops did following:
77 ; 1. SP auto-switched to kernel mode stack
78 ; 2. STATUS32.Z flag set if in U mode at time of exception (U:1,K:0)
80 ; (B) Manually save the complete reg file below
82 sub sp, sp, SZ_PT_REGS ; carve pt_regs
84 ; _HARD saves r10 clobbered by _SOFT as scratch hence comes first
97 ST2 r10, r11, PT_event
103 /*------------------------------------------------------------------------
104 * This macro saves the registers manually which would normally be autosaved
105 * by hardware on taken interrupts. It is used by
106 * - exception handlers (which don't have autosave)
107 * - interrupt autosave disabled due to CONFIG_ARC_IRQ_NO_AUTOSAVE
109 .macro __SAVE_REGFILE_HARD
118 st blink, [sp, PT_blink]
124 st lp_count, [sp, PT_lpc]
126 ; skip JLI, LDI, EI for now
129 /*------------------------------------------------------------------------
130 * This macros saves a bunch of other registers which can't be autosaved for
132 * - r12: the last caller saved scratch reg since hardware saves in pairs so r0-r11
133 * - r30: free reg, used by gcc as scratch
134 * - ACCL/ACCH pair when they exist
136 .macro __SAVE_REGFILE_SOFT
138 ST2 gp, fp, PT_r26 ; gp (r26), fp (r27)
140 st r12, [sp, PT_sp + 4]
141 st r30, [sp, PT_sp + 8]
143 ; Saving pt_regs->sp correctly requires some extra work due to the way
144 ; Auto stack switch works
145 ; - U mode: retrieve it from AUX_USER_SP
146 ; - K mode: add the offset from current SP where H/w starts auto push
148 ; 1. Utilize the fact that Z bit is set if Intr taken in U mode
149 ; 2. Upon entry SP is always saved (for any inspection, unwinding etc),
150 ; but on return, restored only if U mode
152 lr r10, [AUX_USER_SP] ; U mode SP
154 ; ISA requires ADD.nz to have same dest and src reg operands
156 add.nz r10, r10, SZ_PT_REGS ; K mode SP
158 st r10, [sp, PT_sp] ; SP (pt_regs->sp)
160 #ifdef CONFIG_ARC_CURR_IN_REG
161 st r25, [sp, PT_user_r25]
162 GET_CURR_TASK_ON_CPU r25
165 #ifdef CONFIG_ARC_HAS_ACCL_REGS
166 ST2 r58, r59, PT_sp + 12
171 /*------------------------------------------------------------------------*/
172 .macro __RESTORE_REGFILE_SOFT
174 LD2 gp, fp, PT_r26 ; gp (r26), fp (r27)
176 ld r12, [sp, PT_sp + 4]
177 ld r30, [sp, PT_sp + 8]
179 ; Restore SP (into AUX_USER_SP) only if returning to U mode
180 ; - for K mode, it will be implicitly restored as stack is unwound
181 ; - Z flag set on K is inverse of what hardware does on interrupt entry
182 ; but that doesn't really matter
185 ld r10, [sp, PT_sp] ; SP (pt_regs->sp)
186 sr r10, [AUX_USER_SP]
189 #ifdef CONFIG_ARC_CURR_IN_REG
190 ld r25, [sp, PT_user_r25]
193 #ifdef CONFIG_ARC_HAS_ACCL_REGS
194 LD2 r58, r59, PT_sp + 12
198 /*------------------------------------------------------------------------*/
199 .macro __RESTORE_REGFILE_HARD
201 ld blink, [sp, PT_blink]
207 ld r10, [sp, PT_lpc] ; lp_count can't be target of LD
219 /*------------------------------------------------------------------------*/
220 .macro INTERRUPT_EPILOGUE
222 ; INPUT: r0 has STAT32 of calling context
223 ; INPUT: Z flag set if returning to K mode
225 ; _SOFT clobbers r10 restored by _HARD hence the order
227 __RESTORE_REGFILE_SOFT
229 #ifdef CONFIG_ARC_IRQ_NO_AUTOSAVE
230 __RESTORE_REGFILE_HARD
231 add sp, sp, SZ_PT_REGS - 8
238 /*------------------------------------------------------------------------*/
239 .macro EXCEPTION_EPILOGUE
241 ; INPUT: r0 has STAT32 of calling context
243 btst r0, STATUS_U_BIT ; Z flag set if K, used in restoring SP
245 ld r10, [sp, PT_event + 4]
252 __RESTORE_REGFILE_SOFT
253 __RESTORE_REGFILE_HARD
255 add sp, sp, SZ_PT_REGS
258 .macro FAKE_RET_FROM_EXCPN
260 bic r9, r9, (STATUS_U_MASK|STATUS_DE_MASK|STATUS_AE_MASK)
261 or r9, r9, STATUS_IE_MASK
265 /* Get thread_info of "current" tsk */
266 .macro GET_CURR_THR_INFO_FROM_SP reg
267 bmskn \reg, sp, THREAD_SHIFT - 1
270 /* Get CPU-ID of this core */
271 .macro GET_CPU_ID reg
273 xbfu \reg, \reg, 0xE8 /* 00111 01000 */