1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
7 /include/ "skeleton_hs_idu.dtsi"
10 model = "snps,nsim_hs-smp";
11 compatible = "snps,nsim_hs";
12 interrupt-parent = <&core_intc>;
15 bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1";
23 compatible = "simple-bus";
27 /* child and parent address space 1:1 mapped */
32 compatible = "fixed-clock";
33 clock-frequency = <80000000>;
36 core_intc: core-interrupt-controller {
37 compatible = "snps,archs-intc";
39 #interrupt-cells = <1>;
42 idu_intc: idu-interrupt-controller {
43 compatible = "snps,archs-idu-intc";
45 interrupt-parent = <&core_intc>;
46 #interrupt-cells = <1>;
49 arcuart0: serial@c0fc1000 {
50 compatible = "snps,arc-uart";
51 reg = <0xc0fc1000 0x100>;
52 interrupt-parent = <&idu_intc>;
54 clock-frequency = <80000000>;
55 current-speed = <115200>;
60 compatible = "snps,archs-pct";
61 #interrupt-cells = <1>;